tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright 2004 Koninklijke Philips Electronics NV
3 *
4 * Conversion to platform driver and DT:
5 * Copyright 2014 Linaro Ltd.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * 14/04/2005 Initial version, colin.king@philips.com
17 */
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/of_address.h>
21#include <linux/of_pci.h>
22#include <linux/of_platform.h>
23#include <linux/pci.h>
24#include <linux/platform_device.h>
25
26static void __iomem *versatile_pci_base;
27static void __iomem *versatile_cfg_base[2];
28
29#define PCI_IMAP(m) (versatile_pci_base + ((m) * 4))
30#define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4))
31#define PCI_SELFID (versatile_pci_base + 0xc)
32
33#define VP_PCI_DEVICE_ID 0x030010ee
34#define VP_PCI_CLASS_ID 0x0b400000
35
36static u32 pci_slot_ignore;
37
38static int __init versatile_pci_slot_ignore(char *str)
39{
40 int retval;
41 int slot;
42
43 while ((retval = get_option(&str, &slot))) {
44 if ((slot < 0) || (slot > 31))
45 pr_err("Illegal slot value: %d\n", slot);
46 else
47 pci_slot_ignore |= (1 << slot);
48 }
49 return 1;
50}
51__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
52
53
54static void __iomem *versatile_map_bus(struct pci_bus *bus,
55 unsigned int devfn, int offset)
56{
57 unsigned int busnr = bus->number;
58
59 if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
60 return NULL;
61
62 return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
63}
64
65static struct pci_ops pci_versatile_ops = {
66 .map_bus = versatile_map_bus,
67 .read = pci_generic_config_read32,
68 .write = pci_generic_config_write,
69};
70
71static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
72 struct list_head *res)
73{
74 int err, mem = 1, res_valid = 0;
75 struct device_node *np = dev->of_node;
76 resource_size_t iobase;
77 struct resource_entry *win, *tmp;
78
79 err = of_pci_get_host_bridge_resources(np, 0, 0xff, res, &iobase);
80 if (err)
81 return err;
82
83 err = devm_request_pci_bus_resources(dev, res);
84 if (err)
85 goto out_release_res;
86
87 resource_list_for_each_entry_safe(win, tmp, res) {
88 struct resource *res = win->res;
89
90 switch (resource_type(res)) {
91 case IORESOURCE_IO:
92 err = pci_remap_iospace(res, iobase);
93 if (err) {
94 dev_warn(dev, "error %d: failed to map resource %pR\n",
95 err, res);
96 resource_list_destroy_entry(win);
97 }
98 break;
99 case IORESOURCE_MEM:
100 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
101
102 writel(res->start >> 28, PCI_IMAP(mem));
103 writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
104 mem++;
105
106 break;
107 }
108 }
109
110 if (res_valid)
111 return 0;
112
113 dev_err(dev, "non-prefetchable memory resource required\n");
114 err = -EINVAL;
115
116out_release_res:
117 pci_free_resource_list(res);
118 return err;
119}
120
121static int versatile_pci_probe(struct platform_device *pdev)
122{
123 struct resource *res;
124 int ret, i, myslot = -1;
125 u32 val;
126 void __iomem *local_pci_cfg_base;
127 struct pci_bus *bus, *child;
128 LIST_HEAD(pci_res);
129
130 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
131 versatile_pci_base = devm_ioremap_resource(&pdev->dev, res);
132 if (IS_ERR(versatile_pci_base))
133 return PTR_ERR(versatile_pci_base);
134
135 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
136 versatile_cfg_base[0] = devm_ioremap_resource(&pdev->dev, res);
137 if (IS_ERR(versatile_cfg_base[0]))
138 return PTR_ERR(versatile_cfg_base[0]);
139
140 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
141 versatile_cfg_base[1] = devm_pci_remap_cfg_resource(&pdev->dev,
142 res);
143 if (IS_ERR(versatile_cfg_base[1]))
144 return PTR_ERR(versatile_cfg_base[1]);
145
146 ret = versatile_pci_parse_request_of_pci_ranges(&pdev->dev, &pci_res);
147 if (ret)
148 return ret;
149
150 /*
151 * We need to discover the PCI core first to configure itself
152 * before the main PCI probing is performed
153 */
154 for (i = 0; i < 32; i++) {
155 if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
156 (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
157 myslot = i;
158 break;
159 }
160 }
161 if (myslot == -1) {
162 dev_err(&pdev->dev, "Cannot find PCI core!\n");
163 return -EIO;
164 }
165 /*
166 * Do not to map Versatile FPGA PCI device into memory space
167 */
168 pci_slot_ignore |= (1 << myslot);
169
170 dev_info(&pdev->dev, "PCI core found (slot %d)\n", myslot);
171
172 writel(myslot, PCI_SELFID);
173 local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
174
175 val = readl(local_pci_cfg_base + PCI_COMMAND);
176 val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
177 writel(val, local_pci_cfg_base + PCI_COMMAND);
178
179 /*
180 * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
181 */
182 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
183 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
184 writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
185
186 /*
187 * For many years the kernel and QEMU were symbiotically buggy
188 * in that they both assumed the same broken IRQ mapping.
189 * QEMU therefore attempts to auto-detect old broken kernels
190 * so that they still work on newer QEMU as they did on old
191 * QEMU. Since we now use the correct (ie matching-hardware)
192 * IRQ mapping we write a definitely different value to a
193 * PCI_INTERRUPT_LINE register to tell QEMU that we expect
194 * real hardware behaviour and it need not be backwards
195 * compatible for us. This write is harmless on real hardware.
196 */
197 writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
198
199 pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
200 pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
201
202 bus = pci_scan_root_bus(&pdev->dev, 0, &pci_versatile_ops, NULL, &pci_res);
203 if (!bus)
204 return -ENOMEM;
205
206 pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
207 pci_assign_unassigned_bus_resources(bus);
208 list_for_each_entry(child, &bus->children, node)
209 pcie_bus_configure_settings(child);
210 pci_bus_add_devices(bus);
211
212 return 0;
213}
214
215static const struct of_device_id versatile_pci_of_match[] = {
216 { .compatible = "arm,versatile-pci", },
217 { },
218};
219MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
220
221static struct platform_driver versatile_pci_driver = {
222 .driver = {
223 .name = "versatile-pci",
224 .of_match_table = versatile_pci_of_match,
225 .suppress_bind_attrs = true,
226 },
227 .probe = versatile_pci_probe,
228};
229module_platform_driver(versatile_pci_driver);
230
231MODULE_DESCRIPTION("Versatile PCI driver");
232MODULE_LICENSE("GPL v2");