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1Qualcomm Shared Memory Point 2 Point binding
2
3The Shared Memory Point to Point (SMP2P) protocol facilitates communication of
4a single 32-bit value between two processors. Each value has a single writer
5(the local side) and a single reader (the remote side). Values are uniquely
6identified in the system by the directed edge (local processor ID to remote
7processor ID) and a string identifier.
8
9- compatible:
10 Usage: required
11 Value type: <string>
12 Definition: must be one of:
13 "qcom,smp2p"
14
15- interrupts:
16 Usage: required
17 Value type: <prop-encoded-array>
18 Definition: one entry specifying the smp2p notification interrupt
19
20- qcom,ipc:
21 Usage: required
22 Value type: <prop-encoded-array>
23 Definition: three entries specifying the outgoing ipc bit used for
24 signaling the remote end of the smp2p edge:
25 - phandle to a syscon node representing the apcs registers
26 - u32 representing offset to the register within the syscon
27 - u32 representing the ipc bit within the register
28
29- qcom,smem:
30 Usage: required
31 Value type: <u32 array>
32 Definition: two identifiers of the inbound and outbound smem items used
33 for this edge
34
35- qcom,local-pid:
36 Usage: required
37 Value type: <u32>
38 Definition: specifies the identfier of the local endpoint of this edge
39
40- qcom,remote-pid:
41 Usage: required
42 Value type: <u32>
43 Definition: specifies the identfier of the remote endpoint of this edge
44
45= SUBNODES
46Each SMP2P pair contain a set of inbound and outbound entries, these are
47described in subnodes of the smp2p device node. The node names are not
48important.
49
50- qcom,entry-name:
51 Usage: required
52 Value type: <string>
53 Definition: specifies the name of this entry, for inbound entries this
54 will be used to match against the remotely allocated entry
55 and for outbound entries this name is used for allocating
56 entries
57
58- interrupt-controller:
59 Usage: required for incoming entries
60 Value type: <empty>
61 Definition: marks the entry as inbound; the node should be specified
62 as a two cell interrupt-controller as defined in
63 "../interrupt-controller/interrupts.txt"
64 If not specified this node will denote the outgoing entry
65
66- #interrupt-cells:
67 Usage: required for incoming entries
68 Value type: <u32>
69 Definition: must be 2 - denoting the bit in the entry and IRQ flags
70
71- #qcom,smem-state-cells:
72 Usage: required for outgoing entries
73 Value type: <u32>
74 Definition: must be 1 - denoting the bit in the entry
75
76= EXAMPLE
77The following example shows the SMP2P setup with the wireless processor,
78defined from the 8974 apps processor's point-of-view. It encompasses one
79inbound and one outbound entry:
80
81wcnss-smp2p {
82 compatible = "qcom,smp2p";
83 qcom,smem = <431>, <451>;
84
85 interrupts = <0 143 1>;
86
87 qcom,ipc = <&apcs 8 18>;
88
89 qcom,local-pid = <0>;
90 qcom,remote-pid = <4>;
91
92 wcnss_smp2p_out: master-kernel {
93 qcom,entry-name = "master-kernel";
94
95 #qcom,smem-state-cells = <1>;
96 };
97
98 wcnss_smp2p_in: slave-kernel {
99 qcom,entry-name = "slave-kernel";
100
101 interrupt-controller;
102 #interrupt-cells = <2>;
103 };
104};