Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * linux/include/linux/mmc/host.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Host driver specific definitions.
9 */
10#ifndef LINUX_MMC_HOST_H
11#define LINUX_MMC_HOST_H
12
13#include <linux/sched.h>
14#include <linux/device.h>
15#include <linux/fault-inject.h>
16
17#include <linux/mmc/core.h>
18#include <linux/mmc/card.h>
19#include <linux/mmc/pm.h>
20
21struct mmc_ios {
22 unsigned int clock; /* clock rate */
23 unsigned short vdd;
24
25/* vdd stores the bit number of the selected voltage range from below. */
26
27 unsigned char bus_mode; /* command output mode */
28
29#define MMC_BUSMODE_OPENDRAIN 1
30#define MMC_BUSMODE_PUSHPULL 2
31
32 unsigned char chip_select; /* SPI chip select */
33
34#define MMC_CS_DONTCARE 0
35#define MMC_CS_HIGH 1
36#define MMC_CS_LOW 2
37
38 unsigned char power_mode; /* power supply mode */
39
40#define MMC_POWER_OFF 0
41#define MMC_POWER_UP 1
42#define MMC_POWER_ON 2
43#define MMC_POWER_UNDEFINED 3
44
45 unsigned char bus_width; /* data bus width */
46
47#define MMC_BUS_WIDTH_1 0
48#define MMC_BUS_WIDTH_4 2
49#define MMC_BUS_WIDTH_8 3
50
51 unsigned char timing; /* timing specification used */
52
53#define MMC_TIMING_LEGACY 0
54#define MMC_TIMING_MMC_HS 1
55#define MMC_TIMING_SD_HS 2
56#define MMC_TIMING_UHS_SDR12 3
57#define MMC_TIMING_UHS_SDR25 4
58#define MMC_TIMING_UHS_SDR50 5
59#define MMC_TIMING_UHS_SDR104 6
60#define MMC_TIMING_UHS_DDR50 7
61#define MMC_TIMING_MMC_DDR52 8
62#define MMC_TIMING_MMC_HS200 9
63#define MMC_TIMING_MMC_HS400 10
64
65 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
66
67#define MMC_SIGNAL_VOLTAGE_330 0
68#define MMC_SIGNAL_VOLTAGE_180 1
69#define MMC_SIGNAL_VOLTAGE_120 2
70
71 unsigned char drv_type; /* driver type (A, B, C, D) */
72
73#define MMC_SET_DRIVER_TYPE_B 0
74#define MMC_SET_DRIVER_TYPE_A 1
75#define MMC_SET_DRIVER_TYPE_C 2
76#define MMC_SET_DRIVER_TYPE_D 3
77
78 bool enhanced_strobe; /* hs400es selection */
79};
80
81struct mmc_host;
82
83struct mmc_host_ops {
84 /*
85 * It is optional for the host to implement pre_req and post_req in
86 * order to support double buffering of requests (prepare one
87 * request while another request is active).
88 * pre_req() must always be followed by a post_req().
89 * To undo a call made to pre_req(), call post_req() with
90 * a nonzero err condition.
91 */
92 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
93 int err);
94 void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
95 void (*request)(struct mmc_host *host, struct mmc_request *req);
96
97 /*
98 * Avoid calling the next three functions too often or in a "fast
99 * path", since underlaying controller might implement them in an
100 * expensive and/or slow way. Also note that these functions might
101 * sleep, so don't call them in the atomic contexts!
102 */
103
104 /*
105 * Notes to the set_ios callback:
106 * ios->clock might be 0. For some controllers, setting 0Hz
107 * as any other frequency works. However, some controllers
108 * explicitly need to disable the clock. Otherwise e.g. voltage
109 * switching might fail because the SDCLK is not really quiet.
110 */
111 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
112
113 /*
114 * Return values for the get_ro callback should be:
115 * 0 for a read/write card
116 * 1 for a read-only card
117 * -ENOSYS when not supported (equal to NULL callback)
118 * or a negative errno value when something bad happened
119 */
120 int (*get_ro)(struct mmc_host *host);
121
122 /*
123 * Return values for the get_cd callback should be:
124 * 0 for a absent card
125 * 1 for a present card
126 * -ENOSYS when not supported (equal to NULL callback)
127 * or a negative errno value when something bad happened
128 */
129 int (*get_cd)(struct mmc_host *host);
130
131 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
132
133 /* optional callback for HC quirks */
134 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
135
136 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
137
138 /* Check if the card is pulling dat[0:3] low */
139 int (*card_busy)(struct mmc_host *host);
140
141 /* The tuning command opcode value is different for SD and eMMC cards */
142 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
143
144 /* Prepare HS400 target operating frequency depending host driver */
145 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
146 /* Prepare enhanced strobe depending host driver */
147 void (*hs400_enhanced_strobe)(struct mmc_host *host,
148 struct mmc_ios *ios);
149 int (*select_drive_strength)(struct mmc_card *card,
150 unsigned int max_dtr, int host_drv,
151 int card_drv, int *drv_type);
152 void (*hw_reset)(struct mmc_host *host);
153 void (*card_event)(struct mmc_host *host);
154
155 /*
156 * Optional callback to support controllers with HW issues for multiple
157 * I/O. Returns the number of supported blocks for the request.
158 */
159 int (*multi_io_quirk)(struct mmc_card *card,
160 unsigned int direction, int blk_size);
161};
162
163struct mmc_async_req {
164 /* active mmc request */
165 struct mmc_request *mrq;
166 /*
167 * Check error status of completed mmc request.
168 * Returns 0 if success otherwise non zero.
169 */
170 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
171};
172
173/**
174 * struct mmc_slot - MMC slot functions
175 *
176 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
177 * @handler_priv: MMC/SD-card slot context
178 *
179 * Some MMC/SD host controllers implement slot-functions like card and
180 * write-protect detection natively. However, a large number of controllers
181 * leave these functions to the CPU. This struct provides a hook to attach
182 * such slot-function drivers.
183 */
184struct mmc_slot {
185 int cd_irq;
186 void *handler_priv;
187};
188
189/**
190 * mmc_context_info - synchronization details for mmc context
191 * @is_done_rcv wake up reason was done request
192 * @is_new_req wake up reason was new request
193 * @is_waiting_last_req mmc context waiting for single running request
194 * @wait wait queue
195 */
196struct mmc_context_info {
197 bool is_done_rcv;
198 bool is_new_req;
199 bool is_waiting_last_req;
200 wait_queue_head_t wait;
201};
202
203struct regulator;
204struct mmc_pwrseq;
205
206struct mmc_supply {
207 struct regulator *vmmc; /* Card power supply */
208 struct regulator *vqmmc; /* Optional Vccq supply */
209};
210
211struct mmc_host {
212 struct device *parent;
213 struct device class_dev;
214 int index;
215 const struct mmc_host_ops *ops;
216 struct mmc_pwrseq *pwrseq;
217 unsigned int f_min;
218 unsigned int f_max;
219 unsigned int f_init;
220 u32 ocr_avail;
221 u32 ocr_avail_sdio; /* SDIO-specific OCR */
222 u32 ocr_avail_sd; /* SD-specific OCR */
223 u32 ocr_avail_mmc; /* MMC-specific OCR */
224#ifdef CONFIG_PM_SLEEP
225 struct notifier_block pm_notify;
226#endif
227 u32 max_current_330;
228 u32 max_current_300;
229 u32 max_current_180;
230
231#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
232#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
233#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
234#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
235#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
236#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
237#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
238#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
239#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
240#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
241#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
242#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
243#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
244#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
245#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
246#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
247#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
248
249 u32 caps; /* Host capabilities */
250
251#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
252#define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
253#define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
254#define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
255#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
256#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
257#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
258#define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
259#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
260#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
261#define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
262#define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */
263#define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */
264#define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */
265#define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */
266#define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */
267#define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */
268#define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */
269#define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
270#define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
271#define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
272#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
273#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
274#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
275#define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */
276#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
277#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
278
279 u32 caps2; /* More host capabilities */
280
281#define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
282#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
283#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
284#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
285#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
286 MMC_CAP2_HS200_1_2V_SDR)
287#define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */
288#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
289#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
290#define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */
291#define MMC_CAP2_PACKED_WR (1 << 13) /* Allow packed write */
292#define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \
293 MMC_CAP2_PACKED_WR)
294#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
295#define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
296#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
297#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
298 MMC_CAP2_HS400_1_2V)
299#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
300#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
301#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
302#define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */
303#define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */
304#define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */
305#define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
306
307 mmc_pm_flag_t pm_caps; /* supported pm features */
308
309 /* host specific block data */
310 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
311 unsigned short max_segs; /* see blk_queue_max_segments */
312 unsigned short unused;
313 unsigned int max_req_size; /* maximum number of bytes in one req */
314 unsigned int max_blk_size; /* maximum size of one mmc block */
315 unsigned int max_blk_count; /* maximum number of blocks in one req */
316 unsigned int max_busy_timeout; /* max busy timeout in ms */
317
318 /* private data */
319 spinlock_t lock; /* lock for claim and bus ops */
320
321 struct mmc_ios ios; /* current io bus settings */
322
323 /* group bitfields together to minimize padding */
324 unsigned int use_spi_crc:1;
325 unsigned int claimed:1; /* host exclusively claimed */
326 unsigned int bus_dead:1; /* bus has been released */
327#ifdef CONFIG_MMC_DEBUG
328 unsigned int removed:1; /* host is being removed */
329#endif
330 unsigned int can_retune:1; /* re-tuning can be used */
331 unsigned int doing_retune:1; /* re-tuning in progress */
332 unsigned int retune_now:1; /* do re-tuning at next req */
333 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
334
335 int rescan_disable; /* disable card detection */
336 int rescan_entered; /* used with nonremovable devices */
337
338 int need_retune; /* re-tuning is needed */
339 int hold_retune; /* hold off re-tuning */
340 unsigned int retune_period; /* re-tuning period in secs */
341 struct timer_list retune_timer; /* for periodic re-tuning */
342
343 bool trigger_card_event; /* card_event necessary */
344
345 struct mmc_card *card; /* device attached to this host */
346
347 wait_queue_head_t wq;
348 struct task_struct *claimer; /* task that has host claimed */
349 int claim_cnt; /* "claim" nesting count */
350
351 struct delayed_work detect;
352 int detect_change; /* card detect flag */
353 struct mmc_slot slot;
354
355 const struct mmc_bus_ops *bus_ops; /* current bus driver */
356 unsigned int bus_refs; /* reference counter */
357
358 unsigned int sdio_irqs;
359 struct task_struct *sdio_irq_thread;
360 bool sdio_irq_pending;
361 atomic_t sdio_irq_thread_abort;
362
363 mmc_pm_flag_t pm_flags; /* requested pm features */
364
365 struct led_trigger *led; /* activity led */
366
367#ifdef CONFIG_REGULATOR
368 bool regulator_enabled; /* regulator state */
369#endif
370 struct mmc_supply supply;
371
372 struct dentry *debugfs_root;
373
374 struct mmc_async_req *areq; /* active async req */
375 struct mmc_context_info context_info; /* async synchronization info */
376
377 /* Ongoing data transfer that allows commands during transfer */
378 struct mmc_request *ongoing_mrq;
379
380#ifdef CONFIG_FAIL_MMC_REQUEST
381 struct fault_attr fail_mmc_request;
382#endif
383
384 unsigned int actual_clock; /* Actual HC clock rate */
385
386 unsigned int slotno; /* used for sdio acpi binding */
387
388 int dsr_req; /* DSR value is valid */
389 u32 dsr; /* optional driver stage (DSR) value */
390
391 unsigned long private[0] ____cacheline_aligned;
392};
393
394struct device_node;
395
396struct mmc_host *mmc_alloc_host(int extra, struct device *);
397int mmc_add_host(struct mmc_host *);
398void mmc_remove_host(struct mmc_host *);
399void mmc_free_host(struct mmc_host *);
400int mmc_of_parse(struct mmc_host *host);
401int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
402
403static inline void *mmc_priv(struct mmc_host *host)
404{
405 return (void *)host->private;
406}
407
408#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
409
410#define mmc_dev(x) ((x)->parent)
411#define mmc_classdev(x) (&(x)->class_dev)
412#define mmc_hostname(x) (dev_name(&(x)->class_dev))
413
414int mmc_power_save_host(struct mmc_host *host);
415int mmc_power_restore_host(struct mmc_host *host);
416
417void mmc_detect_change(struct mmc_host *, unsigned long delay);
418void mmc_request_done(struct mmc_host *, struct mmc_request *);
419void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
420
421static inline void mmc_signal_sdio_irq(struct mmc_host *host)
422{
423 host->ops->enable_sdio_irq(host, 0);
424 host->sdio_irq_pending = true;
425 if (host->sdio_irq_thread)
426 wake_up_process(host->sdio_irq_thread);
427}
428
429void sdio_run_irqs(struct mmc_host *host);
430
431#ifdef CONFIG_REGULATOR
432int mmc_regulator_get_ocrmask(struct regulator *supply);
433int mmc_regulator_set_ocr(struct mmc_host *mmc,
434 struct regulator *supply,
435 unsigned short vdd_bit);
436int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
437#else
438static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
439{
440 return 0;
441}
442
443static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
444 struct regulator *supply,
445 unsigned short vdd_bit)
446{
447 return 0;
448}
449
450static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
451 struct mmc_ios *ios)
452{
453 return -EINVAL;
454}
455#endif
456
457u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
458int mmc_regulator_get_supply(struct mmc_host *mmc);
459
460static inline int mmc_card_is_removable(struct mmc_host *host)
461{
462 return !(host->caps & MMC_CAP_NONREMOVABLE);
463}
464
465static inline int mmc_card_keep_power(struct mmc_host *host)
466{
467 return host->pm_flags & MMC_PM_KEEP_POWER;
468}
469
470static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
471{
472 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
473}
474
475/* TODO: Move to private header */
476static inline int mmc_card_hs(struct mmc_card *card)
477{
478 return card->host->ios.timing == MMC_TIMING_SD_HS ||
479 card->host->ios.timing == MMC_TIMING_MMC_HS;
480}
481
482/* TODO: Move to private header */
483static inline int mmc_card_uhs(struct mmc_card *card)
484{
485 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
486 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
487}
488
489void mmc_retune_timer_stop(struct mmc_host *host);
490
491static inline void mmc_retune_needed(struct mmc_host *host)
492{
493 if (host->can_retune)
494 host->need_retune = 1;
495}
496
497static inline bool mmc_can_retune(struct mmc_host *host)
498{
499 return host->can_retune == 1;
500}
501
502int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
503int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
504
505#endif /* LINUX_MMC_HOST_H */