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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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1Rockchip SoC RK3288 10/100/1000 Ethernet driver(GMAC)
2
3The device node has following properties.
4
5Required properties:
6 - compatible: should be "rockchip,<name>-gamc"
7 "rockchip,rk3228-gmac": found on RK322x SoCs
8 "rockchip,rk3288-gmac": found on RK3288 SoCs
9 "rockchip,rk3328-gmac": found on RK3328 SoCs
10 "rockchip,rk3366-gmac": found on RK3366 SoCs
11 "rockchip,rk3368-gmac": found on RK3368 SoCs
12 "rockchip,rk3399-gmac": found on RK3399 SoCs
13 - reg: addresses and length of the register sets for the device.
14 - interrupts: Should contain the GMAC interrupts.
15 - interrupt-names: Should contain the interrupt names "macirq".
16 - rockchip,grf: phandle to the syscon grf used to control speed and mode.
17 - clocks: <&cru SCLK_MAC>: clock selector for main clock, from PLL or PHY.
18 <&cru SCLK_MAC_PLL>: PLL clock for SCLK_MAC
19 <&cru SCLK_MAC_RX>: clock gate for RX
20 <&cru SCLK_MAC_TX>: clock gate for TX
21 <&cru SCLK_MACREF>: clock gate for RMII referce clock
22 <&cru SCLK_MACREF_OUT> clock gate for RMII reference clock output
23 <&cru ACLK_GMAC>: AXI clock gate for GMAC
24 <&cru PCLK_GMAC>: APB clock gate for GMAC
25 - clock-names: One name for each entry in the clocks property.
26 - phy-mode: See ethernet.txt file in the same directory.
27 - pinctrl-names: Names corresponding to the numbered pinctrl states.
28 - pinctrl-0: pin-control mode. can be <&rgmii_pins> or <&rmii_pins>.
29 - clock_in_out: For RGMII, it must be "input", means main clock(125MHz)
30 is not sourced from SoC's PLL, but input from PHY; For RMII, "input" means
31 PHY provides the reference clock(50MHz), "output" means GMAC provides the
32 reference clock.
33 - snps,reset-gpio gpio number for phy reset.
34 - snps,reset-active-low boolean flag to indicate if phy reset is active low.
35 - assigned-clocks: main clock, should be <&cru SCLK_MAC>;
36 - assigned-clock-parents = parent of main clock.
37 can be <&ext_gmac> or <&cru SCLK_MAC_PLL>.
38
39Optional properties:
40 - tx_delay: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
41 - rx_delay: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
42 - phy-supply: phandle to a regulator if the PHY needs one
43
44Example:
45
46gmac: ethernet@ff290000 {
47 compatible = "rockchip,rk3288-gmac";
48 reg = <0xff290000 0x10000>;
49 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
50 interrupt-names = "macirq";
51 rockchip,grf = <&grf>;
52 clocks = <&cru SCLK_MAC>,
53 <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>,
54 <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>,
55 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>;
56 clock-names = "stmmaceth",
57 "mac_clk_rx", "mac_clk_tx",
58 "clk_mac_ref", "clk_mac_refout",
59 "aclk_mac", "pclk_mac";
60 phy-mode = "rgmii";
61 pinctrl-names = "default";
62 pinctrl-0 = <&rgmii_pins /*&rmii_pins*/>;
63
64 clock_in_out = "input";
65 snps,reset-gpio = <&gpio4 7 0>;
66 snps,reset-active-low;
67
68 assigned-clocks = <&cru SCLK_MAC>;
69 assigned-clock-parents = <&ext_gmac>;
70 tx_delay = <0x30>;
71 rx_delay = <0x10>;
72
73 status = "ok";
74};