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1/* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2004, 2005, 2006, 2008 Thiemo Seufer 7 * Copyright (C) 2005 Maciej W. Rozycki 8 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) 9 * Copyright (C) 2012, 2013 MIPS Technologies, Inc. All rights reserved. 10 */ 11 12#ifndef __ASM_UASM_H 13#define __ASM_UASM_H 14 15#include <linux/types.h> 16 17#ifdef CONFIG_EXPORT_UASM 18#include <linux/export.h> 19#define UASM_EXPORT_SYMBOL(sym) EXPORT_SYMBOL(sym) 20#else 21#define UASM_EXPORT_SYMBOL(sym) 22#endif 23 24#define _UASM_ISA_CLASSIC 0 25#define _UASM_ISA_MICROMIPS 1 26 27#ifndef UASM_ISA 28#ifdef CONFIG_CPU_MICROMIPS 29#define UASM_ISA _UASM_ISA_MICROMIPS 30#else 31#define UASM_ISA _UASM_ISA_CLASSIC 32#endif 33#endif 34 35#if (UASM_ISA == _UASM_ISA_CLASSIC) 36#ifdef CONFIG_CPU_MICROMIPS 37#define ISAOPC(op) CL_uasm_i##op 38#define ISAFUNC(x) CL_##x 39#else 40#define ISAOPC(op) uasm_i##op 41#define ISAFUNC(x) x 42#endif 43#elif (UASM_ISA == _UASM_ISA_MICROMIPS) 44#ifdef CONFIG_CPU_MICROMIPS 45#define ISAOPC(op) uasm_i##op 46#define ISAFUNC(x) x 47#else 48#define ISAOPC(op) MM_uasm_i##op 49#define ISAFUNC(x) MM_##x 50#endif 51#else 52#error Unsupported micro-assembler ISA!!! 53#endif 54 55#define Ip_u1u2u3(op) \ 56void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c) 57 58#define Ip_u2u1u3(op) \ 59void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c) 60 61#define Ip_u3u2u1(op) \ 62void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c) 63 64#define Ip_u3u1u2(op) \ 65void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c) 66 67#define Ip_u1u2s3(op) \ 68void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c) 69 70#define Ip_u2s3u1(op) \ 71void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c) 72 73#define Ip_s3s1s2(op) \ 74void ISAOPC(op)(u32 **buf, int a, int b, int c) 75 76#define Ip_u2u1s3(op) \ 77void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c) 78 79#define Ip_u2u1msbu3(op) \ 80void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \ 81 unsigned int d) 82 83#define Ip_u1u2(op) \ 84void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b) 85 86#define Ip_u2u1(op) \ 87void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b) 88 89#define Ip_u1s2(op) \ 90void ISAOPC(op)(u32 **buf, unsigned int a, signed int b) 91 92#define Ip_u1(op) void ISAOPC(op)(u32 **buf, unsigned int a) 93 94#define Ip_0(op) void ISAOPC(op)(u32 **buf) 95 96Ip_u2u1s3(_addiu); 97Ip_u3u1u2(_addu); 98Ip_u3u1u2(_and); 99Ip_u2u1u3(_andi); 100Ip_u1u2s3(_bbit0); 101Ip_u1u2s3(_bbit1); 102Ip_u1u2s3(_beq); 103Ip_u1u2s3(_beql); 104Ip_u1s2(_bgez); 105Ip_u1s2(_bgezl); 106Ip_u1s2(_bltz); 107Ip_u1s2(_bltzl); 108Ip_u1u2s3(_bne); 109Ip_u2s3u1(_cache); 110Ip_u1u2(_cfc1); 111Ip_u2u1(_cfcmsa); 112Ip_u1u2(_ctc1); 113Ip_u2u1(_ctcmsa); 114Ip_u2u1s3(_daddiu); 115Ip_u3u1u2(_daddu); 116Ip_u1(_di); 117Ip_u2u1msbu3(_dins); 118Ip_u2u1msbu3(_dinsm); 119Ip_u1u2(_divu); 120Ip_u1u2u3(_dmfc0); 121Ip_u1u2u3(_dmtc0); 122Ip_u2u1u3(_drotr); 123Ip_u2u1u3(_drotr32); 124Ip_u2u1u3(_dsll); 125Ip_u2u1u3(_dsll32); 126Ip_u2u1u3(_dsra); 127Ip_u2u1u3(_dsrl); 128Ip_u2u1u3(_dsrl32); 129Ip_u3u1u2(_dsubu); 130Ip_0(_eret); 131Ip_u2u1msbu3(_ext); 132Ip_u2u1msbu3(_ins); 133Ip_u1(_j); 134Ip_u1(_jal); 135Ip_u2u1(_jalr); 136Ip_u1(_jr); 137Ip_u2s3u1(_lb); 138Ip_u2s3u1(_ld); 139Ip_u3u1u2(_ldx); 140Ip_u2s3u1(_lh); 141Ip_u2s3u1(_ll); 142Ip_u2s3u1(_lld); 143Ip_u1s2(_lui); 144Ip_u2s3u1(_lw); 145Ip_u3u1u2(_lwx); 146Ip_u1u2u3(_mfc0); 147Ip_u1u2u3(_mfhc0); 148Ip_u1(_mfhi); 149Ip_u1(_mflo); 150Ip_u1u2u3(_mtc0); 151Ip_u1u2u3(_mthc0); 152Ip_u1(_mthi); 153Ip_u1(_mtlo); 154Ip_u3u1u2(_mul); 155Ip_u3u1u2(_or); 156Ip_u2u1u3(_ori); 157Ip_u2s3u1(_pref); 158Ip_0(_rfe); 159Ip_u2u1u3(_rotr); 160Ip_u2s3u1(_sc); 161Ip_u2s3u1(_scd); 162Ip_u2s3u1(_sd); 163Ip_u2u1u3(_sll); 164Ip_u3u2u1(_sllv); 165Ip_s3s1s2(_slt); 166Ip_u2u1s3(_sltiu); 167Ip_u3u1u2(_sltu); 168Ip_u2u1u3(_sra); 169Ip_u2u1u3(_srl); 170Ip_u3u2u1(_srlv); 171Ip_u3u1u2(_subu); 172Ip_u2s3u1(_sw); 173Ip_u1(_sync); 174Ip_u1(_syscall); 175Ip_0(_tlbp); 176Ip_0(_tlbr); 177Ip_0(_tlbwi); 178Ip_0(_tlbwr); 179Ip_u1(_wait); 180Ip_u2u1(_wsbh); 181Ip_u3u1u2(_xor); 182Ip_u2u1u3(_xori); 183Ip_u2u1(_yield); 184Ip_u1u2(_ldpte); 185Ip_u2u1u3(_lddir); 186 187/* Handle labels. */ 188struct uasm_label { 189 u32 *addr; 190 int lab; 191}; 192 193void ISAFUNC(uasm_build_label)(struct uasm_label **lab, u32 *addr, 194 int lid); 195#ifdef CONFIG_64BIT 196int ISAFUNC(uasm_in_compat_space_p)(long addr); 197#endif 198int ISAFUNC(uasm_rel_hi)(long val); 199int ISAFUNC(uasm_rel_lo)(long val); 200void ISAFUNC(UASM_i_LA_mostly)(u32 **buf, unsigned int rs, long addr); 201void ISAFUNC(UASM_i_LA)(u32 **buf, unsigned int rs, long addr); 202 203#define UASM_L_LA(lb) \ 204static inline void ISAFUNC(uasm_l##lb)(struct uasm_label **lab, u32 *addr) \ 205{ \ 206 ISAFUNC(uasm_build_label)(lab, addr, label##lb); \ 207} 208 209/* convenience macros for instructions */ 210#ifdef CONFIG_64BIT 211# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_daddiu(buf, rs, rt, val) 212# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_daddu(buf, rs, rt, rd) 213# define UASM_i_LL(buf, rs, rt, off) uasm_i_lld(buf, rs, rt, off) 214# define UASM_i_LW(buf, rs, rt, off) uasm_i_ld(buf, rs, rt, off) 215# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_ldx(buf, rs, rt, rd) 216# define UASM_i_MFC0(buf, rt, rd...) uasm_i_dmfc0(buf, rt, rd) 217# define UASM_i_MTC0(buf, rt, rd...) uasm_i_dmtc0(buf, rt, rd) 218# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_drotr(buf, rs, rt, sh) 219# define UASM_i_SC(buf, rs, rt, off) uasm_i_scd(buf, rs, rt, off) 220# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_dsll(buf, rs, rt, sh) 221# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_dsra(buf, rs, rt, sh) 222# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_dsrl(buf, rs, rt, sh) 223# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_dsrl_safe(buf, rs, rt, sh) 224# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_dsubu(buf, rs, rt, rd) 225# define UASM_i_SW(buf, rs, rt, off) uasm_i_sd(buf, rs, rt, off) 226#else 227# define UASM_i_ADDIU(buf, rs, rt, val) uasm_i_addiu(buf, rs, rt, val) 228# define UASM_i_ADDU(buf, rs, rt, rd) uasm_i_addu(buf, rs, rt, rd) 229# define UASM_i_LL(buf, rs, rt, off) uasm_i_ll(buf, rs, rt, off) 230# define UASM_i_LW(buf, rs, rt, off) uasm_i_lw(buf, rs, rt, off) 231# define UASM_i_LWX(buf, rs, rt, rd) uasm_i_lwx(buf, rs, rt, rd) 232# define UASM_i_MFC0(buf, rt, rd...) uasm_i_mfc0(buf, rt, rd) 233# define UASM_i_MTC0(buf, rt, rd...) uasm_i_mtc0(buf, rt, rd) 234# define UASM_i_ROTR(buf, rs, rt, sh) uasm_i_rotr(buf, rs, rt, sh) 235# define UASM_i_SC(buf, rs, rt, off) uasm_i_sc(buf, rs, rt, off) 236# define UASM_i_SLL(buf, rs, rt, sh) uasm_i_sll(buf, rs, rt, sh) 237# define UASM_i_SRA(buf, rs, rt, sh) uasm_i_sra(buf, rs, rt, sh) 238# define UASM_i_SRL(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) 239# define UASM_i_SRL_SAFE(buf, rs, rt, sh) uasm_i_srl(buf, rs, rt, sh) 240# define UASM_i_SUBU(buf, rs, rt, rd) uasm_i_subu(buf, rs, rt, rd) 241# define UASM_i_SW(buf, rs, rt, off) uasm_i_sw(buf, rs, rt, off) 242#endif 243 244#define uasm_i_b(buf, off) uasm_i_beq(buf, 0, 0, off) 245#define uasm_i_beqz(buf, rs, off) uasm_i_beq(buf, rs, 0, off) 246#define uasm_i_beqzl(buf, rs, off) uasm_i_beql(buf, rs, 0, off) 247#define uasm_i_bnez(buf, rs, off) uasm_i_bne(buf, rs, 0, off) 248#define uasm_i_bnezl(buf, rs, off) uasm_i_bnel(buf, rs, 0, off) 249#define uasm_i_ehb(buf) uasm_i_sll(buf, 0, 0, 3) 250#define uasm_i_move(buf, a, b) UASM_i_ADDU(buf, a, 0, b) 251#define uasm_i_nop(buf) uasm_i_sll(buf, 0, 0, 0) 252#define uasm_i_ssnop(buf) uasm_i_sll(buf, 0, 0, 1) 253 254static inline void uasm_i_drotr_safe(u32 **p, unsigned int a1, 255 unsigned int a2, unsigned int a3) 256{ 257 if (a3 < 32) 258 ISAOPC(_drotr)(p, a1, a2, a3); 259 else 260 ISAOPC(_drotr32)(p, a1, a2, a3 - 32); 261} 262 263static inline void uasm_i_dsll_safe(u32 **p, unsigned int a1, 264 unsigned int a2, unsigned int a3) 265{ 266 if (a3 < 32) 267 ISAOPC(_dsll)(p, a1, a2, a3); 268 else 269 ISAOPC(_dsll32)(p, a1, a2, a3 - 32); 270} 271 272static inline void uasm_i_dsrl_safe(u32 **p, unsigned int a1, 273 unsigned int a2, unsigned int a3) 274{ 275 if (a3 < 32) 276 ISAOPC(_dsrl)(p, a1, a2, a3); 277 else 278 ISAOPC(_dsrl32)(p, a1, a2, a3 - 32); 279} 280 281/* Handle relocations. */ 282struct uasm_reloc { 283 u32 *addr; 284 unsigned int type; 285 int lab; 286}; 287 288/* This is zero so we can use zeroed label arrays. */ 289#define UASM_LABEL_INVALID 0 290 291void uasm_r_mips_pc16(struct uasm_reloc **rel, u32 *addr, int lid); 292void uasm_resolve_relocs(struct uasm_reloc *rel, struct uasm_label *lab); 293void uasm_move_relocs(struct uasm_reloc *rel, u32 *first, u32 *end, long off); 294void uasm_move_labels(struct uasm_label *lab, u32 *first, u32 *end, long off); 295void uasm_copy_handler(struct uasm_reloc *rel, struct uasm_label *lab, 296 u32 *first, u32 *end, u32 *target); 297int uasm_insn_has_bdelay(struct uasm_reloc *rel, u32 *addr); 298 299/* Convenience functions for labeled branches. */ 300void uasm_il_b(u32 **p, struct uasm_reloc **r, int lid); 301void uasm_il_bbit0(u32 **p, struct uasm_reloc **r, unsigned int reg, 302 unsigned int bit, int lid); 303void uasm_il_bbit1(u32 **p, struct uasm_reloc **r, unsigned int reg, 304 unsigned int bit, int lid); 305void uasm_il_beq(u32 **p, struct uasm_reloc **r, unsigned int r1, 306 unsigned int r2, int lid); 307void uasm_il_beqz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 308void uasm_il_beqzl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 309void uasm_il_bgezl(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 310void uasm_il_bgez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 311void uasm_il_bltz(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 312void uasm_il_bne(u32 **p, struct uasm_reloc **r, unsigned int reg1, 313 unsigned int reg2, int lid); 314void uasm_il_bnez(u32 **p, struct uasm_reloc **r, unsigned int reg, int lid); 315 316#endif /* __ASM_UASM_H */