tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Driver for EIP97 cryptographic accelerator.
3 *
4 * Copyright (c) 2016 Ryder Lee <ryder.lee@mediatek.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#ifndef __MTK_PLATFORM_H_
13#define __MTK_PLATFORM_H_
14
15#include <crypto/algapi.h>
16#include <crypto/internal/aead.h>
17#include <crypto/internal/hash.h>
18#include <crypto/scatterwalk.h>
19#include <crypto/skcipher.h>
20#include <linux/crypto.h>
21#include <linux/dma-mapping.h>
22#include <linux/interrupt.h>
23#include <linux/scatterlist.h>
24#include "mtk-regs.h"
25
26#define MTK_RDR_PROC_THRESH BIT(0)
27#define MTK_RDR_PROC_MODE BIT(23)
28#define MTK_CNT_RST BIT(31)
29#define MTK_IRQ_RDR0 BIT(1)
30#define MTK_IRQ_RDR1 BIT(3)
31#define MTK_IRQ_RDR2 BIT(5)
32#define MTK_IRQ_RDR3 BIT(7)
33
34#define SIZE_IN_WORDS(x) ((x) >> 2)
35
36/**
37 * Ring 0/1 are used by AES encrypt and decrypt.
38 * Ring 2/3 are used by SHA.
39 */
40enum {
41 RING0 = 0,
42 RING1,
43 RING2,
44 RING3,
45 RING_MAX,
46};
47
48#define MTK_REC_NUM (RING_MAX / 2)
49#define MTK_IRQ_NUM 5
50
51/**
52 * struct mtk_desc - DMA descriptor
53 * @hdr: the descriptor control header
54 * @buf: DMA address of input buffer segment
55 * @ct: DMA address of command token that control operation flow
56 * @ct_hdr: the command token control header
57 * @tag: the user-defined field
58 * @tfm: DMA address of transform state
59 * @bound: align descriptors offset boundary
60 *
61 * Structure passed to the crypto engine to describe where source
62 * data needs to be fetched and how it needs to be processed.
63 */
64struct mtk_desc {
65 __le32 hdr;
66 __le32 buf;
67 __le32 ct;
68 __le32 ct_hdr;
69 __le32 tag;
70 __le32 tfm;
71 __le32 bound[2];
72};
73
74#define MTK_DESC_NUM 512
75#define MTK_DESC_OFF SIZE_IN_WORDS(sizeof(struct mtk_desc))
76#define MTK_DESC_SZ (MTK_DESC_OFF - 2)
77#define MTK_DESC_RING_SZ ((sizeof(struct mtk_desc) * MTK_DESC_NUM))
78#define MTK_DESC_CNT(x) ((MTK_DESC_OFF * (x)) << 2)
79#define MTK_DESC_LAST cpu_to_le32(BIT(22))
80#define MTK_DESC_FIRST cpu_to_le32(BIT(23))
81#define MTK_DESC_BUF_LEN(x) cpu_to_le32(x)
82#define MTK_DESC_CT_LEN(x) cpu_to_le32((x) << 24)
83
84/**
85 * struct mtk_ring - Descriptor ring
86 * @cmd_base: pointer to command descriptor ring base
87 * @cmd_dma: DMA address of command descriptor ring
88 * @cmd_pos: current position in the command descriptor ring
89 * @res_base: pointer to result descriptor ring base
90 * @res_dma: DMA address of result descriptor ring
91 * @res_pos: current position in the result descriptor ring
92 *
93 * A descriptor ring is a circular buffer that is used to manage
94 * one or more descriptors. There are two type of descriptor rings;
95 * the command descriptor ring and result descriptor ring.
96 */
97struct mtk_ring {
98 struct mtk_desc *cmd_base;
99 dma_addr_t cmd_dma;
100 u32 cmd_pos;
101 struct mtk_desc *res_base;
102 dma_addr_t res_dma;
103 u32 res_pos;
104};
105
106/**
107 * struct mtk_aes_dma - Structure that holds sg list info
108 * @sg: pointer to scatter-gather list
109 * @nents: number of entries in the sg list
110 * @remainder: remainder of sg list
111 * @sg_len: number of entries in the sg mapped list
112 */
113struct mtk_aes_dma {
114 struct scatterlist *sg;
115 int nents;
116 u32 remainder;
117 u32 sg_len;
118};
119
120struct mtk_aes_base_ctx;
121struct mtk_aes_rec;
122struct mtk_cryp;
123
124typedef int (*mtk_aes_fn)(struct mtk_cryp *cryp, struct mtk_aes_rec *aes);
125
126/**
127 * struct mtk_aes_rec - AES operation record
128 * @queue: crypto request queue
129 * @areq: pointer to async request
130 * @task: the tasklet is use in AES interrupt
131 * @ctx: pointer to current context
132 * @src: the structure that holds source sg list info
133 * @dst: the structure that holds destination sg list info
134 * @aligned_sg: the scatter list is use to alignment
135 * @real_dst: pointer to the destination sg list
136 * @resume: pointer to resume function
137 * @total: request buffer length
138 * @buf: pointer to page buffer
139 * @id: record identification
140 * @flags: it's describing AES operation state
141 * @lock: the async queue lock
142 *
143 * Structure used to record AES execution state.
144 */
145struct mtk_aes_rec {
146 struct crypto_queue queue;
147 struct crypto_async_request *areq;
148 struct tasklet_struct task;
149 struct mtk_aes_base_ctx *ctx;
150 struct mtk_aes_dma src;
151 struct mtk_aes_dma dst;
152
153 struct scatterlist aligned_sg;
154 struct scatterlist *real_dst;
155
156 mtk_aes_fn resume;
157
158 size_t total;
159 void *buf;
160
161 u8 id;
162 unsigned long flags;
163 /* queue lock */
164 spinlock_t lock;
165};
166
167/**
168 * struct mtk_sha_rec - SHA operation record
169 * @queue: crypto request queue
170 * @req: pointer to ahash request
171 * @task: the tasklet is use in SHA interrupt
172 * @id: record identification
173 * @flags: it's describing SHA operation state
174 * @lock: the ablkcipher queue lock
175 *
176 * Structure used to record SHA execution state.
177 */
178struct mtk_sha_rec {
179 struct crypto_queue queue;
180 struct ahash_request *req;
181 struct tasklet_struct task;
182
183 u8 id;
184 unsigned long flags;
185 /* queue lock */
186 spinlock_t lock;
187};
188
189/**
190 * struct mtk_cryp - Cryptographic device
191 * @base: pointer to mapped register I/O base
192 * @dev: pointer to device
193 * @clk_ethif: pointer to ethif clock
194 * @clk_cryp: pointer to crypto clock
195 * @irq: global system and rings IRQ
196 * @ring: pointer to execution state of AES
197 * @aes: pointer to execution state of SHA
198 * @sha: each execution record map to a ring
199 * @aes_list: device list of AES
200 * @sha_list: device list of SHA
201 * @tmp: pointer to temporary buffer for internal use
202 * @tmp_dma: DMA address of temporary buffer
203 * @rec: it's used to select SHA record for tfm
204 *
205 * Structure storing cryptographic device information.
206 */
207struct mtk_cryp {
208 void __iomem *base;
209 struct device *dev;
210 struct clk *clk_ethif;
211 struct clk *clk_cryp;
212 int irq[MTK_IRQ_NUM];
213
214 struct mtk_ring *ring[RING_MAX];
215 struct mtk_aes_rec *aes[MTK_REC_NUM];
216 struct mtk_sha_rec *sha[MTK_REC_NUM];
217
218 struct list_head aes_list;
219 struct list_head sha_list;
220
221 void *tmp;
222 dma_addr_t tmp_dma;
223 bool rec;
224};
225
226int mtk_cipher_alg_register(struct mtk_cryp *cryp);
227void mtk_cipher_alg_release(struct mtk_cryp *cryp);
228int mtk_hash_alg_register(struct mtk_cryp *cryp);
229void mtk_hash_alg_release(struct mtk_cryp *cryp);
230
231#endif /* __MTK_PLATFORM_H_ */