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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/*
2 * ARConnect IP Support (Multi core enabler: Cross core IPI, RTC ...)
3 *
4 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __SOC_ARC_MCIP_H
12#define __SOC_ARC_MCIP_H
13
14#include <soc/arc/aux.h>
15
16#define ARC_REG_MCIP_BCR 0x0d0
17#define ARC_REG_MCIP_IDU_BCR 0x0D5
18#define ARC_REG_MCIP_CMD 0x600
19#define ARC_REG_MCIP_WDATA 0x601
20#define ARC_REG_MCIP_READBACK 0x602
21
22struct mcip_cmd {
23#ifdef CONFIG_CPU_BIG_ENDIAN
24 unsigned int pad:8, param:16, cmd:8;
25#else
26 unsigned int cmd:8, param:16, pad:8;
27#endif
28
29#define CMD_INTRPT_GENERATE_IRQ 0x01
30#define CMD_INTRPT_GENERATE_ACK 0x02
31#define CMD_INTRPT_READ_STATUS 0x03
32#define CMD_INTRPT_CHECK_SOURCE 0x04
33
34/* Semaphore Commands */
35#define CMD_SEMA_CLAIM_AND_READ 0x11
36#define CMD_SEMA_RELEASE 0x12
37
38#define CMD_DEBUG_SET_MASK 0x34
39#define CMD_DEBUG_SET_SELECT 0x36
40
41#define CMD_GFRC_READ_LO 0x42
42#define CMD_GFRC_READ_HI 0x43
43
44#define CMD_IDU_ENABLE 0x71
45#define CMD_IDU_DISABLE 0x72
46#define CMD_IDU_SET_MODE 0x74
47#define CMD_IDU_SET_DEST 0x76
48#define CMD_IDU_SET_MASK 0x7C
49
50#define IDU_M_TRIG_LEVEL 0x0
51#define IDU_M_TRIG_EDGE 0x1
52
53#define IDU_M_DISTRI_RR 0x0
54#define IDU_M_DISTRI_DEST 0x2
55};
56
57struct mcip_bcr {
58#ifdef CONFIG_CPU_BIG_ENDIAN
59 unsigned int pad4:6, pw_dom:1, pad3:1,
60 idu:1, pad2:1, num_cores:6,
61 pad:1, gfrc:1, dbg:1, pw:1,
62 msg:1, sem:1, ipi:1, slv:1,
63 ver:8;
64#else
65 unsigned int ver:8,
66 slv:1, ipi:1, sem:1, msg:1,
67 pw:1, dbg:1, gfrc:1, pad:1,
68 num_cores:6, pad2:1, idu:1,
69 pad3:1, pw_dom:1, pad4:6;
70#endif
71};
72
73struct mcip_idu_bcr {
74#ifdef CONFIG_CPU_BIG_ENDIAN
75 unsigned int pad:21, cirqnum:3, ver:8;
76#else
77 unsigned int ver:8, cirqnum:3, pad:21;
78#endif
79};
80
81
82/*
83 * Build register for IDU contains not an actual number of supported common
84 * interrupts but an exponent of 2 which must be multiplied by 4 to
85 * get a number of supported common interrupts.
86 */
87#define mcip_idu_bcr_to_nr_irqs(bcr) (4 * (1 << (bcr).cirqnum))
88
89/*
90 * MCIP programming model
91 *
92 * - Simple commands write {cmd:8,param:16} to MCIP_CMD aux reg
93 * (param could be irq, common_irq, core_id ...)
94 * - More involved commands setup MCIP_WDATA with cmd specific data
95 * before invoking the simple command
96 */
97static inline void __mcip_cmd(unsigned int cmd, unsigned int param)
98{
99 struct mcip_cmd buf;
100
101 buf.pad = 0;
102 buf.cmd = cmd;
103 buf.param = param;
104
105 WRITE_AUX(ARC_REG_MCIP_CMD, buf);
106}
107
108/*
109 * Setup additional data for a cmd
110 * Callers need to lock to ensure atomicity
111 */
112static inline void __mcip_cmd_data(unsigned int cmd, unsigned int param,
113 unsigned int data)
114{
115 write_aux_reg(ARC_REG_MCIP_WDATA, data);
116
117 __mcip_cmd(cmd, param);
118}
119
120#endif