tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __MSM_DRV_H__
19#define __MSM_DRV_H__
20
21#include <linux/kernel.h>
22#include <linux/clk.h>
23#include <linux/cpufreq.h>
24#include <linux/module.h>
25#include <linux/component.h>
26#include <linux/platform_device.h>
27#include <linux/pm.h>
28#include <linux/pm_runtime.h>
29#include <linux/slab.h>
30#include <linux/list.h>
31#include <linux/iommu.h>
32#include <linux/types.h>
33#include <linux/of_graph.h>
34#include <linux/of_device.h>
35#include <asm/sizes.h>
36
37#include <drm/drmP.h>
38#include <drm/drm_atomic.h>
39#include <drm/drm_atomic_helper.h>
40#include <drm/drm_crtc_helper.h>
41#include <drm/drm_plane_helper.h>
42#include <drm/drm_fb_helper.h>
43#include <drm/msm_drm.h>
44#include <drm/drm_gem.h>
45
46struct msm_kms;
47struct msm_gpu;
48struct msm_mmu;
49struct msm_mdss;
50struct msm_rd_state;
51struct msm_perf_state;
52struct msm_gem_submit;
53struct msm_fence_context;
54struct msm_fence_cb;
55struct msm_gem_address_space;
56struct msm_gem_vma;
57
58#define NUM_DOMAINS 2 /* one for KMS, then one per gpu core (?) */
59
60struct msm_file_private {
61 /* currently we don't do anything useful with this.. but when
62 * per-context address spaces are supported we'd keep track of
63 * the context's page-tables here.
64 */
65 int dummy;
66};
67
68enum msm_mdp_plane_property {
69 PLANE_PROP_ZPOS,
70 PLANE_PROP_ALPHA,
71 PLANE_PROP_PREMULTIPLIED,
72 PLANE_PROP_MAX_NUM
73};
74
75struct msm_vblank_ctrl {
76 struct work_struct work;
77 struct list_head event_list;
78 spinlock_t lock;
79};
80
81struct msm_drm_private {
82
83 struct drm_device *dev;
84
85 struct msm_kms *kms;
86
87 /* subordinate devices, if present: */
88 struct platform_device *gpu_pdev;
89
90 /* top level MDSS wrapper device (for MDP5 only) */
91 struct msm_mdss *mdss;
92
93 /* possibly this should be in the kms component, but it is
94 * shared by both mdp4 and mdp5..
95 */
96 struct hdmi *hdmi;
97
98 /* eDP is for mdp5 only, but kms has not been created
99 * when edp_bind() and edp_init() are called. Here is the only
100 * place to keep the edp instance.
101 */
102 struct msm_edp *edp;
103
104 /* DSI is shared by mdp4 and mdp5 */
105 struct msm_dsi *dsi[2];
106
107 /* when we have more than one 'msm_gpu' these need to be an array: */
108 struct msm_gpu *gpu;
109 struct msm_file_private *lastctx;
110
111 struct drm_fb_helper *fbdev;
112
113 struct msm_rd_state *rd;
114 struct msm_perf_state *perf;
115
116 /* list of GEM objects: */
117 struct list_head inactive_list;
118
119 struct workqueue_struct *wq;
120 struct workqueue_struct *atomic_wq;
121
122 /* crtcs pending async atomic updates: */
123 uint32_t pending_crtcs;
124 wait_queue_head_t pending_crtcs_event;
125
126 /* Registered address spaces.. currently this is fixed per # of
127 * iommu's. Ie. one for display block and one for gpu block.
128 * Eventually, to do per-process gpu pagetables, we'll want one
129 * of these per-process.
130 */
131 unsigned int num_aspaces;
132 struct msm_gem_address_space *aspace[NUM_DOMAINS];
133
134 unsigned int num_planes;
135 struct drm_plane *planes[16];
136
137 unsigned int num_crtcs;
138 struct drm_crtc *crtcs[8];
139
140 unsigned int num_encoders;
141 struct drm_encoder *encoders[8];
142
143 unsigned int num_bridges;
144 struct drm_bridge *bridges[8];
145
146 unsigned int num_connectors;
147 struct drm_connector *connectors[8];
148
149 /* Properties */
150 struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
151
152 /* VRAM carveout, used when no IOMMU: */
153 struct {
154 unsigned long size;
155 dma_addr_t paddr;
156 /* NOTE: mm managed at the page level, size is in # of pages
157 * and position mm_node->start is in # of pages:
158 */
159 struct drm_mm mm;
160 } vram;
161
162 struct notifier_block vmap_notifier;
163 struct shrinker shrinker;
164
165 struct msm_vblank_ctrl vblank_ctrl;
166
167 /* task holding struct_mutex.. currently only used in submit path
168 * to detect and reject faults from copy_from_user() for submit
169 * ioctl.
170 */
171 struct task_struct *struct_mutex_task;
172};
173
174struct msm_format {
175 uint32_t pixel_format;
176};
177
178int msm_atomic_check(struct drm_device *dev,
179 struct drm_atomic_state *state);
180int msm_atomic_commit(struct drm_device *dev,
181 struct drm_atomic_state *state, bool nonblock);
182struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
183void msm_atomic_state_clear(struct drm_atomic_state *state);
184void msm_atomic_state_free(struct drm_atomic_state *state);
185
186int msm_register_address_space(struct drm_device *dev,
187 struct msm_gem_address_space *aspace);
188
189void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
190 struct msm_gem_vma *vma, struct sg_table *sgt);
191int msm_gem_map_vma(struct msm_gem_address_space *aspace,
192 struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
193
194void msm_gem_address_space_destroy(struct msm_gem_address_space *aspace);
195struct msm_gem_address_space *
196msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
197 const char *name);
198
199void msm_gem_submit_free(struct msm_gem_submit *submit);
200int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
201 struct drm_file *file);
202
203void msm_gem_shrinker_init(struct drm_device *dev);
204void msm_gem_shrinker_cleanup(struct drm_device *dev);
205
206int msm_gem_mmap_obj(struct drm_gem_object *obj,
207 struct vm_area_struct *vma);
208int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
209int msm_gem_fault(struct vm_fault *vmf);
210uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
211int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,
212 uint64_t *iova);
213int msm_gem_get_iova(struct drm_gem_object *obj, int id, uint64_t *iova);
214uint64_t msm_gem_iova(struct drm_gem_object *obj, int id);
215struct page **msm_gem_get_pages(struct drm_gem_object *obj);
216void msm_gem_put_pages(struct drm_gem_object *obj);
217void msm_gem_put_iova(struct drm_gem_object *obj, int id);
218int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
219 struct drm_mode_create_dumb *args);
220int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
221 uint32_t handle, uint64_t *offset);
222struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
223void *msm_gem_prime_vmap(struct drm_gem_object *obj);
224void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
225int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
226struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
227 struct dma_buf_attachment *attach, struct sg_table *sg);
228int msm_gem_prime_pin(struct drm_gem_object *obj);
229void msm_gem_prime_unpin(struct drm_gem_object *obj);
230void *msm_gem_get_vaddr_locked(struct drm_gem_object *obj);
231void *msm_gem_get_vaddr(struct drm_gem_object *obj);
232void msm_gem_put_vaddr_locked(struct drm_gem_object *obj);
233void msm_gem_put_vaddr(struct drm_gem_object *obj);
234int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
235void msm_gem_purge(struct drm_gem_object *obj);
236void msm_gem_vunmap(struct drm_gem_object *obj);
237int msm_gem_sync_object(struct drm_gem_object *obj,
238 struct msm_fence_context *fctx, bool exclusive);
239void msm_gem_move_to_active(struct drm_gem_object *obj,
240 struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
241void msm_gem_move_to_inactive(struct drm_gem_object *obj);
242int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
243int msm_gem_cpu_fini(struct drm_gem_object *obj);
244void msm_gem_free_object(struct drm_gem_object *obj);
245int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
246 uint32_t size, uint32_t flags, uint32_t *handle);
247struct drm_gem_object *msm_gem_new(struct drm_device *dev,
248 uint32_t size, uint32_t flags);
249struct drm_gem_object *msm_gem_import(struct drm_device *dev,
250 struct dma_buf *dmabuf, struct sg_table *sgt);
251
252int msm_framebuffer_prepare(struct drm_framebuffer *fb, int id);
253void msm_framebuffer_cleanup(struct drm_framebuffer *fb, int id);
254uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, int id, int plane);
255struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
256const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
257struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
258 const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
259struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
260 struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
261
262struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
263void msm_fbdev_free(struct drm_device *dev);
264
265struct hdmi;
266int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
267 struct drm_encoder *encoder);
268void __init msm_hdmi_register(void);
269void __exit msm_hdmi_unregister(void);
270
271struct msm_edp;
272void __init msm_edp_register(void);
273void __exit msm_edp_unregister(void);
274int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
275 struct drm_encoder *encoder);
276
277struct msm_dsi;
278#ifdef CONFIG_DRM_MSM_DSI
279void __init msm_dsi_register(void);
280void __exit msm_dsi_unregister(void);
281int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
282 struct drm_encoder *encoder);
283#else
284static inline void __init msm_dsi_register(void)
285{
286}
287static inline void __exit msm_dsi_unregister(void)
288{
289}
290static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
291 struct drm_device *dev,
292 struct drm_encoder *encoder)
293{
294 return -EINVAL;
295}
296#endif
297
298void __init msm_mdp_register(void);
299void __exit msm_mdp_unregister(void);
300
301#ifdef CONFIG_DEBUG_FS
302void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
303void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
304void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
305int msm_debugfs_late_init(struct drm_device *dev);
306int msm_rd_debugfs_init(struct drm_minor *minor);
307void msm_rd_debugfs_cleanup(struct drm_minor *minor);
308void msm_rd_dump_submit(struct msm_gem_submit *submit);
309int msm_perf_debugfs_init(struct drm_minor *minor);
310void msm_perf_debugfs_cleanup(struct drm_minor *minor);
311#else
312static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
313static inline void msm_rd_dump_submit(struct msm_gem_submit *submit) {}
314#endif
315
316struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
317void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
318 const char *dbgname);
319void msm_writel(u32 data, void __iomem *addr);
320u32 msm_readl(const void __iomem *addr);
321
322#define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
323#define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
324
325static inline int align_pitch(int width, int bpp)
326{
327 int bytespp = (bpp + 7) / 8;
328 /* adreno needs pitch aligned to 32 pixels: */
329 return bytespp * ALIGN(width, 32);
330}
331
332/* for the generated headers: */
333#define INVALID_IDX(idx) ({BUG(); 0;})
334#define fui(x) ({BUG(); 0;})
335#define util_float_to_half(x) ({BUG(); 0;})
336
337
338#define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
339
340/* for conditionally setting boolean flag(s): */
341#define COND(bool, val) ((bool) ? (val) : 0)
342
343static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
344{
345 ktime_t now = ktime_get();
346 unsigned long remaining_jiffies;
347
348 if (ktime_compare(*timeout, now) < 0) {
349 remaining_jiffies = 0;
350 } else {
351 ktime_t rem = ktime_sub(*timeout, now);
352 struct timespec ts = ktime_to_timespec(rem);
353 remaining_jiffies = timespec_to_jiffies(&ts);
354 }
355
356 return remaining_jiffies;
357}
358
359#endif /* __MSM_DRV_H__ */