tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (C) 2016 IBM Corp.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9#include <linux/bitops.h>
10#include <linux/init.h>
11#include <linux/io.h>
12#include <linux/kernel.h>
13#include <linux/mutex.h>
14#include <linux/of.h>
15#include <linux/platform_device.h>
16#include <linux/pinctrl/pinctrl.h>
17#include <linux/pinctrl/pinmux.h>
18#include <linux/pinctrl/pinconf.h>
19#include <linux/pinctrl/pinconf-generic.h>
20#include <linux/string.h>
21#include <linux/types.h>
22
23#include "../core.h"
24#include "../pinctrl-utils.h"
25#include "pinctrl-aspeed.h"
26
27/*
28 * Uses undefined macros for symbol naming and references, eg GPIOA0, MAC1LINK,
29 * TIMER3 etc.
30 *
31 * Pins are defined in GPIO bank order:
32 *
33 * GPIOA0: 0
34 * ...
35 * GPIOA7: 7
36 * GPIOB0: 8
37 * ...
38 * GPIOZ7: 207
39 * GPIOAA0: 208
40 * ...
41 * GPIOAB3: 219
42 *
43 * Not all pins have their signals defined (yet).
44 */
45
46#define A4 2
47SSSF_PIN_DECL(A4, GPIOA2, TIMER3, SIG_DESC_SET(SCU80, 2));
48
49#define I2C9_DESC SIG_DESC_SET(SCU90, 22)
50
51#define C5 4
52SIG_EXPR_LIST_DECL_SINGLE(SCL9, I2C9, I2C9_DESC);
53SIG_EXPR_LIST_DECL_SINGLE(TIMER5, TIMER5, SIG_DESC_SET(SCU80, 4));
54MS_PIN_DECL(C5, GPIOA4, SCL9, TIMER5);
55
56FUNC_GROUP_DECL(TIMER5, C5);
57
58#define B4 5
59SIG_EXPR_LIST_DECL_SINGLE(SDA9, I2C9, I2C9_DESC);
60SIG_EXPR_LIST_DECL_SINGLE(TIMER6, TIMER6, SIG_DESC_SET(SCU80, 5));
61MS_PIN_DECL(B4, GPIOA5, SDA9, TIMER6);
62
63FUNC_GROUP_DECL(TIMER6, B4);
64FUNC_GROUP_DECL(I2C9, C5, B4);
65
66#define MDIO2_DESC SIG_DESC_SET(SCU90, 2)
67
68#define A3 6
69SIG_EXPR_LIST_DECL_SINGLE(MDC2, MDIO2, MDIO2_DESC);
70SIG_EXPR_LIST_DECL_SINGLE(TIMER7, TIMER7, SIG_DESC_SET(SCU80, 6));
71MS_PIN_DECL(A3, GPIOA6, MDC2, TIMER7);
72
73FUNC_GROUP_DECL(TIMER7, A3);
74
75#define D5 7
76SIG_EXPR_LIST_DECL_SINGLE(MDIO2, MDIO2, MDIO2_DESC);
77SIG_EXPR_LIST_DECL_SINGLE(TIMER8, TIMER8, SIG_DESC_SET(SCU80, 7));
78MS_PIN_DECL(D5, GPIOA7, MDIO2, TIMER8);
79
80FUNC_GROUP_DECL(TIMER8, D5);
81FUNC_GROUP_DECL(MDIO2, A3, D5);
82
83#define H19 13
84#define H19_DESC SIG_DESC_SET(SCU80, 13)
85SIG_EXPR_LIST_DECL_SINGLE(LPCPD, LPCPD, H19_DESC);
86SIG_EXPR_LIST_DECL_SINGLE(LPCSMI, LPCSMI, H19_DESC);
87MS_PIN_DECL(H19, GPIOB5, LPCPD, LPCSMI);
88
89FUNC_GROUP_DECL(LPCPD, H19);
90FUNC_GROUP_DECL(LPCSMI, H19);
91
92#define H20 14
93SSSF_PIN_DECL(H20, GPIOB6, LPCPME, SIG_DESC_SET(SCU80, 14));
94
95#define SD1_DESC SIG_DESC_SET(SCU90, 0)
96#define I2C10_DESC SIG_DESC_SET(SCU90, 23)
97
98#define C4 16
99SIG_EXPR_LIST_DECL_SINGLE(SD1CLK, SD1, SD1_DESC);
100SIG_EXPR_LIST_DECL_SINGLE(SCL10, I2C10, I2C10_DESC);
101MS_PIN_DECL(C4, GPIOC0, SD1CLK, SCL10);
102
103#define B3 17
104SIG_EXPR_LIST_DECL_SINGLE(SD1CMD, SD1, SD1_DESC);
105SIG_EXPR_LIST_DECL_SINGLE(SDA10, I2C10, I2C10_DESC);
106MS_PIN_DECL(B3, GPIOC1, SD1CMD, SDA10);
107
108FUNC_GROUP_DECL(I2C10, C4, B3);
109
110#define I2C11_DESC SIG_DESC_SET(SCU90, 24)
111
112#define A2 18
113SIG_EXPR_LIST_DECL_SINGLE(SD1DAT0, SD1, SD1_DESC);
114SIG_EXPR_LIST_DECL_SINGLE(SCL11, I2C11, I2C11_DESC);
115MS_PIN_DECL(A2, GPIOC2, SD1DAT0, SCL11);
116
117#define E5 19
118SIG_EXPR_LIST_DECL_SINGLE(SD1DAT1, SD1, SD1_DESC);
119SIG_EXPR_LIST_DECL_SINGLE(SDA11, I2C11, I2C11_DESC);
120MS_PIN_DECL(E5, GPIOC3, SD1DAT1, SDA11);
121
122FUNC_GROUP_DECL(I2C11, A2, E5);
123
124#define I2C12_DESC SIG_DESC_SET(SCU90, 25)
125
126#define D4 20
127SIG_EXPR_LIST_DECL_SINGLE(SD1DAT2, SD1, SD1_DESC);
128SIG_EXPR_LIST_DECL_SINGLE(SCL12, I2C12, I2C12_DESC);
129MS_PIN_DECL(D4, GPIOC4, SD1DAT2, SCL12);
130
131#define C3 21
132SIG_EXPR_LIST_DECL_SINGLE(SD1DAT3, SD1, SD1_DESC);
133SIG_EXPR_LIST_DECL_SINGLE(SDA12, I2C12, I2C12_DESC);
134MS_PIN_DECL(C3, GPIOC5, SD1DAT3, SDA12);
135
136FUNC_GROUP_DECL(I2C12, D4, C3);
137
138#define I2C13_DESC SIG_DESC_SET(SCU90, 26)
139
140#define B2 22
141SIG_EXPR_LIST_DECL_SINGLE(SD1CD, SD1, SD1_DESC);
142SIG_EXPR_LIST_DECL_SINGLE(SCL13, I2C13, I2C13_DESC);
143MS_PIN_DECL(B2, GPIOC6, SD1CD, SCL13);
144
145#define A1 23
146SIG_EXPR_LIST_DECL_SINGLE(SD1WP, SD1, SD1_DESC);
147SIG_EXPR_LIST_DECL_SINGLE(SDA13, I2C13, I2C13_DESC);
148MS_PIN_DECL(A1, GPIOC7, SD1WP, SDA13);
149
150FUNC_GROUP_DECL(I2C13, B2, A1);
151FUNC_GROUP_DECL(SD1, C4, B3, A2, E5, D4, C3, B2, A1);
152
153#define SD2_DESC SIG_DESC_SET(SCU90, 1)
154#define GPID_DESC SIG_DESC_SET(HW_STRAP1, 21)
155#define GPID0_DESC SIG_DESC_SET(SCU8C, 8)
156
157#define A18 24
158SIG_EXPR_LIST_DECL_SINGLE(SD2CLK, SD2, SD2_DESC);
159SIG_EXPR_DECL(GPID0IN, GPID0, GPID0_DESC);
160SIG_EXPR_DECL(GPID0IN, GPID, GPID_DESC);
161SIG_EXPR_LIST_DECL_DUAL(GPID0IN, GPID0, GPID);
162MS_PIN_DECL(A18, GPIOD0, SD2CLK, GPID0IN);
163
164#define D16 25
165SIG_EXPR_LIST_DECL_SINGLE(SD2CMD, SD2, SD2_DESC);
166SIG_EXPR_DECL(GPID0OUT, GPID0, GPID0_DESC);
167SIG_EXPR_DECL(GPID0OUT, GPID, GPID_DESC);
168SIG_EXPR_LIST_DECL_DUAL(GPID0OUT, GPID0, GPID);
169MS_PIN_DECL(D16, GPIOD1, SD2CMD, GPID0OUT);
170
171FUNC_GROUP_DECL(GPID0, A18, D16);
172
173#define GPIE_DESC SIG_DESC_SET(HW_STRAP1, 22)
174#define GPIE0_DESC SIG_DESC_SET(SCU8C, 12)
175#define GPIE2_DESC SIG_DESC_SET(SCU8C, 13)
176#define GPIE4_DESC SIG_DESC_SET(SCU8C, 14)
177#define GPIE6_DESC SIG_DESC_SET(SCU8C, 15)
178
179#define D15 32
180SIG_EXPR_LIST_DECL_SINGLE(NCTS3, NCTS3, SIG_DESC_SET(SCU80, 16));
181SIG_EXPR_DECL(GPIE0IN, GPIE0, GPIE0_DESC);
182SIG_EXPR_DECL(GPIE0IN, GPIE, GPIE_DESC);
183SIG_EXPR_LIST_DECL_DUAL(GPIE0IN, GPIE0, GPIE);
184MS_PIN_DECL(D15, GPIOE0, NCTS3, GPIE0IN);
185
186FUNC_GROUP_DECL(NCTS3, D15);
187
188#define C15 33
189SIG_EXPR_LIST_DECL_SINGLE(NDCD3, NDCD3, SIG_DESC_SET(SCU80, 17));
190SIG_EXPR_DECL(GPIE0OUT, GPIE0, GPIE0_DESC);
191SIG_EXPR_DECL(GPIE0OUT, GPIE, GPIE_DESC);
192SIG_EXPR_LIST_DECL_DUAL(GPIE0OUT, GPIE0, GPIE);
193MS_PIN_DECL(C15, GPIOE1, NDCD3, GPIE0OUT);
194
195FUNC_GROUP_DECL(NDCD3, C15);
196FUNC_GROUP_DECL(GPIE0, D15, C15);
197
198#define B15 34
199SIG_EXPR_LIST_DECL_SINGLE(NDSR3, NDSR3, SIG_DESC_SET(SCU80, 18));
200SIG_EXPR_DECL(GPIE2IN, GPIE2, GPIE2_DESC);
201SIG_EXPR_DECL(GPIE2IN, GPIE, GPIE_DESC);
202SIG_EXPR_LIST_DECL_DUAL(GPIE2IN, GPIE2, GPIE);
203MS_PIN_DECL(B15, GPIOE2, NDSR3, GPIE2IN);
204
205FUNC_GROUP_DECL(NDSR3, B15);
206
207#define A15 35
208SIG_EXPR_LIST_DECL_SINGLE(NRI3, NRI3, SIG_DESC_SET(SCU80, 19));
209SIG_EXPR_DECL(GPIE2OUT, GPIE2, GPIE2_DESC);
210SIG_EXPR_DECL(GPIE2OUT, GPIE, GPIE_DESC);
211SIG_EXPR_LIST_DECL_DUAL(GPIE2OUT, GPIE2, GPIE);
212MS_PIN_DECL(A15, GPIOE3, NRI3, GPIE2OUT);
213
214FUNC_GROUP_DECL(NRI3, A15);
215FUNC_GROUP_DECL(GPIE2, B15, A15);
216
217#define E14 36
218SIG_EXPR_LIST_DECL_SINGLE(NDTR3, NDTR3, SIG_DESC_SET(SCU80, 20));
219SIG_EXPR_DECL(GPIE4IN, GPIE4, GPIE4_DESC);
220SIG_EXPR_DECL(GPIE4IN, GPIE, GPIE_DESC);
221SIG_EXPR_LIST_DECL_DUAL(GPIE4IN, GPIE4, GPIE);
222MS_PIN_DECL(E14, GPIOE4, NDTR3, GPIE4IN);
223
224FUNC_GROUP_DECL(NDTR3, E14);
225
226#define D14 37
227SIG_EXPR_LIST_DECL_SINGLE(NRTS3, NRTS3, SIG_DESC_SET(SCU80, 21));
228SIG_EXPR_DECL(GPIE4OUT, GPIE4, GPIE4_DESC);
229SIG_EXPR_DECL(GPIE4OUT, GPIE, GPIE_DESC);
230SIG_EXPR_LIST_DECL_DUAL(GPIE4OUT, GPIE4, GPIE);
231MS_PIN_DECL(D14, GPIOE5, NRTS3, GPIE4OUT);
232
233FUNC_GROUP_DECL(NRTS3, D14);
234FUNC_GROUP_DECL(GPIE4, E14, D14);
235
236#define C14 38
237SIG_EXPR_LIST_DECL_SINGLE(TXD3, TXD3, SIG_DESC_SET(SCU80, 22));
238SIG_EXPR_DECL(GPIE6IN, GPIE6, GPIE6_DESC);
239SIG_EXPR_DECL(GPIE6IN, GPIE, GPIE_DESC);
240SIG_EXPR_LIST_DECL_DUAL(GPIE6IN, GPIE6, GPIE);
241MS_PIN_DECL(C14, GPIOE6, TXD3, GPIE6IN);
242
243FUNC_GROUP_DECL(TXD3, C14);
244
245#define B14 39
246SIG_EXPR_LIST_DECL_SINGLE(RXD3, RXD3, SIG_DESC_SET(SCU80, 23));
247SIG_EXPR_DECL(GPIE6OUT, GPIE6, GPIE6_DESC);
248SIG_EXPR_DECL(GPIE6OUT, GPIE, GPIE_DESC);
249SIG_EXPR_LIST_DECL_DUAL(GPIE6OUT, GPIE6, GPIE);
250MS_PIN_DECL(B14, GPIOE7, RXD3, GPIE6OUT);
251
252FUNC_GROUP_DECL(RXD3, B14);
253FUNC_GROUP_DECL(GPIE6, C14, B14);
254
255#define D18 40
256SSSF_PIN_DECL(D18, GPIOF0, NCTS4, SIG_DESC_SET(SCU80, 24));
257
258#define ACPI_DESC SIG_DESC_BIT(HW_STRAP1, 19, 0)
259
260#define B19 41
261SIG_EXPR_LIST_DECL_SINGLE(NDCD4, NDCD4, SIG_DESC_SET(SCU80, 25));
262SIG_EXPR_DECL(SIOPBI, SIOPBI, SIG_DESC_SET(SCUA4, 12));
263SIG_EXPR_DECL(SIOPBI, ACPI, ACPI_DESC);
264SIG_EXPR_LIST_DECL_DUAL(SIOPBI, SIOPBI, ACPI);
265MS_PIN_DECL(B19, GPIOF1, NDCD4, SIOPBI);
266FUNC_GROUP_DECL(NDCD4, B19);
267FUNC_GROUP_DECL(SIOPBI, B19);
268
269#define D17 43
270SIG_EXPR_LIST_DECL_SINGLE(NRI4, NRI4, SIG_DESC_SET(SCU80, 27));
271SIG_EXPR_DECL(SIOPBO, SIOPBO, SIG_DESC_SET(SCUA4, 14));
272SIG_EXPR_DECL(SIOPBO, ACPI, ACPI_DESC);
273SIG_EXPR_LIST_DECL_DUAL(SIOPBO, SIOPBO, ACPI);
274MS_PIN_DECL(D17, GPIOF3, NRI4, SIOPBO);
275FUNC_GROUP_DECL(NRI4, D17);
276FUNC_GROUP_DECL(SIOPBO, D17);
277
278FUNC_GROUP_DECL(ACPI, B19, D17);
279
280#define E16 46
281SSSF_PIN_DECL(E16, GPIOF6, TXD4, SIG_DESC_SET(SCU80, 30));
282
283#define C17 47
284SSSF_PIN_DECL(C17, GPIOF7, RXD4, SIG_DESC_SET(SCU80, 31));
285
286#define AA22 54
287SSSF_PIN_DECL(AA22, GPIOG6, FLBUSY, SIG_DESC_SET(SCU84, 6));
288
289#define U18 55
290SSSF_PIN_DECL(U18, GPIOG7, FLWP, SIG_DESC_SET(SCU84, 7));
291
292#define UART6_DESC SIG_DESC_SET(SCU90, 7)
293#define ROM16_DESC SIG_DESC_SET(SCU90, 6)
294#define FLASH_WIDE SIG_DESC_SET(HW_STRAP1, 4)
295#define BOOT_SRC_NOR { HW_STRAP1, GENMASK(1, 0), 0, 0 }
296
297#define A8 56
298SIG_EXPR_DECL(ROMD8, ROM16, ROM16_DESC);
299SIG_EXPR_DECL(ROMD8, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
300SIG_EXPR_LIST_DECL_DUAL(ROMD8, ROM16, ROM16S);
301SIG_EXPR_LIST_DECL_SINGLE(NCTS6, NCTS6, UART6_DESC);
302MS_PIN_DECL(A8, GPIOH0, ROMD8, NCTS6);
303
304#define C7 57
305SIG_EXPR_DECL(ROMD9, ROM16, ROM16_DESC);
306SIG_EXPR_DECL(ROMD9, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
307SIG_EXPR_LIST_DECL_DUAL(ROMD9, ROM16, ROM16S);
308SIG_EXPR_LIST_DECL_SINGLE(NDCD6, NDCD6, UART6_DESC);
309MS_PIN_DECL(C7, GPIOH1, ROMD9, NDCD6);
310
311#define B7 58
312SIG_EXPR_DECL(ROMD10, ROM16, ROM16_DESC);
313SIG_EXPR_DECL(ROMD10, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
314SIG_EXPR_LIST_DECL_DUAL(ROMD10, ROM16, ROM16S);
315SIG_EXPR_LIST_DECL_SINGLE(NDSR6, NDSR6, UART6_DESC);
316MS_PIN_DECL(B7, GPIOH2, ROMD10, NDSR6);
317
318#define A7 59
319SIG_EXPR_DECL(ROMD11, ROM16, ROM16_DESC);
320SIG_EXPR_DECL(ROMD11, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
321SIG_EXPR_LIST_DECL_DUAL(ROMD11, ROM16, ROM16S);
322SIG_EXPR_LIST_DECL_SINGLE(NRI6, NRI6, UART6_DESC);
323MS_PIN_DECL(A7, GPIOH3, ROMD11, NRI6);
324
325#define D7 60
326SIG_EXPR_DECL(ROMD12, ROM16, ROM16_DESC);
327SIG_EXPR_DECL(ROMD12, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
328SIG_EXPR_LIST_DECL_DUAL(ROMD12, ROM16, ROM16S);
329SIG_EXPR_LIST_DECL_SINGLE(NDTR6, NDTR6, UART6_DESC);
330MS_PIN_DECL(D7, GPIOH4, ROMD12, NDTR6);
331
332#define B6 61
333SIG_EXPR_DECL(ROMD13, ROM16, ROM16_DESC);
334SIG_EXPR_DECL(ROMD13, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
335SIG_EXPR_LIST_DECL_DUAL(ROMD13, ROM16, ROM16S);
336SIG_EXPR_LIST_DECL_SINGLE(NRTS6, NRTS6, UART6_DESC);
337MS_PIN_DECL(B6, GPIOH5, ROMD13, NRTS6);
338
339#define A6 62
340SIG_EXPR_DECL(ROMD14, ROM16, ROM16_DESC);
341SIG_EXPR_DECL(ROMD14, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
342SIG_EXPR_LIST_DECL_DUAL(ROMD14, ROM16, ROM16S);
343SIG_EXPR_LIST_DECL_SINGLE(TXD6, TXD6, UART6_DESC);
344MS_PIN_DECL(A6, GPIOH6, ROMD14, TXD6);
345
346#define E7 63
347SIG_EXPR_DECL(ROMD15, ROM16, ROM16_DESC);
348SIG_EXPR_DECL(ROMD15, ROM16S, FLASH_WIDE, BOOT_SRC_NOR);
349SIG_EXPR_LIST_DECL_DUAL(ROMD15, ROM16, ROM16S);
350SIG_EXPR_LIST_DECL_SINGLE(RXD6, RXD6, UART6_DESC);
351MS_PIN_DECL(E7, GPIOH7, ROMD15, RXD6);
352
353FUNC_GROUP_DECL(UART6, A8, C7, B7, A7, D7, B6, A6, E7);
354
355#define J3 75
356SSSF_PIN_DECL(J3, GPIOJ3, SGPMI, SIG_DESC_SET(SCU84, 11));
357
358#define T4 76
359SSSF_PIN_DECL(T4, GPIOJ4, VGAHS, SIG_DESC_SET(SCU84, 12));
360
361#define U2 77
362SSSF_PIN_DECL(U2, GPIOJ5, VGAVS, SIG_DESC_SET(SCU84, 13));
363
364#define T2 78
365SSSF_PIN_DECL(T2, GPIOJ6, DDCCLK, SIG_DESC_SET(SCU84, 14));
366
367#define T1 79
368SSSF_PIN_DECL(T1, GPIOJ7, DDCDAT, SIG_DESC_SET(SCU84, 15));
369
370#define I2C5_DESC SIG_DESC_SET(SCU90, 18)
371
372#define E3 80
373SIG_EXPR_LIST_DECL_SINGLE(SCL5, I2C5, I2C5_DESC);
374SS_PIN_DECL(E3, GPIOK0, SCL5);
375
376#define D2 81
377SIG_EXPR_LIST_DECL_SINGLE(SDA5, I2C5, I2C5_DESC);
378SS_PIN_DECL(D2, GPIOK1, SDA5);
379
380FUNC_GROUP_DECL(I2C5, E3, D2);
381
382#define I2C6_DESC SIG_DESC_SET(SCU90, 19)
383
384#define C1 82
385SIG_EXPR_LIST_DECL_SINGLE(SCL6, I2C6, I2C6_DESC);
386SS_PIN_DECL(C1, GPIOK2, SCL6);
387
388#define F4 83
389SIG_EXPR_LIST_DECL_SINGLE(SDA6, I2C6, I2C6_DESC);
390SS_PIN_DECL(F4, GPIOK3, SDA6);
391
392FUNC_GROUP_DECL(I2C6, C1, F4);
393
394#define I2C7_DESC SIG_DESC_SET(SCU90, 20)
395
396#define E2 84
397SIG_EXPR_LIST_DECL_SINGLE(SCL7, I2C7, I2C7_DESC);
398SS_PIN_DECL(E2, GPIOK4, SCL7);
399
400#define D1 85
401SIG_EXPR_LIST_DECL_SINGLE(SDA7, I2C7, I2C7_DESC);
402SS_PIN_DECL(D1, GPIOK5, SDA7);
403
404FUNC_GROUP_DECL(I2C7, E2, D1);
405
406#define I2C8_DESC SIG_DESC_SET(SCU90, 21)
407
408#define G5 86
409SIG_EXPR_LIST_DECL_SINGLE(SCL8, I2C8, I2C8_DESC);
410SS_PIN_DECL(G5, GPIOK6, SCL8);
411
412#define F3 87
413SIG_EXPR_LIST_DECL_SINGLE(SDA8, I2C8, I2C8_DESC);
414SS_PIN_DECL(F3, GPIOK7, SDA8);
415
416FUNC_GROUP_DECL(I2C8, G5, F3);
417
418#define U1 88
419SSSF_PIN_DECL(U1, GPIOL0, NCTS1, SIG_DESC_SET(SCU84, 16));
420
421#define VPI18_DESC { SCU90, GENMASK(5, 4), 1, 0 }
422#define VPI24_DESC { SCU90, GENMASK(5, 4), 2, 0 }
423#define VPI30_DESC { SCU90, GENMASK(5, 4), 3, 0 }
424
425#define T5 89
426#define T5_DESC SIG_DESC_SET(SCU84, 17)
427SIG_EXPR_DECL(VPIDE, VPI18, VPI18_DESC, T5_DESC);
428SIG_EXPR_DECL(VPIDE, VPI24, VPI24_DESC, T5_DESC);
429SIG_EXPR_DECL(VPIDE, VPI30, VPI30_DESC, T5_DESC);
430SIG_EXPR_LIST_DECL(VPIDE, SIG_EXPR_PTR(VPIDE, VPI18),
431 SIG_EXPR_PTR(VPIDE, VPI24),
432 SIG_EXPR_PTR(VPIDE, VPI30));
433SIG_EXPR_LIST_DECL_SINGLE(NDCD1, NDCD1, T5_DESC);
434MS_PIN_DECL(T5, GPIOL1, VPIDE, NDCD1);
435FUNC_GROUP_DECL(NDCD1, T5);
436
437#define U3 90
438#define U3_DESC SIG_DESC_SET(SCU84, 18)
439SIG_EXPR_DECL(VPIODD, VPI18, VPI18_DESC, U3_DESC);
440SIG_EXPR_DECL(VPIODD, VPI24, VPI24_DESC, U3_DESC);
441SIG_EXPR_DECL(VPIODD, VPI30, VPI30_DESC, U3_DESC);
442SIG_EXPR_LIST_DECL(VPIODD, SIG_EXPR_PTR(VPIODD, VPI18),
443 SIG_EXPR_PTR(VPIODD, VPI24),
444 SIG_EXPR_PTR(VPIODD, VPI30));
445SIG_EXPR_LIST_DECL_SINGLE(NDSR1, NDSR1, U3_DESC);
446MS_PIN_DECL(U3, GPIOL2, VPIODD, NDSR1);
447FUNC_GROUP_DECL(NDSR1, U3);
448
449#define V1 91
450#define V1_DESC SIG_DESC_SET(SCU84, 19)
451SIG_EXPR_DECL(VPIHS, VPI18, VPI18_DESC, V1_DESC);
452SIG_EXPR_DECL(VPIHS, VPI24, VPI24_DESC, V1_DESC);
453SIG_EXPR_DECL(VPIHS, VPI30, VPI30_DESC, V1_DESC);
454SIG_EXPR_LIST_DECL(VPIHS, SIG_EXPR_PTR(VPIHS, VPI18),
455 SIG_EXPR_PTR(VPIHS, VPI24),
456 SIG_EXPR_PTR(VPIHS, VPI30));
457SIG_EXPR_LIST_DECL_SINGLE(NRI1, NRI1, V1_DESC);
458MS_PIN_DECL(V1, GPIOL3, VPIHS, NRI1);
459FUNC_GROUP_DECL(NRI1, V1);
460
461#define U4 92
462#define U4_DESC SIG_DESC_SET(SCU84, 20)
463SIG_EXPR_DECL(VPIVS, VPI18, VPI18_DESC, U4_DESC);
464SIG_EXPR_DECL(VPIVS, VPI24, VPI24_DESC, U4_DESC);
465SIG_EXPR_DECL(VPIVS, VPI30, VPI30_DESC, U4_DESC);
466SIG_EXPR_LIST_DECL(VPIVS, SIG_EXPR_PTR(VPIVS, VPI18),
467 SIG_EXPR_PTR(VPIVS, VPI24),
468 SIG_EXPR_PTR(VPIVS, VPI30));
469SIG_EXPR_LIST_DECL_SINGLE(NDTR1, NDTR1, U4_DESC);
470MS_PIN_DECL(U4, GPIOL4, VPIVS, NDTR1);
471FUNC_GROUP_DECL(NDTR1, U4);
472
473#define V2 93
474#define V2_DESC SIG_DESC_SET(SCU84, 21)
475SIG_EXPR_DECL(VPICLK, VPI18, VPI18_DESC, V2_DESC);
476SIG_EXPR_DECL(VPICLK, VPI24, VPI24_DESC, V2_DESC);
477SIG_EXPR_DECL(VPICLK, VPI30, VPI30_DESC, V2_DESC);
478SIG_EXPR_LIST_DECL(VPICLK, SIG_EXPR_PTR(VPICLK, VPI18),
479 SIG_EXPR_PTR(VPICLK, VPI24),
480 SIG_EXPR_PTR(VPICLK, VPI30));
481SIG_EXPR_LIST_DECL_SINGLE(NRTS1, NRTS1, V2_DESC);
482MS_PIN_DECL(V2, GPIOL5, VPICLK, NRTS1);
483FUNC_GROUP_DECL(NRTS1, V2);
484
485#define W1 94
486#define W1_DESC SIG_DESC_SET(SCU84, 22)
487SIG_EXPR_LIST_DECL_SINGLE(VPIB0, VPI30, VPI30_DESC, W1_DESC);
488SIG_EXPR_LIST_DECL_SINGLE(TXD1, TXD1, W1_DESC);
489MS_PIN_DECL(W1, GPIOL6, VPIB0, TXD1);
490FUNC_GROUP_DECL(TXD1, W1);
491
492#define U5 95
493#define U5_DESC SIG_DESC_SET(SCU84, 23)
494SIG_EXPR_LIST_DECL_SINGLE(VPIB1, VPI30, VPI30_DESC, U5_DESC);
495SIG_EXPR_LIST_DECL_SINGLE(RXD1, RXD1, U5_DESC);
496MS_PIN_DECL(U5, GPIOL7, VPIB1, RXD1);
497FUNC_GROUP_DECL(RXD1, U5);
498
499#define W4 104
500#define W4_DESC SIG_DESC_SET(SCU88, 0)
501SIG_EXPR_LIST_DECL_SINGLE(VPIG0, VPI30, VPI30_DESC, W4_DESC);
502SIG_EXPR_LIST_DECL_SINGLE(PWM0, PWM0, W4_DESC);
503MS_PIN_DECL(W4, GPION0, VPIG0, PWM0);
504FUNC_GROUP_DECL(PWM0, W4);
505
506#define Y3 105
507#define Y3_DESC SIG_DESC_SET(SCU88, 1)
508SIG_EXPR_LIST_DECL_SINGLE(VPIG1, VPI30, VPI30_DESC, Y3_DESC);
509SIG_EXPR_LIST_DECL_SINGLE(PWM1, PWM1, Y3_DESC);
510MS_PIN_DECL(Y3, GPION1, VPIG1, PWM1);
511FUNC_GROUP_DECL(PWM1, Y3);
512
513#define AA2 106
514#define AA2_DESC SIG_DESC_SET(SCU88, 2)
515SIG_EXPR_DECL(VPIG2, VPI18, VPI18_DESC, AA2_DESC);
516SIG_EXPR_DECL(VPIG2, VPI24, VPI24_DESC, AA2_DESC);
517SIG_EXPR_DECL(VPIG2, VPI30, VPI30_DESC, AA2_DESC);
518SIG_EXPR_LIST_DECL(VPIG2, SIG_EXPR_PTR(VPIG2, VPI18),
519 SIG_EXPR_PTR(VPIG2, VPI24),
520 SIG_EXPR_PTR(VPIG2, VPI30));
521SIG_EXPR_LIST_DECL_SINGLE(PWM2, PWM2, AA2_DESC);
522MS_PIN_DECL(AA2, GPION2, VPIG2, PWM2);
523FUNC_GROUP_DECL(PWM2, AA2);
524
525#define AB1 107
526#define AB1_DESC SIG_DESC_SET(SCU88, 3)
527SIG_EXPR_DECL(VPIG3, VPI18, VPI18_DESC, AB1_DESC);
528SIG_EXPR_DECL(VPIG3, VPI24, VPI24_DESC, AB1_DESC);
529SIG_EXPR_DECL(VPIG3, VPI30, VPI30_DESC, AB1_DESC);
530SIG_EXPR_LIST_DECL(VPIG3, SIG_EXPR_PTR(VPIG3, VPI18),
531 SIG_EXPR_PTR(VPIG2, VPI24),
532 SIG_EXPR_PTR(VPIG2, VPI30));
533SIG_EXPR_LIST_DECL_SINGLE(PWM3, PWM3, AB1_DESC);
534MS_PIN_DECL(AB1, GPION3, VPIG3, PWM3);
535FUNC_GROUP_DECL(PWM3, AB1);
536
537#define W5 108
538#define W5_DESC SIG_DESC_SET(SCU88, 4)
539SIG_EXPR_DECL(VPIG4, VPI18, VPI18_DESC, W5_DESC);
540SIG_EXPR_DECL(VPIG4, VPI24, VPI24_DESC, W5_DESC);
541SIG_EXPR_DECL(VPIG4, VPI30, VPI30_DESC, W5_DESC);
542SIG_EXPR_LIST_DECL(VPIG4, SIG_EXPR_PTR(VPIG4, VPI18),
543 SIG_EXPR_PTR(VPIG2, VPI24),
544 SIG_EXPR_PTR(VPIG2, VPI30));
545SIG_EXPR_LIST_DECL_SINGLE(PWM4, PWM4, W5_DESC);
546MS_PIN_DECL(W5, GPION4, VPIG4, PWM4);
547FUNC_GROUP_DECL(PWM4, W5);
548
549#define Y4 109
550#define Y4_DESC SIG_DESC_SET(SCU88, 5)
551SIG_EXPR_DECL(VPIG5, VPI18, VPI18_DESC, Y4_DESC);
552SIG_EXPR_DECL(VPIG5, VPI24, VPI24_DESC, Y4_DESC);
553SIG_EXPR_DECL(VPIG5, VPI30, VPI30_DESC, Y4_DESC);
554SIG_EXPR_LIST_DECL(VPIG5, SIG_EXPR_PTR(VPIG5, VPI18),
555 SIG_EXPR_PTR(VPIG2, VPI24),
556 SIG_EXPR_PTR(VPIG2, VPI30));
557SIG_EXPR_LIST_DECL_SINGLE(PWM5, PWM5, Y4_DESC);
558MS_PIN_DECL(Y4, GPION5, VPIG5, PWM5);
559FUNC_GROUP_DECL(PWM5, Y4);
560
561#define AA3 110
562#define AA3_DESC SIG_DESC_SET(SCU88, 6)
563SIG_EXPR_LIST_DECL_SINGLE(VPIG6, VPI30, VPI30_DESC, AA3_DESC);
564SIG_EXPR_LIST_DECL_SINGLE(PWM6, PWM6, AA3_DESC);
565MS_PIN_DECL(AA3, GPION6, VPIG6, PWM6);
566FUNC_GROUP_DECL(PWM6, AA3);
567
568#define AB2 111
569#define AB2_DESC SIG_DESC_SET(SCU88, 7)
570SIG_EXPR_LIST_DECL_SINGLE(VPIG7, VPI30, VPI30_DESC, AB2_DESC);
571SIG_EXPR_LIST_DECL_SINGLE(PWM7, PWM7, AB2_DESC);
572MS_PIN_DECL(AB2, GPION7, VPIG7, PWM7);
573FUNC_GROUP_DECL(PWM7, AB2);
574
575#define V6 112
576SIG_EXPR_LIST_DECL_SINGLE(VPIG8, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 8));
577SS_PIN_DECL(V6, GPIOO0, VPIG8);
578
579#define Y5 113
580SIG_EXPR_LIST_DECL_SINGLE(VPIG9, VPI24, VPI24_DESC, SIG_DESC_SET(SCU88, 9));
581SS_PIN_DECL(Y5, GPIOO1, VPIG9);
582
583FUNC_GROUP_DECL(VPI18, T5, U3, V1, U4, V2, AA22, W5, Y4, AA3, AB2);
584FUNC_GROUP_DECL(VPI24, T5, U3, V1, U4, V2, AA22, W5, Y4, AA3, AB2, V6, Y5);
585FUNC_GROUP_DECL(VPI30, T5, U3, V1, U4, V2, W1, U5, W4, Y3, AA22, W5, Y4, AA3,
586 AB2);
587
588#define Y7 125
589SIG_EXPR_LIST_DECL_SINGLE(GPIOP5, GPIOP5);
590MS_PIN_DECL_(Y7, SIG_EXPR_LIST_PTR(GPIOP5));
591
592#define AA7 126
593SSSF_PIN_DECL(AA7, GPIOP6, BMCINT, SIG_DESC_SET(SCU88, 22));
594
595#define AB7 127
596SSSF_PIN_DECL(AB7, GPIOP7, FLACK, SIG_DESC_SET(SCU88, 23));
597
598#define I2C3_DESC SIG_DESC_SET(SCU90, 16)
599
600#define D3 128
601SIG_EXPR_LIST_DECL_SINGLE(SCL3, I2C3, I2C3_DESC);
602SS_PIN_DECL(D3, GPIOQ0, SCL3);
603
604#define C2 129
605SIG_EXPR_LIST_DECL_SINGLE(SDA3, I2C3, I2C3_DESC);
606SS_PIN_DECL(C2, GPIOQ1, SDA3);
607
608FUNC_GROUP_DECL(I2C3, D3, C2);
609
610#define I2C4_DESC SIG_DESC_SET(SCU90, 17)
611
612#define B1 130
613SIG_EXPR_LIST_DECL_SINGLE(SCL4, I2C4, I2C4_DESC);
614SS_PIN_DECL(B1, GPIOQ2, SCL4);
615
616#define F5 131
617SIG_EXPR_LIST_DECL_SINGLE(SDA4, I2C4, I2C4_DESC);
618SS_PIN_DECL(F5, GPIOQ3, SDA4);
619
620FUNC_GROUP_DECL(I2C4, B1, F5);
621
622#define DASH9028_DESC SIG_DESC_SET(SCU90, 28)
623
624#define H2 134
625SIG_EXPR_LIST_DECL_SINGLE(DASHH2, DASHH2, DASH9028_DESC);
626SS_PIN_DECL(H2, GPIOQ6, DASHH2);
627
628#define H1 135
629SIG_EXPR_LIST_DECL_SINGLE(DASHH1, DASHH1, DASH9028_DESC);
630SS_PIN_DECL(H1, GPIOQ7, DASHH1);
631
632#define V20 136
633SSSF_PIN_DECL(V20, GPIOR0, ROMCS1, SIG_DESC_SET(SCU88, 24));
634
635#define W21 137
636SSSF_PIN_DECL(W21, GPIOR1, ROMCS2, SIG_DESC_SET(SCU88, 25));
637
638#define Y22 138
639SSSF_PIN_DECL(Y22, GPIOR2, ROMCS3, SIG_DESC_SET(SCU88, 26));
640
641#define U19 139
642SSSF_PIN_DECL(U19, GPIOR3, ROMCS4, SIG_DESC_SET(SCU88, 27));
643
644#define VPOOFF0_DESC { SCU94, GENMASK(1, 0), 0, 0 }
645#define VPO12_DESC { SCU94, GENMASK(1, 0), 1, 0 }
646#define VPO24_DESC { SCU94, GENMASK(1, 0), 2, 0 }
647#define VPOOFF1_DESC { SCU94, GENMASK(1, 0), 3, 0 }
648#define VPO_OFF_12 { SCU94, 0x2, 0, 0 }
649#define VPO_24_OFF SIG_DESC_SET(SCU94, 1)
650
651#define V21 140
652#define V21_DESC SIG_DESC_SET(SCU88, 28)
653SIG_EXPR_DECL(ROMA24, ROM8, V21_DESC, VPO_OFF_12);
654SIG_EXPR_DECL(ROMA24, ROM16, V21_DESC, VPO_OFF_12);
655SIG_EXPR_DECL(ROMA24, ROM16S, V21_DESC, VPO_OFF_12);
656SIG_EXPR_LIST_DECL(ROMA24, SIG_EXPR_PTR(ROMA24, ROM8),
657 SIG_EXPR_PTR(ROMA24, ROM16),
658 SIG_EXPR_PTR(ROMA24, ROM16S));
659SIG_EXPR_LIST_DECL_SINGLE(VPOR6, VPO24, V21_DESC, VPO_24_OFF);
660MS_PIN_DECL(V21, GPIOR4, ROMA24, VPOR6);
661
662#define W22 141
663#define W22_DESC SIG_DESC_SET(SCU88, 29)
664SIG_EXPR_DECL(ROMA25, ROM8, W22_DESC, VPO_OFF_12);
665SIG_EXPR_DECL(ROMA25, ROM16, W22_DESC, VPO_OFF_12);
666SIG_EXPR_DECL(ROMA25, ROM16S, W22_DESC, VPO_OFF_12);
667SIG_EXPR_LIST_DECL(ROMA25, SIG_EXPR_PTR(ROMA25, ROM8),
668 SIG_EXPR_PTR(ROMA25, ROM16),
669 SIG_EXPR_PTR(ROMA25, ROM16S));
670SIG_EXPR_LIST_DECL_SINGLE(VPOR7, VPO24, W22_DESC, VPO_24_OFF);
671MS_PIN_DECL(W22, GPIOR5, ROMA25, VPOR7);
672
673#define C6 142
674SIG_EXPR_LIST_DECL_SINGLE(MDC1, MDIO1, SIG_DESC_SET(SCU88, 30));
675SS_PIN_DECL(C6, GPIOR6, MDC1);
676
677#define A5 143
678SIG_EXPR_LIST_DECL_SINGLE(MDIO1, MDIO1, SIG_DESC_SET(SCU88, 31));
679SS_PIN_DECL(A5, GPIOR7, MDIO1);
680
681FUNC_GROUP_DECL(MDIO1, C6, A5);
682
683#define U21 144
684#define U21_DESC SIG_DESC_SET(SCU8C, 0)
685SIG_EXPR_DECL(ROMD4, ROM8, U21_DESC, VPOOFF0_DESC);
686SIG_EXPR_DECL(ROMD4, ROM16, U21_DESC, VPOOFF0_DESC);
687SIG_EXPR_DECL(ROMD4, ROM16S, U21_DESC, VPOOFF0_DESC);
688SIG_EXPR_LIST_DECL(ROMD4, SIG_EXPR_PTR(ROMD4, ROM8),
689 SIG_EXPR_PTR(ROMD4, ROM16),
690 SIG_EXPR_PTR(ROMD4, ROM16S));
691SIG_EXPR_DECL(VPODE, VPO12, U21_DESC, VPO12_DESC);
692SIG_EXPR_DECL(VPODE, VPO24, U21_DESC, VPO12_DESC);
693SIG_EXPR_LIST_DECL_DUAL(VPODE, VPO12, VPO24);
694MS_PIN_DECL(U21, GPIOS0, ROMD4, VPODE);
695
696#define T19 145
697#define T19_DESC SIG_DESC_SET(SCU8C, 1)
698SIG_EXPR_DECL(ROMD5, ROM8, T19_DESC, VPOOFF0_DESC);
699SIG_EXPR_DECL(ROMD5, ROM16, T19_DESC, VPOOFF0_DESC);
700SIG_EXPR_DECL(ROMD5, ROM16S, T19_DESC, VPOOFF0_DESC);
701SIG_EXPR_LIST_DECL(ROMD5, SIG_EXPR_PTR(ROMD5, ROM8),
702 SIG_EXPR_PTR(ROMD5, ROM16),
703 SIG_EXPR_PTR(ROMD5, ROM16S));
704SIG_EXPR_DECL(VPOHS, VPO12, T19_DESC, VPO12_DESC);
705SIG_EXPR_DECL(VPOHS, VPO24, T19_DESC, VPO24_DESC);
706SIG_EXPR_LIST_DECL_DUAL(VPOHS, VPO12, VPO24);
707MS_PIN_DECL(T19, GPIOS1, ROMD5, VPOHS);
708
709#define V22 146
710#define V22_DESC SIG_DESC_SET(SCU8C, 2)
711SIG_EXPR_DECL(ROMD6, ROM8, V22_DESC, VPOOFF0_DESC);
712SIG_EXPR_DECL(ROMD6, ROM16, V22_DESC, VPOOFF0_DESC);
713SIG_EXPR_DECL(ROMD6, ROM16S, V22_DESC, VPOOFF0_DESC);
714SIG_EXPR_LIST_DECL(ROMD6, SIG_EXPR_PTR(ROMD6, ROM8),
715 SIG_EXPR_PTR(ROMD6, ROM16),
716 SIG_EXPR_PTR(ROMD6, ROM16S));
717SIG_EXPR_DECL(VPOVS, VPO12, V22_DESC, VPO12_DESC);
718SIG_EXPR_DECL(VPOVS, VPO24, V22_DESC, VPO24_DESC);
719SIG_EXPR_LIST_DECL_DUAL(VPOVS, VPO12, VPO24);
720MS_PIN_DECL(V22, GPIOS2, ROMD6, VPOVS);
721
722#define U20 147
723#define U20_DESC SIG_DESC_SET(SCU8C, 3)
724SIG_EXPR_DECL(ROMD7, ROM8, U20_DESC, VPOOFF0_DESC);
725SIG_EXPR_DECL(ROMD7, ROM16, U20_DESC, VPOOFF0_DESC);
726SIG_EXPR_DECL(ROMD7, ROM16S, U20_DESC, VPOOFF0_DESC);
727SIG_EXPR_LIST_DECL(ROMD7, SIG_EXPR_PTR(ROMD7, ROM8),
728 SIG_EXPR_PTR(ROMD7, ROM16),
729 SIG_EXPR_PTR(ROMD7, ROM16S));
730SIG_EXPR_DECL(VPOCLK, VPO12, U20_DESC, VPO12_DESC);
731SIG_EXPR_DECL(VPOCLK, VPO24, U20_DESC, VPO24_DESC);
732SIG_EXPR_LIST_DECL_DUAL(VPOCLK, VPO12, VPO24);
733MS_PIN_DECL(U20, GPIOS3, ROMD7, VPOCLK);
734
735#define R18 148
736#define ROMOE_DESC SIG_DESC_SET(SCU8C, 4)
737SIG_EXPR_LIST_DECL_SINGLE(GPIOS4, GPIOS4);
738SIG_EXPR_DECL(ROMOE, ROM8, ROMOE_DESC);
739SIG_EXPR_DECL(ROMOE, ROM16, ROMOE_DESC);
740SIG_EXPR_DECL(ROMOE, ROM16S, ROMOE_DESC);
741SIG_EXPR_LIST_DECL(ROMOE, SIG_EXPR_PTR(ROMOE, ROM8),
742 SIG_EXPR_PTR(ROMOE, ROM16),
743 SIG_EXPR_PTR(ROMOE, ROM16S));
744MS_PIN_DECL_(R18, SIG_EXPR_LIST_PTR(ROMOE), SIG_EXPR_LIST_PTR(GPIOS4));
745
746#define N21 149
747#define ROMWE_DESC SIG_DESC_SET(SCU8C, 5)
748SIG_EXPR_LIST_DECL_SINGLE(GPIOS5, GPIOS5);
749SIG_EXPR_DECL(ROMWE, ROM8, ROMWE_DESC);
750SIG_EXPR_DECL(ROMWE, ROM16, ROMWE_DESC);
751SIG_EXPR_DECL(ROMWE, ROM16S, ROMWE_DESC);
752SIG_EXPR_LIST_DECL(ROMWE, SIG_EXPR_PTR(ROMWE, ROM8),
753 SIG_EXPR_PTR(ROMWE, ROM16),
754 SIG_EXPR_PTR(ROMWE, ROM16S));
755MS_PIN_DECL_(N21, SIG_EXPR_LIST_PTR(ROMWE), SIG_EXPR_LIST_PTR(GPIOS5));
756
757#define L22 150
758#define L22_DESC SIG_DESC_SET(SCU8C, 6)
759SIG_EXPR_DECL(ROMA22, ROM8, L22_DESC, VPO_OFF_12);
760SIG_EXPR_DECL(ROMA22, ROM16, L22_DESC, VPO_OFF_12);
761SIG_EXPR_DECL(ROMA22, ROM16S, L22_DESC, VPO_OFF_12);
762SIG_EXPR_LIST_DECL(ROMA22, SIG_EXPR_PTR(ROMA22, ROM8),
763 SIG_EXPR_PTR(ROMA22, ROM16),
764 SIG_EXPR_PTR(ROMA22, ROM16S));
765SIG_EXPR_LIST_DECL_SINGLE(VPOR4, VPO24, L22_DESC, VPO_24_OFF);
766MS_PIN_DECL(L22, GPIOS6, ROMA22, VPOR4);
767
768#define K18 151
769#define K18_DESC SIG_DESC_SET(SCU8C, 7)
770SIG_EXPR_DECL(ROMA23, ROM8, K18_DESC, VPO_OFF_12);
771SIG_EXPR_DECL(ROMA23, ROM16, K18_DESC, VPO_OFF_12);
772SIG_EXPR_DECL(ROMA23, ROM16S, K18_DESC, VPO_OFF_12);
773SIG_EXPR_LIST_DECL(ROMA23, SIG_EXPR_PTR(ROMA23, ROM8),
774 SIG_EXPR_PTR(ROMA23, ROM16),
775 SIG_EXPR_PTR(ROMA23, ROM16S));
776SIG_EXPR_LIST_DECL_SINGLE(VPOR5, VPO24, K18_DESC, VPO_24_OFF);
777MS_PIN_DECL(K18, GPIOS7, ROMA23, VPOR5);
778
779FUNC_GROUP_DECL(ROM8, V20, U21, T19, V22, U20, R18, N21, L22, K18, W21, Y22,
780 U19);
781FUNC_GROUP_DECL(ROM16, V20, U21, T19, V22, U20, R18, N21, L22, K18,
782 A8, C7, B7, A7, D7, B6, A6, E7, W21, Y22, U19);
783FUNC_GROUP_DECL(VPO12, U21, T19, V22, U20);
784FUNC_GROUP_DECL(VPO24, U21, T19, V22, U20, L22, K18, V21, W22);
785
786#define RMII1_DESC SIG_DESC_BIT(HW_STRAP1, 6, 0)
787
788#define A12 152
789SIG_EXPR_LIST_DECL_SINGLE(GPIOT0, GPIOT0, SIG_DESC_SET(SCUA0, 0));
790SIG_EXPR_LIST_DECL_SINGLE(RMII1TXEN, RMII1, RMII1_DESC);
791SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCK, RGMII1);
792MS_PIN_DECL_(A12, SIG_EXPR_LIST_PTR(GPIOT0), SIG_EXPR_LIST_PTR(RMII1TXEN),
793 SIG_EXPR_LIST_PTR(RGMII1TXCK));
794
795#define B12 153
796SIG_EXPR_LIST_DECL_SINGLE(GPIOT1, GPIOT1, SIG_DESC_SET(SCUA0, 1));
797SIG_EXPR_LIST_DECL_SINGLE(DASHB12, RMII1, RMII1_DESC);
798SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXCTL, RGMII1);
799MS_PIN_DECL_(B12, SIG_EXPR_LIST_PTR(GPIOT1), SIG_EXPR_LIST_PTR(DASHB12),
800 SIG_EXPR_LIST_PTR(RGMII1TXCTL));
801
802#define C12 154
803SIG_EXPR_LIST_DECL_SINGLE(GPIOT2, GPIOT2, SIG_DESC_SET(SCUA0, 2));
804SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD0, RMII1, RMII1_DESC);
805SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD0, RGMII1);
806MS_PIN_DECL_(C12, SIG_EXPR_LIST_PTR(GPIOT2), SIG_EXPR_LIST_PTR(RMII1TXD0),
807 SIG_EXPR_LIST_PTR(RGMII1TXD0));
808
809#define D12 155
810SIG_EXPR_LIST_DECL_SINGLE(GPIOT3, GPIOT3, SIG_DESC_SET(SCUA0, 3));
811SIG_EXPR_LIST_DECL_SINGLE(RMII1TXD1, RMII1, RMII1_DESC);
812SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD1, RGMII1);
813MS_PIN_DECL_(D12, SIG_EXPR_LIST_PTR(GPIOT3), SIG_EXPR_LIST_PTR(RMII1TXD1),
814 SIG_EXPR_LIST_PTR(RGMII1TXD1));
815
816#define E12 156
817SIG_EXPR_LIST_DECL_SINGLE(GPIOT4, GPIOT4, SIG_DESC_SET(SCUA0, 4));
818SIG_EXPR_LIST_DECL_SINGLE(DASHE12, RMII1, RMII1_DESC);
819SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD2, RGMII1);
820MS_PIN_DECL_(E12, SIG_EXPR_LIST_PTR(GPIOT4), SIG_EXPR_LIST_PTR(DASHE12),
821 SIG_EXPR_LIST_PTR(RGMII1TXD2));
822
823#define A13 157
824SIG_EXPR_LIST_DECL_SINGLE(GPIOT5, GPIOT5, SIG_DESC_SET(SCUA0, 5));
825SIG_EXPR_LIST_DECL_SINGLE(DASHA13, RMII1, RMII1_DESC);
826SIG_EXPR_LIST_DECL_SINGLE(RGMII1TXD3, RGMII1);
827MS_PIN_DECL_(A13, SIG_EXPR_LIST_PTR(GPIOT5), SIG_EXPR_LIST_PTR(DASHA13),
828 SIG_EXPR_LIST_PTR(RGMII1TXD3));
829
830#define E11 164
831SIG_EXPR_LIST_DECL_SINGLE(GPIOU4, GPIOU4, SIG_DESC_SET(SCUA0, 12));
832SIG_EXPR_LIST_DECL_SINGLE(RMII1RCLK, RMII1, RMII1_DESC);
833SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCK, RGMII1);
834MS_PIN_DECL_(E11, SIG_EXPR_LIST_PTR(GPIOU4), SIG_EXPR_LIST_PTR(RMII1RCLK),
835 SIG_EXPR_LIST_PTR(RGMII1RXCK));
836
837#define D11 165
838SIG_EXPR_LIST_DECL_SINGLE(GPIOU5, GPIOU5, SIG_DESC_SET(SCUA0, 13));
839SIG_EXPR_LIST_DECL_SINGLE(DASHD11, RMII1, RMII1_DESC);
840SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXCTL, RGMII1);
841MS_PIN_DECL_(D11, SIG_EXPR_LIST_PTR(GPIOU5), SIG_EXPR_LIST_PTR(DASHD11),
842 SIG_EXPR_LIST_PTR(RGMII1RXCTL));
843
844#define C11 166
845SIG_EXPR_LIST_DECL_SINGLE(GPIOU6, GPIOU6, SIG_DESC_SET(SCUA0, 14));
846SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD0, RMII1, RMII1_DESC);
847SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD0, RGMII1);
848MS_PIN_DECL_(C11, SIG_EXPR_LIST_PTR(GPIOU6), SIG_EXPR_LIST_PTR(RMII1RXD0),
849 SIG_EXPR_LIST_PTR(RGMII1RXD0));
850
851#define B11 167
852SIG_EXPR_LIST_DECL_SINGLE(GPIOU7, GPIOU7, SIG_DESC_SET(SCUA0, 15));
853SIG_EXPR_LIST_DECL_SINGLE(RMII1RXD1, RMII1, RMII1_DESC);
854SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD1, RGMII1);
855MS_PIN_DECL_(B11, SIG_EXPR_LIST_PTR(GPIOU7), SIG_EXPR_LIST_PTR(RMII1RXD1),
856 SIG_EXPR_LIST_PTR(RGMII1RXD1));
857
858#define A11 168
859SIG_EXPR_LIST_DECL_SINGLE(GPIOV0, GPIOV0, SIG_DESC_SET(SCUA0, 16));
860SIG_EXPR_LIST_DECL_SINGLE(RMII1CRSDV, RMII1, RMII1_DESC);
861SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD2, RGMII1);
862MS_PIN_DECL_(A11, SIG_EXPR_LIST_PTR(GPIOV0), SIG_EXPR_LIST_PTR(RMII1CRSDV),
863 SIG_EXPR_LIST_PTR(RGMII1RXD2));
864
865#define E10 169
866SIG_EXPR_LIST_DECL_SINGLE(GPIOV1, GPIOV1, SIG_DESC_SET(SCUA0, 17));
867SIG_EXPR_LIST_DECL_SINGLE(RMII1RXER, RMII1, RMII1_DESC);
868SIG_EXPR_LIST_DECL_SINGLE(RGMII1RXD3, RGMII1);
869MS_PIN_DECL_(E10, SIG_EXPR_LIST_PTR(GPIOV1), SIG_EXPR_LIST_PTR(RMII1RXER),
870 SIG_EXPR_LIST_PTR(RGMII1RXD3));
871
872FUNC_GROUP_DECL(RMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
873 E10);
874FUNC_GROUP_DECL(RGMII1, A12, B12, C12, D12, E12, A13, E11, D11, C11, B11, A11,
875 E10);
876
877/* Note we account for GPIOY4-GPIOY7 even though they're not valid, thus 216
878 * pins becomes 220.
879 */
880#define ASPEED_G4_NR_PINS 220
881
882/* Pins, groups and functions are sort(1):ed alphabetically for sanity */
883
884static struct pinctrl_pin_desc aspeed_g4_pins[ASPEED_G4_NR_PINS] = {
885 ASPEED_PINCTRL_PIN(A1),
886 ASPEED_PINCTRL_PIN(A11),
887 ASPEED_PINCTRL_PIN(A12),
888 ASPEED_PINCTRL_PIN(A13),
889 ASPEED_PINCTRL_PIN(A15),
890 ASPEED_PINCTRL_PIN(A18),
891 ASPEED_PINCTRL_PIN(A2),
892 ASPEED_PINCTRL_PIN(A3),
893 ASPEED_PINCTRL_PIN(A4),
894 ASPEED_PINCTRL_PIN(A5),
895 ASPEED_PINCTRL_PIN(A6),
896 ASPEED_PINCTRL_PIN(A7),
897 ASPEED_PINCTRL_PIN(A8),
898 ASPEED_PINCTRL_PIN(AA2),
899 ASPEED_PINCTRL_PIN(AA22),
900 ASPEED_PINCTRL_PIN(AA3),
901 ASPEED_PINCTRL_PIN(AA7),
902 ASPEED_PINCTRL_PIN(AB1),
903 ASPEED_PINCTRL_PIN(AB2),
904 ASPEED_PINCTRL_PIN(AB7),
905 ASPEED_PINCTRL_PIN(B1),
906 ASPEED_PINCTRL_PIN(B11),
907 ASPEED_PINCTRL_PIN(B12),
908 ASPEED_PINCTRL_PIN(B14),
909 ASPEED_PINCTRL_PIN(B15),
910 ASPEED_PINCTRL_PIN(B19),
911 ASPEED_PINCTRL_PIN(B2),
912 ASPEED_PINCTRL_PIN(B3),
913 ASPEED_PINCTRL_PIN(B4),
914 ASPEED_PINCTRL_PIN(B6),
915 ASPEED_PINCTRL_PIN(B7),
916 ASPEED_PINCTRL_PIN(C1),
917 ASPEED_PINCTRL_PIN(C11),
918 ASPEED_PINCTRL_PIN(C12),
919 ASPEED_PINCTRL_PIN(C14),
920 ASPEED_PINCTRL_PIN(C15),
921 ASPEED_PINCTRL_PIN(C17),
922 ASPEED_PINCTRL_PIN(C2),
923 ASPEED_PINCTRL_PIN(C3),
924 ASPEED_PINCTRL_PIN(C4),
925 ASPEED_PINCTRL_PIN(C5),
926 ASPEED_PINCTRL_PIN(C6),
927 ASPEED_PINCTRL_PIN(C7),
928 ASPEED_PINCTRL_PIN(D1),
929 ASPEED_PINCTRL_PIN(D11),
930 ASPEED_PINCTRL_PIN(D12),
931 ASPEED_PINCTRL_PIN(D14),
932 ASPEED_PINCTRL_PIN(D15),
933 ASPEED_PINCTRL_PIN(D16),
934 ASPEED_PINCTRL_PIN(D17),
935 ASPEED_PINCTRL_PIN(D18),
936 ASPEED_PINCTRL_PIN(D2),
937 ASPEED_PINCTRL_PIN(D3),
938 ASPEED_PINCTRL_PIN(D4),
939 ASPEED_PINCTRL_PIN(D5),
940 ASPEED_PINCTRL_PIN(D7),
941 ASPEED_PINCTRL_PIN(E10),
942 ASPEED_PINCTRL_PIN(E11),
943 ASPEED_PINCTRL_PIN(E12),
944 ASPEED_PINCTRL_PIN(E14),
945 ASPEED_PINCTRL_PIN(E16),
946 ASPEED_PINCTRL_PIN(E2),
947 ASPEED_PINCTRL_PIN(E3),
948 ASPEED_PINCTRL_PIN(E5),
949 ASPEED_PINCTRL_PIN(E7),
950 ASPEED_PINCTRL_PIN(F3),
951 ASPEED_PINCTRL_PIN(F4),
952 ASPEED_PINCTRL_PIN(F5),
953 ASPEED_PINCTRL_PIN(G5),
954 ASPEED_PINCTRL_PIN(H1),
955 ASPEED_PINCTRL_PIN(H19),
956 ASPEED_PINCTRL_PIN(H2),
957 ASPEED_PINCTRL_PIN(H20),
958 ASPEED_PINCTRL_PIN(J3),
959 ASPEED_PINCTRL_PIN(K18),
960 ASPEED_PINCTRL_PIN(L22),
961 ASPEED_PINCTRL_PIN(N21),
962 ASPEED_PINCTRL_PIN(R18),
963 ASPEED_PINCTRL_PIN(T1),
964 ASPEED_PINCTRL_PIN(T19),
965 ASPEED_PINCTRL_PIN(T2),
966 ASPEED_PINCTRL_PIN(T4),
967 ASPEED_PINCTRL_PIN(T5),
968 ASPEED_PINCTRL_PIN(U1),
969 ASPEED_PINCTRL_PIN(U18),
970 ASPEED_PINCTRL_PIN(U19),
971 ASPEED_PINCTRL_PIN(U2),
972 ASPEED_PINCTRL_PIN(U20),
973 ASPEED_PINCTRL_PIN(U21),
974 ASPEED_PINCTRL_PIN(U3),
975 ASPEED_PINCTRL_PIN(U4),
976 ASPEED_PINCTRL_PIN(U5),
977 ASPEED_PINCTRL_PIN(V1),
978 ASPEED_PINCTRL_PIN(V2),
979 ASPEED_PINCTRL_PIN(V20),
980 ASPEED_PINCTRL_PIN(V21),
981 ASPEED_PINCTRL_PIN(V22),
982 ASPEED_PINCTRL_PIN(V6),
983 ASPEED_PINCTRL_PIN(W1),
984 ASPEED_PINCTRL_PIN(W21),
985 ASPEED_PINCTRL_PIN(W22),
986 ASPEED_PINCTRL_PIN(W4),
987 ASPEED_PINCTRL_PIN(W5),
988 ASPEED_PINCTRL_PIN(Y22),
989 ASPEED_PINCTRL_PIN(Y3),
990 ASPEED_PINCTRL_PIN(Y4),
991 ASPEED_PINCTRL_PIN(Y5),
992 ASPEED_PINCTRL_PIN(Y7),
993};
994
995static const struct aspeed_pin_group aspeed_g4_groups[] = {
996 ASPEED_PINCTRL_GROUP(ACPI),
997 ASPEED_PINCTRL_GROUP(BMCINT),
998 ASPEED_PINCTRL_GROUP(DDCCLK),
999 ASPEED_PINCTRL_GROUP(DDCDAT),
1000 ASPEED_PINCTRL_GROUP(FLACK),
1001 ASPEED_PINCTRL_GROUP(FLBUSY),
1002 ASPEED_PINCTRL_GROUP(FLWP),
1003 ASPEED_PINCTRL_GROUP(GPID0),
1004 ASPEED_PINCTRL_GROUP(GPIE0),
1005 ASPEED_PINCTRL_GROUP(GPIE2),
1006 ASPEED_PINCTRL_GROUP(GPIE4),
1007 ASPEED_PINCTRL_GROUP(GPIE6),
1008 ASPEED_PINCTRL_GROUP(I2C10),
1009 ASPEED_PINCTRL_GROUP(I2C11),
1010 ASPEED_PINCTRL_GROUP(I2C12),
1011 ASPEED_PINCTRL_GROUP(I2C13),
1012 ASPEED_PINCTRL_GROUP(I2C3),
1013 ASPEED_PINCTRL_GROUP(I2C4),
1014 ASPEED_PINCTRL_GROUP(I2C5),
1015 ASPEED_PINCTRL_GROUP(I2C6),
1016 ASPEED_PINCTRL_GROUP(I2C7),
1017 ASPEED_PINCTRL_GROUP(I2C8),
1018 ASPEED_PINCTRL_GROUP(I2C9),
1019 ASPEED_PINCTRL_GROUP(LPCPD),
1020 ASPEED_PINCTRL_GROUP(LPCPME),
1021 ASPEED_PINCTRL_GROUP(LPCPME),
1022 ASPEED_PINCTRL_GROUP(LPCSMI),
1023 ASPEED_PINCTRL_GROUP(MDIO1),
1024 ASPEED_PINCTRL_GROUP(MDIO2),
1025 ASPEED_PINCTRL_GROUP(NCTS1),
1026 ASPEED_PINCTRL_GROUP(NCTS3),
1027 ASPEED_PINCTRL_GROUP(NCTS4),
1028 ASPEED_PINCTRL_GROUP(NDCD1),
1029 ASPEED_PINCTRL_GROUP(NDCD3),
1030 ASPEED_PINCTRL_GROUP(NDCD4),
1031 ASPEED_PINCTRL_GROUP(NDSR1),
1032 ASPEED_PINCTRL_GROUP(NDSR3),
1033 ASPEED_PINCTRL_GROUP(NDTR1),
1034 ASPEED_PINCTRL_GROUP(NDTR3),
1035 ASPEED_PINCTRL_GROUP(NRI1),
1036 ASPEED_PINCTRL_GROUP(NRI3),
1037 ASPEED_PINCTRL_GROUP(NRI4),
1038 ASPEED_PINCTRL_GROUP(NRTS1),
1039 ASPEED_PINCTRL_GROUP(NRTS3),
1040 ASPEED_PINCTRL_GROUP(PWM0),
1041 ASPEED_PINCTRL_GROUP(PWM1),
1042 ASPEED_PINCTRL_GROUP(PWM2),
1043 ASPEED_PINCTRL_GROUP(PWM3),
1044 ASPEED_PINCTRL_GROUP(PWM4),
1045 ASPEED_PINCTRL_GROUP(PWM5),
1046 ASPEED_PINCTRL_GROUP(PWM6),
1047 ASPEED_PINCTRL_GROUP(PWM7),
1048 ASPEED_PINCTRL_GROUP(RGMII1),
1049 ASPEED_PINCTRL_GROUP(RMII1),
1050 ASPEED_PINCTRL_GROUP(ROM16),
1051 ASPEED_PINCTRL_GROUP(ROM8),
1052 ASPEED_PINCTRL_GROUP(ROMCS1),
1053 ASPEED_PINCTRL_GROUP(ROMCS2),
1054 ASPEED_PINCTRL_GROUP(ROMCS3),
1055 ASPEED_PINCTRL_GROUP(ROMCS4),
1056 ASPEED_PINCTRL_GROUP(RXD1),
1057 ASPEED_PINCTRL_GROUP(RXD3),
1058 ASPEED_PINCTRL_GROUP(RXD4),
1059 ASPEED_PINCTRL_GROUP(SD1),
1060 ASPEED_PINCTRL_GROUP(SGPMI),
1061 ASPEED_PINCTRL_GROUP(SIOPBI),
1062 ASPEED_PINCTRL_GROUP(SIOPBO),
1063 ASPEED_PINCTRL_GROUP(TIMER3),
1064 ASPEED_PINCTRL_GROUP(TIMER5),
1065 ASPEED_PINCTRL_GROUP(TIMER6),
1066 ASPEED_PINCTRL_GROUP(TIMER7),
1067 ASPEED_PINCTRL_GROUP(TIMER8),
1068 ASPEED_PINCTRL_GROUP(TXD1),
1069 ASPEED_PINCTRL_GROUP(TXD3),
1070 ASPEED_PINCTRL_GROUP(TXD4),
1071 ASPEED_PINCTRL_GROUP(UART6),
1072 ASPEED_PINCTRL_GROUP(VGAHS),
1073 ASPEED_PINCTRL_GROUP(VGAVS),
1074 ASPEED_PINCTRL_GROUP(VPI18),
1075 ASPEED_PINCTRL_GROUP(VPI24),
1076 ASPEED_PINCTRL_GROUP(VPI30),
1077 ASPEED_PINCTRL_GROUP(VPO12),
1078 ASPEED_PINCTRL_GROUP(VPO24),
1079};
1080
1081static const struct aspeed_pin_function aspeed_g4_functions[] = {
1082 ASPEED_PINCTRL_FUNC(ACPI),
1083 ASPEED_PINCTRL_FUNC(BMCINT),
1084 ASPEED_PINCTRL_FUNC(DDCCLK),
1085 ASPEED_PINCTRL_FUNC(DDCDAT),
1086 ASPEED_PINCTRL_FUNC(FLACK),
1087 ASPEED_PINCTRL_FUNC(FLBUSY),
1088 ASPEED_PINCTRL_FUNC(FLWP),
1089 ASPEED_PINCTRL_FUNC(GPID0),
1090 ASPEED_PINCTRL_FUNC(GPIE0),
1091 ASPEED_PINCTRL_FUNC(GPIE2),
1092 ASPEED_PINCTRL_FUNC(GPIE4),
1093 ASPEED_PINCTRL_FUNC(GPIE6),
1094 ASPEED_PINCTRL_FUNC(I2C10),
1095 ASPEED_PINCTRL_FUNC(I2C11),
1096 ASPEED_PINCTRL_FUNC(I2C12),
1097 ASPEED_PINCTRL_FUNC(I2C13),
1098 ASPEED_PINCTRL_FUNC(I2C3),
1099 ASPEED_PINCTRL_FUNC(I2C4),
1100 ASPEED_PINCTRL_FUNC(I2C5),
1101 ASPEED_PINCTRL_FUNC(I2C6),
1102 ASPEED_PINCTRL_FUNC(I2C7),
1103 ASPEED_PINCTRL_FUNC(I2C8),
1104 ASPEED_PINCTRL_FUNC(I2C9),
1105 ASPEED_PINCTRL_FUNC(LPCPD),
1106 ASPEED_PINCTRL_FUNC(LPCPME),
1107 ASPEED_PINCTRL_FUNC(LPCSMI),
1108 ASPEED_PINCTRL_FUNC(MDIO1),
1109 ASPEED_PINCTRL_FUNC(MDIO2),
1110 ASPEED_PINCTRL_FUNC(NCTS1),
1111 ASPEED_PINCTRL_FUNC(NCTS3),
1112 ASPEED_PINCTRL_FUNC(NCTS4),
1113 ASPEED_PINCTRL_FUNC(NDCD1),
1114 ASPEED_PINCTRL_FUNC(NDCD3),
1115 ASPEED_PINCTRL_FUNC(NDCD4),
1116 ASPEED_PINCTRL_FUNC(NDSR1),
1117 ASPEED_PINCTRL_FUNC(NDSR3),
1118 ASPEED_PINCTRL_FUNC(NDTR1),
1119 ASPEED_PINCTRL_FUNC(NDTR3),
1120 ASPEED_PINCTRL_FUNC(NRI1),
1121 ASPEED_PINCTRL_FUNC(NRI3),
1122 ASPEED_PINCTRL_FUNC(NRI4),
1123 ASPEED_PINCTRL_FUNC(NRTS1),
1124 ASPEED_PINCTRL_FUNC(NRTS3),
1125 ASPEED_PINCTRL_FUNC(PWM0),
1126 ASPEED_PINCTRL_FUNC(PWM1),
1127 ASPEED_PINCTRL_FUNC(PWM2),
1128 ASPEED_PINCTRL_FUNC(PWM3),
1129 ASPEED_PINCTRL_FUNC(PWM4),
1130 ASPEED_PINCTRL_FUNC(PWM5),
1131 ASPEED_PINCTRL_FUNC(PWM6),
1132 ASPEED_PINCTRL_FUNC(PWM7),
1133 ASPEED_PINCTRL_FUNC(RGMII1),
1134 ASPEED_PINCTRL_FUNC(RMII1),
1135 ASPEED_PINCTRL_FUNC(ROM16),
1136 ASPEED_PINCTRL_FUNC(ROM8),
1137 ASPEED_PINCTRL_FUNC(ROMCS1),
1138 ASPEED_PINCTRL_FUNC(ROMCS2),
1139 ASPEED_PINCTRL_FUNC(ROMCS3),
1140 ASPEED_PINCTRL_FUNC(ROMCS4),
1141 ASPEED_PINCTRL_FUNC(RXD1),
1142 ASPEED_PINCTRL_FUNC(RXD3),
1143 ASPEED_PINCTRL_FUNC(RXD4),
1144 ASPEED_PINCTRL_FUNC(SD1),
1145 ASPEED_PINCTRL_FUNC(SGPMI),
1146 ASPEED_PINCTRL_FUNC(SIOPBI),
1147 ASPEED_PINCTRL_FUNC(SIOPBO),
1148 ASPEED_PINCTRL_FUNC(TIMER3),
1149 ASPEED_PINCTRL_FUNC(TIMER5),
1150 ASPEED_PINCTRL_FUNC(TIMER6),
1151 ASPEED_PINCTRL_FUNC(TIMER7),
1152 ASPEED_PINCTRL_FUNC(TIMER8),
1153 ASPEED_PINCTRL_FUNC(TXD1),
1154 ASPEED_PINCTRL_FUNC(TXD3),
1155 ASPEED_PINCTRL_FUNC(TXD4),
1156 ASPEED_PINCTRL_FUNC(UART6),
1157 ASPEED_PINCTRL_FUNC(VGAHS),
1158 ASPEED_PINCTRL_FUNC(VGAVS),
1159 ASPEED_PINCTRL_FUNC(VPI18),
1160 ASPEED_PINCTRL_FUNC(VPI24),
1161 ASPEED_PINCTRL_FUNC(VPI30),
1162 ASPEED_PINCTRL_FUNC(VPO12),
1163 ASPEED_PINCTRL_FUNC(VPO24),
1164};
1165
1166static struct aspeed_pinctrl_data aspeed_g4_pinctrl_data = {
1167 .pins = aspeed_g4_pins,
1168 .npins = ARRAY_SIZE(aspeed_g4_pins),
1169 .groups = aspeed_g4_groups,
1170 .ngroups = ARRAY_SIZE(aspeed_g4_groups),
1171 .functions = aspeed_g4_functions,
1172 .nfunctions = ARRAY_SIZE(aspeed_g4_functions),
1173};
1174
1175static struct pinmux_ops aspeed_g4_pinmux_ops = {
1176 .get_functions_count = aspeed_pinmux_get_fn_count,
1177 .get_function_name = aspeed_pinmux_get_fn_name,
1178 .get_function_groups = aspeed_pinmux_get_fn_groups,
1179 .set_mux = aspeed_pinmux_set_mux,
1180 .gpio_request_enable = aspeed_gpio_request_enable,
1181 .strict = true,
1182};
1183
1184static struct pinctrl_ops aspeed_g4_pinctrl_ops = {
1185 .get_groups_count = aspeed_pinctrl_get_groups_count,
1186 .get_group_name = aspeed_pinctrl_get_group_name,
1187 .get_group_pins = aspeed_pinctrl_get_group_pins,
1188 .pin_dbg_show = aspeed_pinctrl_pin_dbg_show,
1189 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
1190 .dt_free_map = pinctrl_utils_free_map,
1191};
1192
1193static struct pinctrl_desc aspeed_g4_pinctrl_desc = {
1194 .name = "aspeed-g4-pinctrl",
1195 .pins = aspeed_g4_pins,
1196 .npins = ARRAY_SIZE(aspeed_g4_pins),
1197 .pctlops = &aspeed_g4_pinctrl_ops,
1198 .pmxops = &aspeed_g4_pinmux_ops,
1199};
1200
1201static int aspeed_g4_pinctrl_probe(struct platform_device *pdev)
1202{
1203 int i;
1204
1205 for (i = 0; i < ARRAY_SIZE(aspeed_g4_pins); i++)
1206 aspeed_g4_pins[i].number = i;
1207
1208 return aspeed_pinctrl_probe(pdev, &aspeed_g4_pinctrl_desc,
1209 &aspeed_g4_pinctrl_data);
1210}
1211
1212static const struct of_device_id aspeed_g4_pinctrl_of_match[] = {
1213 { .compatible = "aspeed,ast2400-pinctrl", },
1214 { .compatible = "aspeed,g4-pinctrl", },
1215 { },
1216};
1217
1218static struct platform_driver aspeed_g4_pinctrl_driver = {
1219 .probe = aspeed_g4_pinctrl_probe,
1220 .driver = {
1221 .name = "aspeed-g4-pinctrl",
1222 .of_match_table = aspeed_g4_pinctrl_of_match,
1223 },
1224};
1225
1226static int aspeed_g4_pinctrl_init(void)
1227{
1228 return platform_driver_register(&aspeed_g4_pinctrl_driver);
1229}
1230
1231arch_initcall(aspeed_g4_pinctrl_init);