Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

at v4.10 254 lines 8.0 kB view raw
1/* 2 * ASIX AX8817X based USB 2.0 Ethernet Devices 3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com> 4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net> 5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com> 6 * Copyright (c) 2002-2003 TiVo Inc. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, see <http://www.gnu.org/licenses/>. 20 */ 21 22#ifndef _ASIX_H 23#define _ASIX_H 24 25// #define DEBUG // error path messages, extra info 26// #define VERBOSE // more; success messages 27 28#include <linux/module.h> 29#include <linux/kmod.h> 30#include <linux/netdevice.h> 31#include <linux/etherdevice.h> 32#include <linux/ethtool.h> 33#include <linux/workqueue.h> 34#include <linux/mii.h> 35#include <linux/usb.h> 36#include <linux/crc32.h> 37#include <linux/usb/usbnet.h> 38#include <linux/slab.h> 39#include <linux/if_vlan.h> 40 41#define DRIVER_VERSION "22-Dec-2011" 42#define DRIVER_NAME "asix" 43 44/* ASIX AX8817X based USB 2.0 Ethernet Devices */ 45 46#define AX_CMD_SET_SW_MII 0x06 47#define AX_CMD_READ_MII_REG 0x07 48#define AX_CMD_WRITE_MII_REG 0x08 49#define AX_CMD_STATMNGSTS_REG 0x09 50#define AX_CMD_SET_HW_MII 0x0a 51#define AX_CMD_READ_EEPROM 0x0b 52#define AX_CMD_WRITE_EEPROM 0x0c 53#define AX_CMD_WRITE_ENABLE 0x0d 54#define AX_CMD_WRITE_DISABLE 0x0e 55#define AX_CMD_READ_RX_CTL 0x0f 56#define AX_CMD_WRITE_RX_CTL 0x10 57#define AX_CMD_READ_IPG012 0x11 58#define AX_CMD_WRITE_IPG0 0x12 59#define AX_CMD_WRITE_IPG1 0x13 60#define AX_CMD_READ_NODE_ID 0x13 61#define AX_CMD_WRITE_NODE_ID 0x14 62#define AX_CMD_WRITE_IPG2 0x14 63#define AX_CMD_WRITE_MULTI_FILTER 0x16 64#define AX88172_CMD_READ_NODE_ID 0x17 65#define AX_CMD_READ_PHY_ID 0x19 66#define AX_CMD_READ_MEDIUM_STATUS 0x1a 67#define AX_CMD_WRITE_MEDIUM_MODE 0x1b 68#define AX_CMD_READ_MONITOR_MODE 0x1c 69#define AX_CMD_WRITE_MONITOR_MODE 0x1d 70#define AX_CMD_READ_GPIOS 0x1e 71#define AX_CMD_WRITE_GPIOS 0x1f 72#define AX_CMD_SW_RESET 0x20 73#define AX_CMD_SW_PHY_STATUS 0x21 74#define AX_CMD_SW_PHY_SELECT 0x22 75#define AX_QCTCTRL 0x2A 76 77#define AX_CHIPCODE_MASK 0x70 78#define AX_AX88772_CHIPCODE 0x00 79#define AX_AX88772A_CHIPCODE 0x10 80#define AX_AX88772B_CHIPCODE 0x20 81#define AX_HOST_EN 0x01 82 83#define AX_PHYSEL_PSEL 0x01 84#define AX_PHYSEL_SSMII 0 85#define AX_PHYSEL_SSEN 0x10 86 87#define AX_PHY_SELECT_MASK (BIT(3) | BIT(2)) 88#define AX_PHY_SELECT_INTERNAL 0 89#define AX_PHY_SELECT_EXTERNAL BIT(2) 90 91#define AX_MONITOR_MODE 0x01 92#define AX_MONITOR_LINK 0x02 93#define AX_MONITOR_MAGIC 0x04 94#define AX_MONITOR_HSFS 0x10 95 96/* AX88172 Medium Status Register values */ 97#define AX88172_MEDIUM_FD 0x02 98#define AX88172_MEDIUM_TX 0x04 99#define AX88172_MEDIUM_FC 0x10 100#define AX88172_MEDIUM_DEFAULT \ 101 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC ) 102 103#define AX_MCAST_FILTER_SIZE 8 104#define AX_MAX_MCAST 64 105 106#define AX_SWRESET_CLEAR 0x00 107#define AX_SWRESET_RR 0x01 108#define AX_SWRESET_RT 0x02 109#define AX_SWRESET_PRTE 0x04 110#define AX_SWRESET_PRL 0x08 111#define AX_SWRESET_BZ 0x10 112#define AX_SWRESET_IPRL 0x20 113#define AX_SWRESET_IPPD 0x40 114 115#define AX88772_IPG0_DEFAULT 0x15 116#define AX88772_IPG1_DEFAULT 0x0c 117#define AX88772_IPG2_DEFAULT 0x12 118 119/* AX88772 & AX88178 Medium Mode Register */ 120#define AX_MEDIUM_PF 0x0080 121#define AX_MEDIUM_JFE 0x0040 122#define AX_MEDIUM_TFC 0x0020 123#define AX_MEDIUM_RFC 0x0010 124#define AX_MEDIUM_ENCK 0x0008 125#define AX_MEDIUM_AC 0x0004 126#define AX_MEDIUM_FD 0x0002 127#define AX_MEDIUM_GM 0x0001 128#define AX_MEDIUM_SM 0x1000 129#define AX_MEDIUM_SBP 0x0800 130#define AX_MEDIUM_PS 0x0200 131#define AX_MEDIUM_RE 0x0100 132 133#define AX88178_MEDIUM_DEFAULT \ 134 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \ 135 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \ 136 AX_MEDIUM_RE) 137 138#define AX88772_MEDIUM_DEFAULT \ 139 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \ 140 AX_MEDIUM_TFC | AX_MEDIUM_PS | \ 141 AX_MEDIUM_AC | AX_MEDIUM_RE) 142 143/* AX88772 & AX88178 RX_CTL values */ 144#define AX_RX_CTL_SO 0x0080 145#define AX_RX_CTL_AP 0x0020 146#define AX_RX_CTL_AM 0x0010 147#define AX_RX_CTL_AB 0x0008 148#define AX_RX_CTL_SEP 0x0004 149#define AX_RX_CTL_AMALL 0x0002 150#define AX_RX_CTL_PRO 0x0001 151#define AX_RX_CTL_MFB_2048 0x0000 152#define AX_RX_CTL_MFB_4096 0x0100 153#define AX_RX_CTL_MFB_8192 0x0200 154#define AX_RX_CTL_MFB_16384 0x0300 155 156#define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB) 157 158/* GPIO 0 .. 2 toggles */ 159#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */ 160#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */ 161#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */ 162#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */ 163#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */ 164#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */ 165#define AX_GPIO_RESERVED 0x40 /* Reserved */ 166#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */ 167 168#define AX_EEPROM_MAGIC 0xdeadbeef 169#define AX_EEPROM_LEN 0x200 170 171/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */ 172struct asix_data { 173 u8 multi_filter[AX_MCAST_FILTER_SIZE]; 174 u8 mac_addr[ETH_ALEN]; 175 u8 phymode; 176 u8 ledmode; 177 u8 res; 178}; 179 180struct asix_rx_fixup_info { 181 struct sk_buff *ax_skb; 182 u32 header; 183 u16 remaining; 184 bool split_head; 185}; 186 187struct asix_common_private { 188 void (*resume)(struct usbnet *dev); 189 void (*suspend)(struct usbnet *dev); 190 u16 presvd_phy_advertise; 191 u16 presvd_phy_bmcr; 192 struct asix_rx_fixup_info rx_fixup_info; 193}; 194 195extern const struct driver_info ax88172a_info; 196 197/* ASIX specific flags */ 198#define FLAG_EEPROM_MAC (1UL << 0) /* init device MAC from eeprom */ 199 200int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, 201 u16 size, void *data, int in_pm); 202 203int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index, 204 u16 size, void *data, int in_pm); 205 206void asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, 207 u16 index, u16 size, void *data); 208 209int asix_rx_fixup_internal(struct usbnet *dev, struct sk_buff *skb, 210 struct asix_rx_fixup_info *rx); 211int asix_rx_fixup_common(struct usbnet *dev, struct sk_buff *skb); 212 213struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb, 214 gfp_t flags); 215 216int asix_set_sw_mii(struct usbnet *dev, int in_pm); 217int asix_set_hw_mii(struct usbnet *dev, int in_pm); 218 219int asix_read_phy_addr(struct usbnet *dev, int internal); 220int asix_get_phy_addr(struct usbnet *dev); 221 222int asix_sw_reset(struct usbnet *dev, u8 flags, int in_pm); 223 224u16 asix_read_rx_ctl(struct usbnet *dev, int in_pm); 225int asix_write_rx_ctl(struct usbnet *dev, u16 mode, int in_pm); 226 227u16 asix_read_medium_status(struct usbnet *dev, int in_pm); 228int asix_write_medium_mode(struct usbnet *dev, u16 mode, int in_pm); 229 230int asix_write_gpio(struct usbnet *dev, u16 value, int sleep, int in_pm); 231 232void asix_set_multicast(struct net_device *net); 233 234int asix_mdio_read(struct net_device *netdev, int phy_id, int loc); 235void asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val); 236 237int asix_mdio_read_nopm(struct net_device *netdev, int phy_id, int loc); 238void asix_mdio_write_nopm(struct net_device *netdev, int phy_id, int loc, 239 int val); 240 241void asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo); 242int asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo); 243 244int asix_get_eeprom_len(struct net_device *net); 245int asix_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom, 246 u8 *data); 247int asix_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom, 248 u8 *data); 249 250void asix_get_drvinfo(struct net_device *net, struct ethtool_drvinfo *info); 251 252int asix_set_mac_address(struct net_device *net, void *p); 253 254#endif /* _ASIX_H */