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Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/*
2 * Copyright (C) ST-Ericsson SA 2011
3 *
4 * License Terms: GNU General Public License v2
5 * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson
6 * Author: Sundar Iyer for ST-Ericsson
7 * sched_clock implementation is based on:
8 * plat-nomadik/timer.c Linus Walleij <linus.walleij@stericsson.com>
9 *
10 * DBx500-PRCMU Timer
11 * The PRCMU has 5 timers which are available in a always-on
12 * power domain. We use the Timer 4 for our always-on clock
13 * source on DB8500.
14 */
15#include <linux/of.h>
16#include <linux/of_address.h>
17#include <linux/clockchips.h>
18#include <linux/sched_clock.h>
19
20#define RATE_32K 32768
21
22#define TIMER_MODE_CONTINOUS 0x1
23#define TIMER_DOWNCOUNT_VAL 0xffffffff
24
25#define PRCMU_TIMER_REF 0
26#define PRCMU_TIMER_DOWNCOUNT 0x4
27#define PRCMU_TIMER_MODE 0x8
28
29#define SCHED_CLOCK_MIN_WRAP 131072 /* 2^32 / 32768 */
30
31static void __iomem *clksrc_dbx500_timer_base;
32
33static u64 notrace clksrc_dbx500_prcmu_read(struct clocksource *cs)
34{
35 void __iomem *base = clksrc_dbx500_timer_base;
36 u32 count, count2;
37
38 do {
39 count = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT);
40 count2 = readl_relaxed(base + PRCMU_TIMER_DOWNCOUNT);
41 } while (count2 != count);
42
43 /* Negate because the timer is a decrementing counter */
44 return ~count;
45}
46
47static struct clocksource clocksource_dbx500_prcmu = {
48 .name = "dbx500-prcmu-timer",
49 .rating = 300,
50 .read = clksrc_dbx500_prcmu_read,
51 .mask = CLOCKSOURCE_MASK(32),
52 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
53};
54
55#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
56
57static u64 notrace dbx500_prcmu_sched_clock_read(void)
58{
59 if (unlikely(!clksrc_dbx500_timer_base))
60 return 0;
61
62 return clksrc_dbx500_prcmu_read(&clocksource_dbx500_prcmu);
63}
64
65#endif
66
67static int __init clksrc_dbx500_prcmu_init(struct device_node *node)
68{
69 clksrc_dbx500_timer_base = of_iomap(node, 0);
70
71 /*
72 * The A9 sub system expects the timer to be configured as
73 * a continous looping timer.
74 * The PRCMU should configure it but if it for some reason
75 * don't we do it here.
76 */
77 if (readl(clksrc_dbx500_timer_base + PRCMU_TIMER_MODE) !=
78 TIMER_MODE_CONTINOUS) {
79 writel(TIMER_MODE_CONTINOUS,
80 clksrc_dbx500_timer_base + PRCMU_TIMER_MODE);
81 writel(TIMER_DOWNCOUNT_VAL,
82 clksrc_dbx500_timer_base + PRCMU_TIMER_REF);
83 }
84#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
85 sched_clock_register(dbx500_prcmu_sched_clock_read, 32, RATE_32K);
86#endif
87 return clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
88}
89CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4",
90 clksrc_dbx500_prcmu_init);