Linux kernel mirror (for testing)
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linux
1#ifndef __LINUX_GPIO_DRIVER_H
2#define __LINUX_GPIO_DRIVER_H
3
4#include <linux/types.h>
5#include <linux/module.h>
6#include <linux/irq.h>
7#include <linux/irqchip/chained_irq.h>
8#include <linux/irqdomain.h>
9
10struct device;
11struct gpio_desc;
12struct of_phandle_args;
13struct device_node;
14struct seq_file;
15
16#ifdef CONFIG_GPIOLIB
17
18/**
19 * struct gpio_chip - abstract a GPIO controller
20 * @label: for diagnostics
21 * @dev: optional device providing the GPIOs
22 * @owner: helps prevent removal of modules exporting active GPIOs
23 * @list: links gpio_chips together for traversal
24 * @request: optional hook for chip-specific activation, such as
25 * enabling module power and clock; may sleep
26 * @free: optional hook for chip-specific deactivation, such as
27 * disabling module power and clock; may sleep
28 * @get_direction: returns direction for signal "offset", 0=out, 1=in,
29 * (same as GPIOF_DIR_XXX), or negative error
30 * @direction_input: configures signal "offset" as input, or returns error
31 * @direction_output: configures signal "offset" as output, or returns error
32 * @get: returns value for signal "offset"; for output signals this
33 * returns either the value actually sensed, or zero
34 * @set: assigns output value for signal "offset"
35 * @set_multiple: assigns output values for multiple signals defined by "mask"
36 * @set_debounce: optional hook for setting debounce time for specified gpio in
37 * interrupt triggered gpio chips
38 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
39 * implementation may not sleep
40 * @dbg_show: optional routine to show contents in debugfs; default code
41 * will be used when this is omitted, but custom code can show extra
42 * state (such as pullup/pulldown configuration).
43 * @base: identifies the first GPIO number handled by this chip; or, if
44 * negative during registration, requests dynamic ID allocation.
45 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
46 * handled is (base + ngpio - 1).
47 * @desc: array of ngpio descriptors. Private.
48 * @names: if set, must be an array of strings to use as alternative
49 * names for the GPIOs in this chip. Any entry in the array
50 * may be NULL if there is no alias for the GPIO, however the
51 * array must be @ngpio entries long. A name can include a single printk
52 * format specifier for an unsigned int. It is substituted by the actual
53 * number of the gpio.
54 * @can_sleep: flag must be set iff get()/set() methods sleep, as they
55 * must while accessing GPIO expander chips over I2C or SPI. This
56 * implies that if the chip supports IRQs, these IRQs need to be threaded
57 * as the chip access may sleep when e.g. reading out the IRQ status
58 * registers.
59 * @exported: flags if the gpiochip is exported for use from sysfs. Private.
60 * @irq_not_threaded: flag must be set if @can_sleep is set but the
61 * IRQs don't need to be threaded
62 *
63 * A gpio_chip can help platforms abstract various sources of GPIOs so
64 * they can all be accessed through a common programing interface.
65 * Example sources would be SOC controllers, FPGAs, multifunction
66 * chips, dedicated GPIO expanders, and so on.
67 *
68 * Each chip controls a number of signals, identified in method calls
69 * by "offset" values in the range 0..(@ngpio - 1). When those signals
70 * are referenced through calls like gpio_get_value(gpio), the offset
71 * is calculated by subtracting @base from the gpio number.
72 */
73struct gpio_chip {
74 const char *label;
75 struct device *dev;
76 struct module *owner;
77 struct list_head list;
78
79 int (*request)(struct gpio_chip *chip,
80 unsigned offset);
81 void (*free)(struct gpio_chip *chip,
82 unsigned offset);
83 int (*get_direction)(struct gpio_chip *chip,
84 unsigned offset);
85 int (*direction_input)(struct gpio_chip *chip,
86 unsigned offset);
87 int (*direction_output)(struct gpio_chip *chip,
88 unsigned offset, int value);
89 int (*get)(struct gpio_chip *chip,
90 unsigned offset);
91 void (*set)(struct gpio_chip *chip,
92 unsigned offset, int value);
93 void (*set_multiple)(struct gpio_chip *chip,
94 unsigned long *mask,
95 unsigned long *bits);
96 int (*set_debounce)(struct gpio_chip *chip,
97 unsigned offset,
98 unsigned debounce);
99
100 int (*to_irq)(struct gpio_chip *chip,
101 unsigned offset);
102
103 void (*dbg_show)(struct seq_file *s,
104 struct gpio_chip *chip);
105 int base;
106 u16 ngpio;
107 struct gpio_desc *desc;
108 const char *const *names;
109 bool can_sleep;
110 bool irq_not_threaded;
111 bool exported;
112
113#ifdef CONFIG_GPIOLIB_IRQCHIP
114 /*
115 * With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
116 * to handle IRQs for most practical cases.
117 */
118 struct irq_chip *irqchip;
119 struct irq_domain *irqdomain;
120 unsigned int irq_base;
121 irq_flow_handler_t irq_handler;
122 unsigned int irq_default_type;
123#endif
124
125#if defined(CONFIG_OF_GPIO)
126 /*
127 * If CONFIG_OF is enabled, then all GPIO controllers described in the
128 * device tree automatically may have an OF translation
129 */
130 struct device_node *of_node;
131 int of_gpio_n_cells;
132 int (*of_xlate)(struct gpio_chip *gc,
133 const struct of_phandle_args *gpiospec, u32 *flags);
134#endif
135#ifdef CONFIG_PINCTRL
136 /*
137 * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
138 * describe the actual pin range which they serve in an SoC. This
139 * information would be used by pinctrl subsystem to configure
140 * corresponding pins for gpio usage.
141 */
142 struct list_head pin_ranges;
143#endif
144};
145
146extern const char *gpiochip_is_requested(struct gpio_chip *chip,
147 unsigned offset);
148
149/* add/remove chips */
150extern int gpiochip_add(struct gpio_chip *chip);
151extern void gpiochip_remove(struct gpio_chip *chip);
152extern struct gpio_chip *gpiochip_find(void *data,
153 int (*match)(struct gpio_chip *chip, void *data));
154
155/* lock/unlock as IRQ */
156int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset);
157void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset);
158
159struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
160
161#ifdef CONFIG_GPIOLIB_IRQCHIP
162
163void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
164 struct irq_chip *irqchip,
165 int parent_irq,
166 irq_flow_handler_t parent_handler);
167
168int gpiochip_irqchip_add(struct gpio_chip *gpiochip,
169 struct irq_chip *irqchip,
170 unsigned int first_irq,
171 irq_flow_handler_t handler,
172 unsigned int type);
173
174#endif /* CONFIG_GPIOLIB_IRQCHIP */
175
176struct gpio_desc *gpiochip_request_own_desc(struct gpio_chip *chip, u16 hwnum,
177 const char *label);
178void gpiochip_free_own_desc(struct gpio_desc *desc);
179
180#else /* CONFIG_GPIOLIB */
181
182static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc)
183{
184 /* GPIO can never have been requested */
185 WARN_ON(1);
186 return ERR_PTR(-ENODEV);
187}
188
189#endif /* CONFIG_GPIOLIB */
190
191#endif