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1NVIDIA Tegra124 and Tegra132 Clock And Reset Controller
2
3This binding uses the common clock binding:
4Documentation/devicetree/bindings/clock/clock-bindings.txt
5
6The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
7for muxing and gating Tegra's clocks, and setting their rates.
8
9Required properties :
10- compatible : Should be "nvidia,tegra124-car" or "nvidia,tegra132-car"
11- reg : Should contain CAR registers location and length
12- clocks : Should contain phandle and clock specifiers for two clocks:
13 the 32 KHz "32k_in", and the board-specific oscillator "osc".
14- #clock-cells : Should be 1.
15 In clock consumers, this cell represents the clock ID exposed by the
16 CAR. The assignments may be found in the header files
17 <dt-bindings/clock/tegra124-car-common.h> (which covers IDs common
18 to Tegra124 and Tegra132) and <dt-bindings/clock/tegra124-car.h>
19 (for Tegra124-specific clocks).
20- #reset-cells : Should be 1.
21 In clock consumers, this cell represents the bit number in the CAR's
22 array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
23
24Example SoC include file:
25
26/ {
27 tegra_car: clock {
28 compatible = "nvidia,tegra124-car";
29 reg = <0x60006000 0x1000>;
30 #clock-cells = <1>;
31 #reset-cells = <1>;
32 };
33
34 usb@c5004000 {
35 clocks = <&tegra_car TEGRA124_CLK_USB2>;
36 };
37};
38
39Example board file:
40
41/ {
42 clocks {
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <0>;
46
47 osc: clock@0 {
48 compatible = "fixed-clock";
49 reg = <0>;
50 #clock-cells = <0>;
51 clock-frequency = <112400000>;
52 };
53
54 clk_32k: clock@1 {
55 compatible = "fixed-clock";
56 reg = <1>;
57 #clock-cells = <0>;
58 clock-frequency = <32768>;
59 };
60 };
61
62 &tegra_car {
63 clocks = <&clk_32k> <&osc>;
64 };
65};