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1/*
2 * Core driver interface for TI TPS65090 PMIC family
3 *
4 * Copyright (C) 2012 NVIDIA Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
19 *
20 */
21
22#ifndef __LINUX_MFD_TPS65090_H
23#define __LINUX_MFD_TPS65090_H
24
25#include <linux/irq.h>
26#include <linux/regmap.h>
27
28/* TPS65090 IRQs */
29enum {
30 TPS65090_IRQ_VAC_STATUS_CHANGE,
31 TPS65090_IRQ_VSYS_STATUS_CHANGE,
32 TPS65090_IRQ_BAT_STATUS_CHANGE,
33 TPS65090_IRQ_CHARGING_STATUS_CHANGE,
34 TPS65090_IRQ_CHARGING_COMPLETE,
35 TPS65090_IRQ_OVERLOAD_DCDC1,
36 TPS65090_IRQ_OVERLOAD_DCDC2,
37 TPS65090_IRQ_OVERLOAD_DCDC3,
38 TPS65090_IRQ_OVERLOAD_FET1,
39 TPS65090_IRQ_OVERLOAD_FET2,
40 TPS65090_IRQ_OVERLOAD_FET3,
41 TPS65090_IRQ_OVERLOAD_FET4,
42 TPS65090_IRQ_OVERLOAD_FET5,
43 TPS65090_IRQ_OVERLOAD_FET6,
44 TPS65090_IRQ_OVERLOAD_FET7,
45};
46
47/* TPS65090 Regulator ID */
48enum {
49 TPS65090_REGULATOR_DCDC1,
50 TPS65090_REGULATOR_DCDC2,
51 TPS65090_REGULATOR_DCDC3,
52 TPS65090_REGULATOR_FET1,
53 TPS65090_REGULATOR_FET2,
54 TPS65090_REGULATOR_FET3,
55 TPS65090_REGULATOR_FET4,
56 TPS65090_REGULATOR_FET5,
57 TPS65090_REGULATOR_FET6,
58 TPS65090_REGULATOR_FET7,
59 TPS65090_REGULATOR_LDO1,
60 TPS65090_REGULATOR_LDO2,
61
62 /* Last entry for maximum ID */
63 TPS65090_REGULATOR_MAX,
64};
65
66struct tps65090 {
67 struct device *dev;
68 struct regmap *rmap;
69 struct regmap_irq_chip_data *irq_data;
70};
71
72/*
73 * struct tps65090_regulator_plat_data
74 *
75 * @reg_init_data: The regulator init data.
76 * @enable_ext_control: Enable extrenal control or not. Only available for
77 * DCDC1, DCDC2 and DCDC3.
78 * @gpio: Gpio number if external control is enabled and controlled through
79 * gpio.
80 */
81struct tps65090_regulator_plat_data {
82 struct regulator_init_data *reg_init_data;
83 bool enable_ext_control;
84 int gpio;
85};
86
87struct tps65090_platform_data {
88 int irq_base;
89 struct tps65090_regulator_plat_data *reg_pdata[TPS65090_REGULATOR_MAX];
90};
91
92/*
93 * NOTE: the functions below are not intended for use outside
94 * of the TPS65090 sub-device drivers
95 */
96static inline int tps65090_write(struct device *dev, int reg, uint8_t val)
97{
98 struct tps65090 *tps = dev_get_drvdata(dev);
99
100 return regmap_write(tps->rmap, reg, val);
101}
102
103static inline int tps65090_read(struct device *dev, int reg, uint8_t *val)
104{
105 struct tps65090 *tps = dev_get_drvdata(dev);
106 unsigned int temp_val;
107 int ret;
108
109 ret = regmap_read(tps->rmap, reg, &temp_val);
110 if (!ret)
111 *val = temp_val;
112 return ret;
113}
114
115static inline int tps65090_set_bits(struct device *dev, int reg,
116 uint8_t bit_num)
117{
118 struct tps65090 *tps = dev_get_drvdata(dev);
119
120 return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u);
121}
122
123static inline int tps65090_clr_bits(struct device *dev, int reg,
124 uint8_t bit_num)
125{
126 struct tps65090 *tps = dev_get_drvdata(dev);
127
128 return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u);
129}
130
131#endif /*__LINUX_MFD_TPS65090_H */