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linux
1/*
2 * Exynos specific definitions for Samsung pinctrl and gpiolib driver.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
8 *
9 * This file contains the Exynos specific definitions for the Samsung
10 * pinctrl/gpiolib interface drivers.
11 *
12 * Author: Thomas Abraham <thomas.ab@samsung.com>
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 */
19
20/* External GPIO and wakeup interrupt related definitions */
21#define EXYNOS_GPIO_ECON_OFFSET 0x700
22#define EXYNOS_GPIO_EMASK_OFFSET 0x900
23#define EXYNOS_GPIO_EPEND_OFFSET 0xA00
24#define EXYNOS_WKUP_ECON_OFFSET 0xE00
25#define EXYNOS_WKUP_EMASK_OFFSET 0xF00
26#define EXYNOS_WKUP_EPEND_OFFSET 0xF40
27#define EXYNOS_SVC_OFFSET 0xB08
28#define EXYNOS_EINT_FUNC 0xF
29
30/* helpers to access interrupt service register */
31#define EXYNOS_SVC_GROUP_SHIFT 3
32#define EXYNOS_SVC_GROUP_MASK 0x1f
33#define EXYNOS_SVC_NUM_MASK 7
34#define EXYNOS_SVC_GROUP(x) ((x >> EXYNOS_SVC_GROUP_SHIFT) & \
35 EXYNOS_SVC_GROUP_MASK)
36
37/* Exynos specific external interrupt trigger types */
38#define EXYNOS_EINT_LEVEL_LOW 0
39#define EXYNOS_EINT_LEVEL_HIGH 1
40#define EXYNOS_EINT_EDGE_FALLING 2
41#define EXYNOS_EINT_EDGE_RISING 3
42#define EXYNOS_EINT_EDGE_BOTH 4
43#define EXYNOS_EINT_CON_MASK 0xF
44#define EXYNOS_EINT_CON_LEN 4
45
46#define EXYNOS_EINT_MAX_PER_BANK 8
47#define EXYNOS_EINT_NR_WKUP_EINT
48
49#define EXYNOS_PIN_BANK_EINTN(pins, reg, id) \
50 { \
51 .pctl_offset = reg, \
52 .nr_pins = pins, \
53 .func_width = 4, \
54 .pud_width = 2, \
55 .drv_width = 2, \
56 .conpdn_width = 2, \
57 .pudpdn_width = 2, \
58 .eint_type = EINT_TYPE_NONE, \
59 .name = id \
60 }
61
62#define EXYNOS_PIN_BANK_EINTG(pins, reg, id, offs) \
63 { \
64 .pctl_offset = reg, \
65 .nr_pins = pins, \
66 .func_width = 4, \
67 .pud_width = 2, \
68 .drv_width = 2, \
69 .conpdn_width = 2, \
70 .pudpdn_width = 2, \
71 .eint_type = EINT_TYPE_GPIO, \
72 .eint_offset = offs, \
73 .name = id \
74 }
75
76#define EXYNOS_PIN_BANK_EINTW(pins, reg, id, offs) \
77 { \
78 .pctl_offset = reg, \
79 .nr_pins = pins, \
80 .func_width = 4, \
81 .pud_width = 2, \
82 .drv_width = 2, \
83 .eint_type = EINT_TYPE_WKUP, \
84 .eint_offset = offs, \
85 .name = id \
86 }
87
88/**
89 * struct exynos_weint_data: irq specific data for all the wakeup interrupts
90 * generated by the external wakeup interrupt controller.
91 * @irq: interrupt number within the domain.
92 * @bank: bank responsible for this interrupt
93 */
94struct exynos_weint_data {
95 unsigned int irq;
96 struct samsung_pin_bank *bank;
97};
98
99/**
100 * struct exynos_muxed_weint_data: irq specific data for muxed wakeup interrupts
101 * generated by the external wakeup interrupt controller.
102 * @nr_banks: count of banks being part of the mux
103 * @banks: array of banks being part of the mux
104 */
105struct exynos_muxed_weint_data {
106 unsigned int nr_banks;
107 struct samsung_pin_bank *banks[];
108};