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1/* 2 * linux/drivers/i2c/busses/i2c-nuc900.c 3 * 4 * Copyright (c) 2010 Nuvoton technology corporation. 5 * 6 * This driver based on S3C2410 I2C driver of Ben Dooks <ben-Y5A6D6n0/KfQXOPxS62xeg@public.gmane.org>. 7 * Written by Wan ZongShun <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation;version 2 of the License. 12 * 13 */ 14 15#include <linux/kernel.h> 16#include <linux/module.h> 17 18#include <linux/i2c.h> 19#include <linux/init.h> 20#include <linux/time.h> 21#include <linux/interrupt.h> 22#include <linux/delay.h> 23#include <linux/errno.h> 24#include <linux/err.h> 25#include <linux/platform_device.h> 26#include <linux/clk.h> 27#include <linux/cpufreq.h> 28#include <linux/slab.h> 29#include <linux/io.h> 30 31#include <mach/mfp.h> 32#include <linux/platform_data/i2c-nuc900.h> 33 34/* nuc900 i2c registers offset */ 35 36#define CSR 0x00 37#define DIVIDER 0x04 38#define CMDR 0x08 39#define SWR 0x0C 40#define RXR 0x10 41#define TXR 0x14 42 43/* nuc900 i2c CSR register bits */ 44 45#define IRQEN 0x003 46#define I2CBUSY 0x400 47#define I2CSTART 0x018 48#define IRQFLAG 0x004 49#define ARBIT_LOST 0x200 50#define SLAVE_ACK 0x800 51 52/* nuc900 i2c CMDR register bits */ 53 54#define I2C_CMD_START 0x10 55#define I2C_CMD_STOP 0x08 56#define I2C_CMD_READ 0x04 57#define I2C_CMD_WRITE 0x02 58#define I2C_CMD_NACK 0x01 59 60/* i2c controller state */ 61 62enum nuc900_i2c_state { 63 STATE_IDLE, 64 STATE_START, 65 STATE_READ, 66 STATE_WRITE, 67 STATE_STOP 68}; 69 70/* i2c controller private data */ 71 72struct nuc900_i2c { 73 spinlock_t lock; 74 wait_queue_head_t wait; 75 76 struct i2c_msg *msg; 77 unsigned int msg_num; 78 unsigned int msg_idx; 79 unsigned int msg_ptr; 80 unsigned int irq; 81 82 enum nuc900_i2c_state state; 83 84 void __iomem *regs; 85 struct clk *clk; 86 struct device *dev; 87 struct resource *ioarea; 88 struct i2c_adapter adap; 89}; 90 91/* nuc900_i2c_master_complete 92 * 93 * complete the message and wake up the caller, using the given return code, 94 * or zero to mean ok. 95*/ 96 97static inline void nuc900_i2c_master_complete(struct nuc900_i2c *i2c, int ret) 98{ 99 dev_dbg(i2c->dev, "master_complete %d\n", ret); 100 101 i2c->msg_ptr = 0; 102 i2c->msg = NULL; 103 i2c->msg_idx++; 104 i2c->msg_num = 0; 105 if (ret) 106 i2c->msg_idx = ret; 107 108 wake_up(&i2c->wait); 109} 110 111/* irq enable/disable functions */ 112 113static inline void nuc900_i2c_disable_irq(struct nuc900_i2c *i2c) 114{ 115 unsigned long tmp; 116 117 tmp = readl(i2c->regs + CSR); 118 writel(tmp & ~IRQEN, i2c->regs + CSR); 119} 120 121static inline void nuc900_i2c_enable_irq(struct nuc900_i2c *i2c) 122{ 123 unsigned long tmp; 124 125 tmp = readl(i2c->regs + CSR); 126 writel(tmp | IRQEN, i2c->regs + CSR); 127} 128 129 130/* nuc900_i2c_message_start 131 * 132 * put the start of a message onto the bus 133*/ 134 135static void nuc900_i2c_message_start(struct nuc900_i2c *i2c, 136 struct i2c_msg *msg) 137{ 138 unsigned int addr = (msg->addr & 0x7f) << 1; 139 140 if (msg->flags & I2C_M_RD) 141 addr |= 0x1; 142 writel(addr & 0xff, i2c->regs + TXR); 143 writel(I2C_CMD_START | I2C_CMD_WRITE, i2c->regs + CMDR); 144} 145 146static inline void nuc900_i2c_stop(struct nuc900_i2c *i2c, int ret) 147{ 148 149 dev_dbg(i2c->dev, "STOP\n"); 150 151 /* stop the transfer */ 152 i2c->state = STATE_STOP; 153 writel(I2C_CMD_STOP, i2c->regs + CMDR); 154 155 nuc900_i2c_master_complete(i2c, ret); 156 nuc900_i2c_disable_irq(i2c); 157} 158 159/* helper functions to determine the current state in the set of 160 * messages we are sending 161*/ 162 163/* is_lastmsg() 164 * 165 * returns TRUE if the current message is the last in the set 166*/ 167 168static inline int is_lastmsg(struct nuc900_i2c *i2c) 169{ 170 return i2c->msg_idx >= (i2c->msg_num - 1); 171} 172 173/* is_msglast 174 * 175 * returns TRUE if we this is the last byte in the current message 176*/ 177 178static inline int is_msglast(struct nuc900_i2c *i2c) 179{ 180 return i2c->msg_ptr == i2c->msg->len-1; 181} 182 183/* is_msgend 184 * 185 * returns TRUE if we reached the end of the current message 186*/ 187 188static inline int is_msgend(struct nuc900_i2c *i2c) 189{ 190 return i2c->msg_ptr >= i2c->msg->len; 191} 192 193/* i2c_nuc900_irq_nextbyte 194 * 195 * process an interrupt and work out what to do 196 */ 197 198static void i2c_nuc900_irq_nextbyte(struct nuc900_i2c *i2c, 199 unsigned long iicstat) 200{ 201 unsigned char byte; 202 203 switch (i2c->state) { 204 205 case STATE_IDLE: 206 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); 207 break; 208 209 case STATE_STOP: 210 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); 211 nuc900_i2c_disable_irq(i2c); 212 break; 213 214 case STATE_START: 215 /* last thing we did was send a start condition on the 216 * bus, or started a new i2c message 217 */ 218 219 if (iicstat & SLAVE_ACK && 220 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { 221 /* ack was not received... */ 222 223 dev_dbg(i2c->dev, "ack was not received\n"); 224 nuc900_i2c_stop(i2c, -ENXIO); 225 break; 226 } 227 228 if (i2c->msg->flags & I2C_M_RD) 229 i2c->state = STATE_READ; 230 else 231 i2c->state = STATE_WRITE; 232 233 /* terminate the transfer if there is nothing to do 234 * as this is used by the i2c probe to find devices. 235 */ 236 237 if (is_lastmsg(i2c) && i2c->msg->len == 0) { 238 nuc900_i2c_stop(i2c, 0); 239 break; 240 } 241 242 if (i2c->state == STATE_READ) 243 goto prepare_read; 244 245 /* fall through to the write state, as we will need to 246 * send a byte as well 247 */ 248 249 case STATE_WRITE: 250 /* we are writing data to the device... check for the 251 * end of the message, and if so, work out what to do 252 */ 253 254 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) { 255 if (iicstat & SLAVE_ACK) { 256 dev_dbg(i2c->dev, "WRITE: No Ack\n"); 257 258 nuc900_i2c_stop(i2c, -ECONNREFUSED); 259 break; 260 } 261 } 262 263retry_write: 264 265 if (!is_msgend(i2c)) { 266 byte = i2c->msg->buf[i2c->msg_ptr++]; 267 writeb(byte, i2c->regs + TXR); 268 writel(I2C_CMD_WRITE, i2c->regs + CMDR); 269 270 } else if (!is_lastmsg(i2c)) { 271 /* we need to go to the next i2c message */ 272 273 dev_dbg(i2c->dev, "WRITE: Next Message\n"); 274 275 i2c->msg_ptr = 0; 276 i2c->msg_idx++; 277 i2c->msg++; 278 279 /* check to see if we need to do another message */ 280 if (i2c->msg->flags & I2C_M_NOSTART) { 281 282 if (i2c->msg->flags & I2C_M_RD) { 283 /* cannot do this, the controller 284 * forces us to send a new START 285 * when we change direction 286 */ 287 288 nuc900_i2c_stop(i2c, -EINVAL); 289 } 290 291 goto retry_write; 292 } else { 293 /* send the new start */ 294 nuc900_i2c_message_start(i2c, i2c->msg); 295 i2c->state = STATE_START; 296 } 297 298 } else { 299 /* send stop */ 300 301 nuc900_i2c_stop(i2c, 0); 302 } 303 break; 304 305 case STATE_READ: 306 /* we have a byte of data in the data register, do 307 * something with it, and then work out whether we are 308 * going to do any more read/write 309 */ 310 311 byte = readb(i2c->regs + RXR); 312 i2c->msg->buf[i2c->msg_ptr++] = byte; 313 314prepare_read: 315 if (is_msglast(i2c)) { 316 /* last byte of buffer */ 317 318 if (is_lastmsg(i2c)) 319 writel(I2C_CMD_READ | I2C_CMD_NACK, 320 i2c->regs + CMDR); 321 322 } else if (is_msgend(i2c)) { 323 /* ok, we've read the entire buffer, see if there 324 * is anything else we need to do 325 */ 326 327 if (is_lastmsg(i2c)) { 328 /* last message, send stop and complete */ 329 dev_dbg(i2c->dev, "READ: Send Stop\n"); 330 331 nuc900_i2c_stop(i2c, 0); 332 } else { 333 /* go to the next transfer */ 334 dev_dbg(i2c->dev, "READ: Next Transfer\n"); 335 336 i2c->msg_ptr = 0; 337 i2c->msg_idx++; 338 i2c->msg++; 339 340 writel(I2C_CMD_READ, i2c->regs + CMDR); 341 } 342 343 } else { 344 writel(I2C_CMD_READ, i2c->regs + CMDR); 345 } 346 347 break; 348 } 349} 350 351/* nuc900_i2c_irq 352 * 353 * top level IRQ servicing routine 354*/ 355 356static irqreturn_t nuc900_i2c_irq(int irqno, void *dev_id) 357{ 358 struct nuc900_i2c *i2c = dev_id; 359 unsigned long status; 360 361 status = readl(i2c->regs + CSR); 362 writel(status | IRQFLAG, i2c->regs + CSR); 363 364 if (status & ARBIT_LOST) { 365 /* deal with arbitration loss */ 366 dev_err(i2c->dev, "deal with arbitration loss\n"); 367 goto out; 368 } 369 370 if (i2c->state == STATE_IDLE) { 371 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); 372 goto out; 373 } 374 375 /* pretty much this leaves us with the fact that we've 376 * transmitted or received whatever byte we last sent 377 */ 378 379 i2c_nuc900_irq_nextbyte(i2c, status); 380 381 out: 382 return IRQ_HANDLED; 383} 384 385 386/* nuc900_i2c_set_master 387 * 388 * get the i2c bus for a master transaction 389*/ 390 391static int nuc900_i2c_set_master(struct nuc900_i2c *i2c) 392{ 393 int timeout = 400; 394 395 while (timeout-- > 0) { 396 if (((readl(i2c->regs + SWR) & I2CSTART) == I2CSTART) && 397 ((readl(i2c->regs + CSR) & I2CBUSY) == 0)) { 398 return 0; 399 } 400 401 msleep(1); 402 } 403 404 return -ETIMEDOUT; 405} 406 407/* nuc900_i2c_doxfer 408 * 409 * this starts an i2c transfer 410*/ 411 412static int nuc900_i2c_doxfer(struct nuc900_i2c *i2c, 413 struct i2c_msg *msgs, int num) 414{ 415 unsigned long iicstat, timeout; 416 int spins = 20; 417 int ret; 418 419 ret = nuc900_i2c_set_master(i2c); 420 if (ret != 0) { 421 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); 422 ret = -EAGAIN; 423 goto out; 424 } 425 426 spin_lock_irq(&i2c->lock); 427 428 i2c->msg = msgs; 429 i2c->msg_num = num; 430 i2c->msg_ptr = 0; 431 i2c->msg_idx = 0; 432 i2c->state = STATE_START; 433 434 nuc900_i2c_message_start(i2c, msgs); 435 spin_unlock_irq(&i2c->lock); 436 437 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); 438 439 ret = i2c->msg_idx; 440 441 /* having these next two as dev_err() makes life very 442 * noisy when doing an i2cdetect 443 */ 444 445 if (timeout == 0) 446 dev_dbg(i2c->dev, "timeout\n"); 447 else if (ret != num) 448 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); 449 450 /* ensure the stop has been through the bus */ 451 452 dev_dbg(i2c->dev, "waiting for bus idle\n"); 453 454 /* first, try busy waiting briefly */ 455 do { 456 iicstat = readl(i2c->regs + CSR); 457 } while ((iicstat & I2CBUSY) && --spins); 458 459 /* if that timed out sleep */ 460 if (!spins) { 461 msleep(1); 462 iicstat = readl(i2c->regs + CSR); 463 } 464 465 if (iicstat & I2CBUSY) 466 dev_warn(i2c->dev, "timeout waiting for bus idle\n"); 467 468 out: 469 return ret; 470} 471 472/* nuc900_i2c_xfer 473 * 474 * first port of call from the i2c bus code when an message needs 475 * transferring across the i2c bus. 476*/ 477 478static int nuc900_i2c_xfer(struct i2c_adapter *adap, 479 struct i2c_msg *msgs, int num) 480{ 481 struct nuc900_i2c *i2c = (struct nuc900_i2c *)adap->algo_data; 482 int retry; 483 int ret; 484 485 nuc900_i2c_enable_irq(i2c); 486 487 for (retry = 0; retry < adap->retries; retry++) { 488 489 ret = nuc900_i2c_doxfer(i2c, msgs, num); 490 491 if (ret != -EAGAIN) 492 return ret; 493 494 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); 495 496 udelay(100); 497 } 498 499 return -EREMOTEIO; 500} 501 502/* declare our i2c functionality */ 503static u32 nuc900_i2c_func(struct i2c_adapter *adap) 504{ 505 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_NOSTART | 506 I2C_FUNC_PROTOCOL_MANGLING; 507} 508 509/* i2c bus registration info */ 510 511static const struct i2c_algorithm nuc900_i2c_algorithm = { 512 .master_xfer = nuc900_i2c_xfer, 513 .functionality = nuc900_i2c_func, 514}; 515 516/* nuc900_i2c_probe 517 * 518 * called by the bus driver when a suitable device is found 519*/ 520 521static int nuc900_i2c_probe(struct platform_device *pdev) 522{ 523 struct nuc900_i2c *i2c; 524 struct nuc900_platform_i2c *pdata; 525 struct resource *res; 526 int ret; 527 528 pdata = pdev->dev.platform_data; 529 if (!pdata) { 530 dev_err(&pdev->dev, "no platform data\n"); 531 return -EINVAL; 532 } 533 534 i2c = kzalloc(sizeof(struct nuc900_i2c), GFP_KERNEL); 535 if (!i2c) { 536 dev_err(&pdev->dev, "no memory for state\n"); 537 return -ENOMEM; 538 } 539 540 strlcpy(i2c->adap.name, "nuc900-i2c0", sizeof(i2c->adap.name)); 541 i2c->adap.owner = THIS_MODULE; 542 i2c->adap.algo = &nuc900_i2c_algorithm; 543 i2c->adap.retries = 2; 544 i2c->adap.class = I2C_CLASS_HWMON | I2C_CLASS_SPD; 545 546 spin_lock_init(&i2c->lock); 547 init_waitqueue_head(&i2c->wait); 548 549 /* find the clock and enable it */ 550 551 i2c->dev = &pdev->dev; 552 i2c->clk = clk_get(&pdev->dev, NULL); 553 if (IS_ERR(i2c->clk)) { 554 dev_err(&pdev->dev, "cannot get clock\n"); 555 ret = -ENOENT; 556 goto err_noclk; 557 } 558 559 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); 560 561 clk_enable(i2c->clk); 562 563 /* map the registers */ 564 565 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 566 if (res == NULL) { 567 dev_err(&pdev->dev, "cannot find IO resource\n"); 568 ret = -ENOENT; 569 goto err_clk; 570 } 571 572 i2c->ioarea = request_mem_region(res->start, resource_size(res), 573 pdev->name); 574 575 if (i2c->ioarea == NULL) { 576 dev_err(&pdev->dev, "cannot request IO\n"); 577 ret = -ENXIO; 578 goto err_clk; 579 } 580 581 i2c->regs = ioremap(res->start, resource_size(res)); 582 583 if (i2c->regs == NULL) { 584 dev_err(&pdev->dev, "cannot map IO\n"); 585 ret = -ENXIO; 586 goto err_ioarea; 587 } 588 589 dev_dbg(&pdev->dev, "registers %p (%p, %p)\n", 590 i2c->regs, i2c->ioarea, res); 591 592 /* setup info block for the i2c core */ 593 594 i2c->adap.algo_data = i2c; 595 i2c->adap.dev.parent = &pdev->dev; 596 597 mfp_set_groupg(&pdev->dev, NULL); 598 599 clk_get_rate(i2c->clk); 600 601 ret = (i2c->clk.apbfreq)/(pdata->bus_freq * 5) - 1; 602 writel(ret & 0xffff, i2c->regs + DIVIDER); 603 604 /* find the IRQ for this unit (note, this relies on the init call to 605 * ensure no current IRQs pending 606 */ 607 608 i2c->irq = ret = platform_get_irq(pdev, 0); 609 if (ret <= 0) { 610 dev_err(&pdev->dev, "cannot find IRQ\n"); 611 goto err_iomap; 612 } 613 614 ret = request_irq(i2c->irq, nuc900_i2c_irq, IRQF_SHARED, 615 dev_name(&pdev->dev), i2c); 616 617 if (ret != 0) { 618 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq); 619 goto err_iomap; 620 } 621 622 /* Note, previous versions of the driver used i2c_add_adapter() 623 * to add the bus at any number. We now pass the bus number via 624 * the platform data, so if unset it will now default to always 625 * being bus 0. 626 */ 627 628 i2c->adap.nr = pdata->bus_num; 629 630 ret = i2c_add_numbered_adapter(&i2c->adap); 631 if (ret < 0) { 632 dev_err(&pdev->dev, "failed to add bus to i2c core\n"); 633 goto err_irq; 634 } 635 636 platform_set_drvdata(pdev, i2c); 637 638 dev_info(&pdev->dev, "%s: NUC900 I2C adapter\n", 639 dev_name(&i2c->adap.dev)); 640 return 0; 641 642 err_irq: 643 free_irq(i2c->irq, i2c); 644 645 err_iomap: 646 iounmap(i2c->regs); 647 648 err_ioarea: 649 release_resource(i2c->ioarea); 650 kfree(i2c->ioarea); 651 652 err_clk: 653 clk_disable(i2c->clk); 654 clk_put(i2c->clk); 655 656 err_noclk: 657 kfree(i2c); 658 return ret; 659} 660 661/* nuc900_i2c_remove 662 * 663 * called when device is removed from the bus 664*/ 665 666static int nuc900_i2c_remove(struct platform_device *pdev) 667{ 668 struct nuc900_i2c *i2c = platform_get_drvdata(pdev); 669 670 i2c_del_adapter(&i2c->adap); 671 free_irq(i2c->irq, i2c); 672 673 clk_disable(i2c->clk); 674 clk_put(i2c->clk); 675 676 iounmap(i2c->regs); 677 678 release_resource(i2c->ioarea); 679 kfree(i2c->ioarea); 680 kfree(i2c); 681 682 return 0; 683} 684 685static struct platform_driver nuc900_i2c_driver = { 686 .probe = nuc900_i2c_probe, 687 .remove = nuc900_i2c_remove, 688 .driver = { 689 .owner = THIS_MODULE, 690 .name = "nuc900-i2c0", 691 }, 692}; 693 694static int __init i2c_adap_nuc900_init(void) 695{ 696 return platform_driver_register(&nuc900_i2c_driver); 697} 698 699static void __exit i2c_adap_nuc900_exit(void) 700{ 701 platform_driver_unregister(&nuc900_i2c_driver); 702} 703subsys_initcall(i2c_adap_nuc900_init); 704module_exit(i2c_adap_nuc900_exit); 705 706MODULE_DESCRIPTION("NUC900 I2C Bus driver"); 707MODULE_AUTHOR("Wan ZongShun, <mcuos.com-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>"); 708MODULE_LICENSE("GPL"); 709MODULE_ALIAS("platform:nuc900-i2c0");