tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1#ifndef __ALPHA_PCI_H
2#define __ALPHA_PCI_H
3
4#ifdef __KERNEL__
5
6#include <linux/spinlock.h>
7#include <linux/dma-mapping.h>
8#include <asm/scatterlist.h>
9#include <asm/machvec.h>
10#include <asm-generic/pci-bridge.h>
11
12/*
13 * The following structure is used to manage multiple PCI busses.
14 */
15
16struct pci_dev;
17struct pci_bus;
18struct resource;
19struct pci_iommu_arena;
20struct page;
21
22/* A controller. Used to manage multiple PCI busses. */
23
24struct pci_controller {
25 struct pci_controller *next;
26 struct pci_bus *bus;
27 struct resource *io_space;
28 struct resource *mem_space;
29
30 /* The following are for reporting to userland. The invariant is
31 that if we report a BWX-capable dense memory, we do not report
32 a sparse memory at all, even if it exists. */
33 unsigned long sparse_mem_base;
34 unsigned long dense_mem_base;
35 unsigned long sparse_io_base;
36 unsigned long dense_io_base;
37
38 /* This one's for the kernel only. It's in KSEG somewhere. */
39 unsigned long config_space_base;
40
41 unsigned int index;
42 /* For compatibility with current (as of July 2003) pciutils
43 and XFree86. Eventually will be removed. */
44 unsigned int need_domain_info;
45
46 struct pci_iommu_arena *sg_pci;
47 struct pci_iommu_arena *sg_isa;
48
49 void *sysdata;
50};
51
52/* Override the logic in pci_scan_bus for skipping already-configured
53 bus numbers. */
54
55#define pcibios_assign_all_busses() 1
56
57#define PCIBIOS_MIN_IO alpha_mv.min_io_address
58#define PCIBIOS_MIN_MEM alpha_mv.min_mem_address
59
60extern void pcibios_set_master(struct pci_dev *dev);
61
62extern inline void pcibios_penalize_isa_irq(int irq, int active)
63{
64 /* We don't do dynamic PCI IRQ allocation */
65}
66
67/* IOMMU controls. */
68
69/* The PCI address space does not equal the physical memory address space.
70 The networking and block device layers use this boolean for bounce buffer
71 decisions. */
72#define PCI_DMA_BUS_IS_PHYS 0
73
74#ifdef CONFIG_PCI
75
76/* implement the pci_ DMA API in terms of the generic device dma_ one */
77#include <asm-generic/pci-dma-compat.h>
78
79static inline void pci_dma_burst_advice(struct pci_dev *pdev,
80 enum pci_dma_burst_strategy *strat,
81 unsigned long *strategy_parameter)
82{
83 unsigned long cacheline_size;
84 u8 byte;
85
86 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte);
87 if (byte == 0)
88 cacheline_size = 1024;
89 else
90 cacheline_size = (int) byte * 4;
91
92 *strat = PCI_DMA_BURST_BOUNDARY;
93 *strategy_parameter = cacheline_size;
94}
95#endif
96
97/* TODO: integrate with include/asm-generic/pci.h ? */
98static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
99{
100 return channel ? 15 : 14;
101}
102
103#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
104
105static inline int pci_proc_domain(struct pci_bus *bus)
106{
107 struct pci_controller *hose = bus->sysdata;
108 return hose->need_domain_info;
109}
110
111#endif /* __KERNEL__ */
112
113/* Values for the `which' argument to sys_pciconfig_iobase. */
114#define IOBASE_HOSE 0
115#define IOBASE_SPARSE_MEM 1
116#define IOBASE_DENSE_MEM 2
117#define IOBASE_SPARSE_IO 3
118#define IOBASE_DENSE_IO 4
119#define IOBASE_ROOT_BUS 5
120#define IOBASE_FROM_HOSE 0x10000
121
122extern struct pci_dev *isa_bridge;
123
124extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
125 size_t count);
126extern int pci_legacy_write(struct pci_bus *bus, loff_t port, u32 val,
127 size_t count);
128extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
129 struct vm_area_struct *vma,
130 enum pci_mmap_state mmap_state);
131extern void pci_adjust_legacy_attr(struct pci_bus *bus,
132 enum pci_mmap_state mmap_type);
133#define HAVE_PCI_LEGACY 1
134
135extern int pci_create_resource_files(struct pci_dev *dev);
136extern void pci_remove_resource_files(struct pci_dev *dev);
137
138#endif /* __ALPHA_PCI_H */