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1/* 2 * Atheros AR71XX/AR724X/AR913X common devices 3 * 4 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org> 5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org> 6 * 7 * Parts of this file are based on Atheros' 2.6.15 BSP 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License version 2 as published 11 * by the Free Software Foundation. 12 */ 13 14#include <linux/kernel.h> 15#include <linux/init.h> 16#include <linux/platform_device.h> 17#include <linux/serial_8250.h> 18#include <linux/clk.h> 19#include <linux/err.h> 20 21#include <asm/mach-ath79/ath79.h> 22#include <asm/mach-ath79/ar71xx_regs.h> 23#include <asm/mach-ath79/ar933x_uart_platform.h> 24#include "common.h" 25#include "dev-common.h" 26 27static struct resource ath79_uart_resources[] = { 28 { 29 .start = AR71XX_UART_BASE, 30 .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1, 31 .flags = IORESOURCE_MEM, 32 }, 33}; 34 35#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP) 36static struct plat_serial8250_port ath79_uart_data[] = { 37 { 38 .mapbase = AR71XX_UART_BASE, 39 .irq = ATH79_MISC_IRQ(3), 40 .flags = AR71XX_UART_FLAGS, 41 .iotype = UPIO_MEM32, 42 .regshift = 2, 43 }, { 44 /* terminating entry */ 45 } 46}; 47 48static struct platform_device ath79_uart_device = { 49 .name = "serial8250", 50 .id = PLAT8250_DEV_PLATFORM, 51 .resource = ath79_uart_resources, 52 .num_resources = ARRAY_SIZE(ath79_uart_resources), 53 .dev = { 54 .platform_data = ath79_uart_data 55 }, 56}; 57 58static struct resource ar933x_uart_resources[] = { 59 { 60 .start = AR933X_UART_BASE, 61 .end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1, 62 .flags = IORESOURCE_MEM, 63 }, 64 { 65 .start = ATH79_MISC_IRQ(3), 66 .end = ATH79_MISC_IRQ(3), 67 .flags = IORESOURCE_IRQ, 68 }, 69}; 70 71static struct ar933x_uart_platform_data ar933x_uart_data; 72static struct platform_device ar933x_uart_device = { 73 .name = "ar933x-uart", 74 .id = -1, 75 .resource = ar933x_uart_resources, 76 .num_resources = ARRAY_SIZE(ar933x_uart_resources), 77 .dev = { 78 .platform_data = &ar933x_uart_data, 79 }, 80}; 81 82void __init ath79_register_uart(void) 83{ 84 struct clk *clk; 85 86 clk = clk_get(NULL, "uart"); 87 if (IS_ERR(clk)) 88 panic("unable to get UART clock, err=%ld", PTR_ERR(clk)); 89 90 if (soc_is_ar71xx() || 91 soc_is_ar724x() || 92 soc_is_ar913x() || 93 soc_is_ar934x() || 94 soc_is_qca955x()) { 95 ath79_uart_data[0].uartclk = clk_get_rate(clk); 96 platform_device_register(&ath79_uart_device); 97 } else if (soc_is_ar933x()) { 98 ar933x_uart_data.uartclk = clk_get_rate(clk); 99 platform_device_register(&ar933x_uart_device); 100 } else { 101 BUG(); 102 } 103} 104 105void __init ath79_register_wdt(void) 106{ 107 struct resource res; 108 109 memset(&res, 0, sizeof(res)); 110 111 res.flags = IORESOURCE_MEM; 112 res.start = AR71XX_RESET_BASE + AR71XX_RESET_REG_WDOG_CTRL; 113 res.end = res.start + 0x8 - 1; 114 115 platform_device_register_simple("ath79-wdt", -1, &res, 1); 116}