tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25/*
26 * Authors: Dave Airlie <airlied@redhat.com>
27 */
28#ifndef __AST_DRV_H__
29#define __AST_DRV_H__
30
31#include <drm/drm_fb_helper.h>
32
33#include <drm/ttm/ttm_bo_api.h>
34#include <drm/ttm/ttm_bo_driver.h>
35#include <drm/ttm/ttm_placement.h>
36#include <drm/ttm/ttm_memory.h>
37#include <drm/ttm/ttm_module.h>
38
39#include <linux/i2c.h>
40#include <linux/i2c-algo-bit.h>
41
42#define DRIVER_AUTHOR "Dave Airlie"
43
44#define DRIVER_NAME "ast"
45#define DRIVER_DESC "AST"
46#define DRIVER_DATE "20120228"
47
48#define DRIVER_MAJOR 0
49#define DRIVER_MINOR 1
50#define DRIVER_PATCHLEVEL 0
51
52#define PCI_CHIP_AST2000 0x2000
53#define PCI_CHIP_AST2100 0x2010
54#define PCI_CHIP_AST1180 0x1180
55
56
57enum ast_chip {
58 AST2000,
59 AST2100,
60 AST1100,
61 AST2200,
62 AST2150,
63 AST2300,
64 AST1180,
65};
66
67#define AST_DRAM_512Mx16 0
68#define AST_DRAM_1Gx16 1
69#define AST_DRAM_512Mx32 2
70#define AST_DRAM_1Gx32 3
71#define AST_DRAM_2Gx16 6
72#define AST_DRAM_4Gx16 7
73
74struct ast_fbdev;
75
76struct ast_private {
77 struct drm_device *dev;
78
79 void __iomem *regs;
80 void __iomem *ioregs;
81
82 enum ast_chip chip;
83 bool vga2_clone;
84 uint32_t dram_bus_width;
85 uint32_t dram_type;
86 uint32_t mclk;
87 uint32_t vram_size;
88
89 struct ast_fbdev *fbdev;
90
91 int fb_mtrr;
92
93 struct {
94 struct drm_global_reference mem_global_ref;
95 struct ttm_bo_global_ref bo_global_ref;
96 struct ttm_bo_device bdev;
97 } ttm;
98
99 struct drm_gem_object *cursor_cache;
100 uint64_t cursor_cache_gpu_addr;
101 struct ttm_bo_kmap_obj cache_kmap;
102 int next_cursor;
103};
104
105int ast_driver_load(struct drm_device *dev, unsigned long flags);
106int ast_driver_unload(struct drm_device *dev);
107
108struct ast_gem_object;
109
110#define AST_IO_AR_PORT_WRITE (0x40)
111#define AST_IO_MISC_PORT_WRITE (0x42)
112#define AST_IO_SEQ_PORT (0x44)
113#define AST_DAC_INDEX_READ (0x3c7)
114#define AST_IO_DAC_INDEX_WRITE (0x48)
115#define AST_IO_DAC_DATA (0x49)
116#define AST_IO_GR_PORT (0x4E)
117#define AST_IO_CRTC_PORT (0x54)
118#define AST_IO_INPUT_STATUS1_READ (0x5A)
119#define AST_IO_MISC_PORT_READ (0x4C)
120
121#define __ast_read(x) \
122static inline u##x ast_read##x(struct ast_private *ast, u32 reg) { \
123u##x val = 0;\
124val = ioread##x(ast->regs + reg); \
125return val;\
126}
127
128__ast_read(8);
129__ast_read(16);
130__ast_read(32)
131
132#define __ast_io_read(x) \
133static inline u##x ast_io_read##x(struct ast_private *ast, u32 reg) { \
134u##x val = 0;\
135val = ioread##x(ast->ioregs + reg); \
136return val;\
137}
138
139__ast_io_read(8);
140__ast_io_read(16);
141__ast_io_read(32);
142
143#define __ast_write(x) \
144static inline void ast_write##x(struct ast_private *ast, u32 reg, u##x val) {\
145 iowrite##x(val, ast->regs + reg);\
146 }
147
148__ast_write(8);
149__ast_write(16);
150__ast_write(32);
151
152#define __ast_io_write(x) \
153static inline void ast_io_write##x(struct ast_private *ast, u32 reg, u##x val) {\
154 iowrite##x(val, ast->ioregs + reg);\
155 }
156
157__ast_io_write(8);
158__ast_io_write(16);
159#undef __ast_io_write
160
161static inline void ast_set_index_reg(struct ast_private *ast,
162 uint32_t base, uint8_t index,
163 uint8_t val)
164{
165 ast_io_write16(ast, base, ((u16)val << 8) | index);
166}
167
168void ast_set_index_reg_mask(struct ast_private *ast,
169 uint32_t base, uint8_t index,
170 uint8_t mask, uint8_t val);
171uint8_t ast_get_index_reg(struct ast_private *ast,
172 uint32_t base, uint8_t index);
173uint8_t ast_get_index_reg_mask(struct ast_private *ast,
174 uint32_t base, uint8_t index, uint8_t mask);
175
176static inline void ast_open_key(struct ast_private *ast)
177{
178 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xA1, 0xFF, 0x04);
179}
180
181#define AST_VIDMEM_SIZE_8M 0x00800000
182#define AST_VIDMEM_SIZE_16M 0x01000000
183#define AST_VIDMEM_SIZE_32M 0x02000000
184#define AST_VIDMEM_SIZE_64M 0x04000000
185#define AST_VIDMEM_SIZE_128M 0x08000000
186
187#define AST_VIDMEM_DEFAULT_SIZE AST_VIDMEM_SIZE_8M
188
189#define AST_MAX_HWC_WIDTH 64
190#define AST_MAX_HWC_HEIGHT 64
191
192#define AST_HWC_SIZE (AST_MAX_HWC_WIDTH*AST_MAX_HWC_HEIGHT*2)
193#define AST_HWC_SIGNATURE_SIZE 32
194
195#define AST_DEFAULT_HWC_NUM 2
196/* define for signature structure */
197#define AST_HWC_SIGNATURE_CHECKSUM 0x00
198#define AST_HWC_SIGNATURE_SizeX 0x04
199#define AST_HWC_SIGNATURE_SizeY 0x08
200#define AST_HWC_SIGNATURE_X 0x0C
201#define AST_HWC_SIGNATURE_Y 0x10
202#define AST_HWC_SIGNATURE_HOTSPOTX 0x14
203#define AST_HWC_SIGNATURE_HOTSPOTY 0x18
204
205
206struct ast_i2c_chan {
207 struct i2c_adapter adapter;
208 struct drm_device *dev;
209 struct i2c_algo_bit_data bit;
210};
211
212struct ast_connector {
213 struct drm_connector base;
214 struct ast_i2c_chan *i2c;
215};
216
217struct ast_crtc {
218 struct drm_crtc base;
219 u8 lut_r[256], lut_g[256], lut_b[256];
220 struct drm_gem_object *cursor_bo;
221 uint64_t cursor_addr;
222 int cursor_width, cursor_height;
223 u8 offset_x, offset_y;
224};
225
226struct ast_encoder {
227 struct drm_encoder base;
228};
229
230struct ast_framebuffer {
231 struct drm_framebuffer base;
232 struct drm_gem_object *obj;
233};
234
235struct ast_fbdev {
236 struct drm_fb_helper helper;
237 struct ast_framebuffer afb;
238 struct list_head fbdev_list;
239 void *sysram;
240 int size;
241 struct ttm_bo_kmap_obj mapping;
242};
243
244#define to_ast_crtc(x) container_of(x, struct ast_crtc, base)
245#define to_ast_connector(x) container_of(x, struct ast_connector, base)
246#define to_ast_encoder(x) container_of(x, struct ast_encoder, base)
247#define to_ast_framebuffer(x) container_of(x, struct ast_framebuffer, base)
248
249struct ast_vbios_stdtable {
250 u8 misc;
251 u8 seq[4];
252 u8 crtc[25];
253 u8 ar[20];
254 u8 gr[9];
255};
256
257struct ast_vbios_enhtable {
258 u32 ht;
259 u32 hde;
260 u32 hfp;
261 u32 hsync;
262 u32 vt;
263 u32 vde;
264 u32 vfp;
265 u32 vsync;
266 u32 dclk_index;
267 u32 flags;
268 u32 refresh_rate;
269 u32 refresh_rate_index;
270 u32 mode_id;
271};
272
273struct ast_vbios_dclk_info {
274 u8 param1;
275 u8 param2;
276 u8 param3;
277};
278
279struct ast_vbios_mode_info {
280 struct ast_vbios_stdtable *std_table;
281 struct ast_vbios_enhtable *enh_table;
282};
283
284extern int ast_mode_init(struct drm_device *dev);
285extern void ast_mode_fini(struct drm_device *dev);
286
287int ast_framebuffer_init(struct drm_device *dev,
288 struct ast_framebuffer *ast_fb,
289 struct drm_mode_fb_cmd2 *mode_cmd,
290 struct drm_gem_object *obj);
291
292int ast_fbdev_init(struct drm_device *dev);
293void ast_fbdev_fini(struct drm_device *dev);
294void ast_fbdev_set_suspend(struct drm_device *dev, int state);
295
296struct ast_bo {
297 struct ttm_buffer_object bo;
298 struct ttm_placement placement;
299 struct ttm_bo_kmap_obj kmap;
300 struct drm_gem_object gem;
301 u32 placements[3];
302 int pin_count;
303};
304#define gem_to_ast_bo(gobj) container_of((gobj), struct ast_bo, gem)
305
306static inline struct ast_bo *
307ast_bo(struct ttm_buffer_object *bo)
308{
309 return container_of(bo, struct ast_bo, bo);
310}
311
312
313#define to_ast_obj(x) container_of(x, struct ast_gem_object, base)
314
315#define AST_MM_ALIGN_SHIFT 4
316#define AST_MM_ALIGN_MASK ((1 << AST_MM_ALIGN_SHIFT) - 1)
317
318extern int ast_dumb_create(struct drm_file *file,
319 struct drm_device *dev,
320 struct drm_mode_create_dumb *args);
321extern int ast_dumb_destroy(struct drm_file *file,
322 struct drm_device *dev,
323 uint32_t handle);
324
325extern int ast_gem_init_object(struct drm_gem_object *obj);
326extern void ast_gem_free_object(struct drm_gem_object *obj);
327extern int ast_dumb_mmap_offset(struct drm_file *file,
328 struct drm_device *dev,
329 uint32_t handle,
330 uint64_t *offset);
331
332#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
333
334int ast_mm_init(struct ast_private *ast);
335void ast_mm_fini(struct ast_private *ast);
336
337int ast_bo_create(struct drm_device *dev, int size, int align,
338 uint32_t flags, struct ast_bo **pastbo);
339
340int ast_gem_create(struct drm_device *dev,
341 u32 size, bool iskernel,
342 struct drm_gem_object **obj);
343
344int ast_bo_pin(struct ast_bo *bo, u32 pl_flag, u64 *gpu_addr);
345int ast_bo_unpin(struct ast_bo *bo);
346
347int ast_bo_reserve(struct ast_bo *bo, bool no_wait);
348void ast_bo_unreserve(struct ast_bo *bo);
349void ast_ttm_placement(struct ast_bo *bo, int domain);
350int ast_bo_push_sysram(struct ast_bo *bo);
351int ast_mmap(struct file *filp, struct vm_area_struct *vma);
352
353/* ast post */
354void ast_post_gpu(struct drm_device *dev);
355#endif