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1/* 2 * Intel PXA25x and IXP4xx on-chip full speed USB device controllers 3 * 4 * Copyright (C) 2002 Intrinsyc, Inc. (Frank Becker) 5 * Copyright (C) 2003 Robert Schwebel, Pengutronix 6 * Copyright (C) 2003 Benedikt Spranger, Pengutronix 7 * Copyright (C) 2003 David Brownell 8 * Copyright (C) 2003 Joshua Wise 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 */ 15 16/* #define VERBOSE_DEBUG */ 17 18#include <linux/device.h> 19#include <linux/module.h> 20#include <linux/kernel.h> 21#include <linux/ioport.h> 22#include <linux/types.h> 23#include <linux/errno.h> 24#include <linux/err.h> 25#include <linux/delay.h> 26#include <linux/slab.h> 27#include <linux/init.h> 28#include <linux/timer.h> 29#include <linux/list.h> 30#include <linux/interrupt.h> 31#include <linux/mm.h> 32#include <linux/platform_data/pxa2xx_udc.h> 33#include <linux/platform_device.h> 34#include <linux/dma-mapping.h> 35#include <linux/irq.h> 36#include <linux/clk.h> 37#include <linux/seq_file.h> 38#include <linux/debugfs.h> 39#include <linux/io.h> 40#include <linux/prefetch.h> 41 42#include <asm/byteorder.h> 43#include <asm/dma.h> 44#include <asm/gpio.h> 45#include <asm/mach-types.h> 46#include <asm/unaligned.h> 47 48#include <linux/usb/ch9.h> 49#include <linux/usb/gadget.h> 50#include <linux/usb/otg.h> 51 52/* 53 * This driver is PXA25x only. Grab the right register definitions. 54 */ 55#ifdef CONFIG_ARCH_PXA 56#include <mach/pxa25x-udc.h> 57#endif 58 59#ifdef CONFIG_ARCH_LUBBOCK 60#include <mach/lubbock.h> 61#endif 62 63/* 64 * This driver handles the USB Device Controller (UDC) in Intel's PXA 25x 65 * series processors. The UDC for the IXP 4xx series is very similar. 66 * There are fifteen endpoints, in addition to ep0. 67 * 68 * Such controller drivers work with a gadget driver. The gadget driver 69 * returns descriptors, implements configuration and data protocols used 70 * by the host to interact with this device, and allocates endpoints to 71 * the different protocol interfaces. The controller driver virtualizes 72 * usb hardware so that the gadget drivers will be more portable. 73 * 74 * This UDC hardware wants to implement a bit too much USB protocol, so 75 * it constrains the sorts of USB configuration change events that work. 76 * The errata for these chips are misleading; some "fixed" bugs from 77 * pxa250 a0/a1 b0/b1/b2 sure act like they're still there. 78 * 79 * Note that the UDC hardware supports DMA (except on IXP) but that's 80 * not used here. IN-DMA (to host) is simple enough, when the data is 81 * suitably aligned (16 bytes) ... the network stack doesn't do that, 82 * other software can. OUT-DMA is buggy in most chip versions, as well 83 * as poorly designed (data toggle not automatic). So this driver won't 84 * bother using DMA. (Mostly-working IN-DMA support was available in 85 * kernels before 2.6.23, but was never enabled or well tested.) 86 */ 87 88#define DRIVER_VERSION "30-June-2007" 89#define DRIVER_DESC "PXA 25x USB Device Controller driver" 90 91 92static const char driver_name [] = "pxa25x_udc"; 93 94static const char ep0name [] = "ep0"; 95 96 97#ifdef CONFIG_ARCH_IXP4XX 98 99/* cpu-specific register addresses are compiled in to this code */ 100#ifdef CONFIG_ARCH_PXA 101#error "Can't configure both IXP and PXA" 102#endif 103 104/* IXP doesn't yet support <linux/clk.h> */ 105#define clk_get(dev,name) NULL 106#define clk_enable(clk) do { } while (0) 107#define clk_disable(clk) do { } while (0) 108#define clk_put(clk) do { } while (0) 109 110#endif 111 112#include "pxa25x_udc.h" 113 114 115#ifdef CONFIG_USB_PXA25X_SMALL 116#define SIZE_STR " (small)" 117#else 118#define SIZE_STR "" 119#endif 120 121/* --------------------------------------------------------------------------- 122 * endpoint related parts of the api to the usb controller hardware, 123 * used by gadget driver; and the inner talker-to-hardware core. 124 * --------------------------------------------------------------------------- 125 */ 126 127static void pxa25x_ep_fifo_flush (struct usb_ep *ep); 128static void nuke (struct pxa25x_ep *, int status); 129 130/* one GPIO should control a D+ pullup, so host sees this device (or not) */ 131static void pullup_off(void) 132{ 133 struct pxa2xx_udc_mach_info *mach = the_controller->mach; 134 int off_level = mach->gpio_pullup_inverted; 135 136 if (gpio_is_valid(mach->gpio_pullup)) 137 gpio_set_value(mach->gpio_pullup, off_level); 138 else if (mach->udc_command) 139 mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT); 140} 141 142static void pullup_on(void) 143{ 144 struct pxa2xx_udc_mach_info *mach = the_controller->mach; 145 int on_level = !mach->gpio_pullup_inverted; 146 147 if (gpio_is_valid(mach->gpio_pullup)) 148 gpio_set_value(mach->gpio_pullup, on_level); 149 else if (mach->udc_command) 150 mach->udc_command(PXA2XX_UDC_CMD_CONNECT); 151} 152 153static void pio_irq_enable(int bEndpointAddress) 154{ 155 bEndpointAddress &= 0xf; 156 if (bEndpointAddress < 8) 157 UICR0 &= ~(1 << bEndpointAddress); 158 else { 159 bEndpointAddress -= 8; 160 UICR1 &= ~(1 << bEndpointAddress); 161 } 162} 163 164static void pio_irq_disable(int bEndpointAddress) 165{ 166 bEndpointAddress &= 0xf; 167 if (bEndpointAddress < 8) 168 UICR0 |= 1 << bEndpointAddress; 169 else { 170 bEndpointAddress -= 8; 171 UICR1 |= 1 << bEndpointAddress; 172 } 173} 174 175/* The UDCCR reg contains mask and interrupt status bits, 176 * so using '|=' isn't safe as it may ack an interrupt. 177 */ 178#define UDCCR_MASK_BITS (UDCCR_REM | UDCCR_SRM | UDCCR_UDE) 179 180static inline void udc_set_mask_UDCCR(int mask) 181{ 182 UDCCR = (UDCCR & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS); 183} 184 185static inline void udc_clear_mask_UDCCR(int mask) 186{ 187 UDCCR = (UDCCR & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS); 188} 189 190static inline void udc_ack_int_UDCCR(int mask) 191{ 192 /* udccr contains the bits we dont want to change */ 193 __u32 udccr = UDCCR & UDCCR_MASK_BITS; 194 195 UDCCR = udccr | (mask & ~UDCCR_MASK_BITS); 196} 197 198/* 199 * endpoint enable/disable 200 * 201 * we need to verify the descriptors used to enable endpoints. since pxa25x 202 * endpoint configurations are fixed, and are pretty much always enabled, 203 * there's not a lot to manage here. 204 * 205 * because pxa25x can't selectively initialize bulk (or interrupt) endpoints, 206 * (resetting endpoint halt and toggle), SET_INTERFACE is unusable except 207 * for a single interface (with only the default altsetting) and for gadget 208 * drivers that don't halt endpoints (not reset by set_interface). that also 209 * means that if you use ISO, you must violate the USB spec rule that all 210 * iso endpoints must be in non-default altsettings. 211 */ 212static int pxa25x_ep_enable (struct usb_ep *_ep, 213 const struct usb_endpoint_descriptor *desc) 214{ 215 struct pxa25x_ep *ep; 216 struct pxa25x_udc *dev; 217 218 ep = container_of (_ep, struct pxa25x_ep, ep); 219 if (!_ep || !desc || _ep->name == ep0name 220 || desc->bDescriptorType != USB_DT_ENDPOINT 221 || ep->bEndpointAddress != desc->bEndpointAddress 222 || ep->fifo_size < usb_endpoint_maxp (desc)) { 223 DMSG("%s, bad ep or descriptor\n", __func__); 224 return -EINVAL; 225 } 226 227 /* xfer types must match, except that interrupt ~= bulk */ 228 if (ep->bmAttributes != desc->bmAttributes 229 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK 230 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { 231 DMSG("%s, %s type mismatch\n", __func__, _ep->name); 232 return -EINVAL; 233 } 234 235 /* hardware _could_ do smaller, but driver doesn't */ 236 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK 237 && usb_endpoint_maxp (desc) 238 != BULK_FIFO_SIZE) 239 || !desc->wMaxPacketSize) { 240 DMSG("%s, bad %s maxpacket\n", __func__, _ep->name); 241 return -ERANGE; 242 } 243 244 dev = ep->dev; 245 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { 246 DMSG("%s, bogus device state\n", __func__); 247 return -ESHUTDOWN; 248 } 249 250 ep->ep.desc = desc; 251 ep->stopped = 0; 252 ep->pio_irqs = 0; 253 ep->ep.maxpacket = usb_endpoint_maxp (desc); 254 255 /* flush fifo (mostly for OUT buffers) */ 256 pxa25x_ep_fifo_flush (_ep); 257 258 /* ... reset halt state too, if we could ... */ 259 260 DBG(DBG_VERBOSE, "enabled %s\n", _ep->name); 261 return 0; 262} 263 264static int pxa25x_ep_disable (struct usb_ep *_ep) 265{ 266 struct pxa25x_ep *ep; 267 unsigned long flags; 268 269 ep = container_of (_ep, struct pxa25x_ep, ep); 270 if (!_ep || !ep->ep.desc) { 271 DMSG("%s, %s not enabled\n", __func__, 272 _ep ? ep->ep.name : NULL); 273 return -EINVAL; 274 } 275 local_irq_save(flags); 276 277 nuke (ep, -ESHUTDOWN); 278 279 /* flush fifo (mostly for IN buffers) */ 280 pxa25x_ep_fifo_flush (_ep); 281 282 ep->ep.desc = NULL; 283 ep->stopped = 1; 284 285 local_irq_restore(flags); 286 DBG(DBG_VERBOSE, "%s disabled\n", _ep->name); 287 return 0; 288} 289 290/*-------------------------------------------------------------------------*/ 291 292/* for the pxa25x, these can just wrap kmalloc/kfree. gadget drivers 293 * must still pass correctly initialized endpoints, since other controller 294 * drivers may care about how it's currently set up (dma issues etc). 295 */ 296 297/* 298 * pxa25x_ep_alloc_request - allocate a request data structure 299 */ 300static struct usb_request * 301pxa25x_ep_alloc_request (struct usb_ep *_ep, gfp_t gfp_flags) 302{ 303 struct pxa25x_request *req; 304 305 req = kzalloc(sizeof(*req), gfp_flags); 306 if (!req) 307 return NULL; 308 309 INIT_LIST_HEAD (&req->queue); 310 return &req->req; 311} 312 313 314/* 315 * pxa25x_ep_free_request - deallocate a request data structure 316 */ 317static void 318pxa25x_ep_free_request (struct usb_ep *_ep, struct usb_request *_req) 319{ 320 struct pxa25x_request *req; 321 322 req = container_of (_req, struct pxa25x_request, req); 323 WARN_ON(!list_empty (&req->queue)); 324 kfree(req); 325} 326 327/*-------------------------------------------------------------------------*/ 328 329/* 330 * done - retire a request; caller blocked irqs 331 */ 332static void done(struct pxa25x_ep *ep, struct pxa25x_request *req, int status) 333{ 334 unsigned stopped = ep->stopped; 335 336 list_del_init(&req->queue); 337 338 if (likely (req->req.status == -EINPROGRESS)) 339 req->req.status = status; 340 else 341 status = req->req.status; 342 343 if (status && status != -ESHUTDOWN) 344 DBG(DBG_VERBOSE, "complete %s req %p stat %d len %u/%u\n", 345 ep->ep.name, &req->req, status, 346 req->req.actual, req->req.length); 347 348 /* don't modify queue heads during completion callback */ 349 ep->stopped = 1; 350 req->req.complete(&ep->ep, &req->req); 351 ep->stopped = stopped; 352} 353 354 355static inline void ep0_idle (struct pxa25x_udc *dev) 356{ 357 dev->ep0state = EP0_IDLE; 358} 359 360static int 361write_packet(volatile u32 *uddr, struct pxa25x_request *req, unsigned max) 362{ 363 u8 *buf; 364 unsigned length, count; 365 366 buf = req->req.buf + req->req.actual; 367 prefetch(buf); 368 369 /* how big will this packet be? */ 370 length = min(req->req.length - req->req.actual, max); 371 req->req.actual += length; 372 373 count = length; 374 while (likely(count--)) 375 *uddr = *buf++; 376 377 return length; 378} 379 380/* 381 * write to an IN endpoint fifo, as many packets as possible. 382 * irqs will use this to write the rest later. 383 * caller guarantees at least one packet buffer is ready (or a zlp). 384 */ 385static int 386write_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 387{ 388 unsigned max; 389 390 max = usb_endpoint_maxp(ep->ep.desc); 391 do { 392 unsigned count; 393 int is_last, is_short; 394 395 count = write_packet(ep->reg_uddr, req, max); 396 397 /* last packet is usually short (or a zlp) */ 398 if (unlikely (count != max)) 399 is_last = is_short = 1; 400 else { 401 if (likely(req->req.length != req->req.actual) 402 || req->req.zero) 403 is_last = 0; 404 else 405 is_last = 1; 406 /* interrupt/iso maxpacket may not fill the fifo */ 407 is_short = unlikely (max < ep->fifo_size); 408 } 409 410 DBG(DBG_VERY_NOISY, "wrote %s %d bytes%s%s %d left %p\n", 411 ep->ep.name, count, 412 is_last ? "/L" : "", is_short ? "/S" : "", 413 req->req.length - req->req.actual, req); 414 415 /* let loose that packet. maybe try writing another one, 416 * double buffering might work. TSP, TPC, and TFS 417 * bit values are the same for all normal IN endpoints. 418 */ 419 *ep->reg_udccs = UDCCS_BI_TPC; 420 if (is_short) 421 *ep->reg_udccs = UDCCS_BI_TSP; 422 423 /* requests complete when all IN data is in the FIFO */ 424 if (is_last) { 425 done (ep, req, 0); 426 if (list_empty(&ep->queue)) 427 pio_irq_disable (ep->bEndpointAddress); 428 return 1; 429 } 430 431 // TODO experiment: how robust can fifo mode tweaking be? 432 // double buffering is off in the default fifo mode, which 433 // prevents TFS from being set here. 434 435 } while (*ep->reg_udccs & UDCCS_BI_TFS); 436 return 0; 437} 438 439/* caller asserts req->pending (ep0 irq status nyet cleared); starts 440 * ep0 data stage. these chips want very simple state transitions. 441 */ 442static inline 443void ep0start(struct pxa25x_udc *dev, u32 flags, const char *tag) 444{ 445 UDCCS0 = flags|UDCCS0_SA|UDCCS0_OPR; 446 USIR0 = USIR0_IR0; 447 dev->req_pending = 0; 448 DBG(DBG_VERY_NOISY, "%s %s, %02x/%02x\n", 449 __func__, tag, UDCCS0, flags); 450} 451 452static int 453write_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 454{ 455 unsigned count; 456 int is_short; 457 458 count = write_packet(&UDDR0, req, EP0_FIFO_SIZE); 459 ep->dev->stats.write.bytes += count; 460 461 /* last packet "must be" short (or a zlp) */ 462 is_short = (count != EP0_FIFO_SIZE); 463 464 DBG(DBG_VERY_NOISY, "ep0in %d bytes %d left %p\n", count, 465 req->req.length - req->req.actual, req); 466 467 if (unlikely (is_short)) { 468 if (ep->dev->req_pending) 469 ep0start(ep->dev, UDCCS0_IPR, "short IN"); 470 else 471 UDCCS0 = UDCCS0_IPR; 472 473 count = req->req.length; 474 done (ep, req, 0); 475 ep0_idle(ep->dev); 476#ifndef CONFIG_ARCH_IXP4XX 477#if 1 478 /* This seems to get rid of lost status irqs in some cases: 479 * host responds quickly, or next request involves config 480 * change automagic, or should have been hidden, or ... 481 * 482 * FIXME get rid of all udelays possible... 483 */ 484 if (count >= EP0_FIFO_SIZE) { 485 count = 100; 486 do { 487 if ((UDCCS0 & UDCCS0_OPR) != 0) { 488 /* clear OPR, generate ack */ 489 UDCCS0 = UDCCS0_OPR; 490 break; 491 } 492 count--; 493 udelay(1); 494 } while (count); 495 } 496#endif 497#endif 498 } else if (ep->dev->req_pending) 499 ep0start(ep->dev, 0, "IN"); 500 return is_short; 501} 502 503 504/* 505 * read_fifo - unload packet(s) from the fifo we use for usb OUT 506 * transfers and put them into the request. caller should have made 507 * sure there's at least one packet ready. 508 * 509 * returns true if the request completed because of short packet or the 510 * request buffer having filled (and maybe overran till end-of-packet). 511 */ 512static int 513read_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 514{ 515 for (;;) { 516 u32 udccs; 517 u8 *buf; 518 unsigned bufferspace, count, is_short; 519 520 /* make sure there's a packet in the FIFO. 521 * UDCCS_{BO,IO}_RPC are all the same bit value. 522 * UDCCS_{BO,IO}_RNE are all the same bit value. 523 */ 524 udccs = *ep->reg_udccs; 525 if (unlikely ((udccs & UDCCS_BO_RPC) == 0)) 526 break; 527 buf = req->req.buf + req->req.actual; 528 prefetchw(buf); 529 bufferspace = req->req.length - req->req.actual; 530 531 /* read all bytes from this packet */ 532 if (likely (udccs & UDCCS_BO_RNE)) { 533 count = 1 + (0x0ff & *ep->reg_ubcr); 534 req->req.actual += min (count, bufferspace); 535 } else /* zlp */ 536 count = 0; 537 is_short = (count < ep->ep.maxpacket); 538 DBG(DBG_VERY_NOISY, "read %s %02x, %d bytes%s req %p %d/%d\n", 539 ep->ep.name, udccs, count, 540 is_short ? "/S" : "", 541 req, req->req.actual, req->req.length); 542 while (likely (count-- != 0)) { 543 u8 byte = (u8) *ep->reg_uddr; 544 545 if (unlikely (bufferspace == 0)) { 546 /* this happens when the driver's buffer 547 * is smaller than what the host sent. 548 * discard the extra data. 549 */ 550 if (req->req.status != -EOVERFLOW) 551 DMSG("%s overflow %d\n", 552 ep->ep.name, count); 553 req->req.status = -EOVERFLOW; 554 } else { 555 *buf++ = byte; 556 bufferspace--; 557 } 558 } 559 *ep->reg_udccs = UDCCS_BO_RPC; 560 /* RPC/RSP/RNE could now reflect the other packet buffer */ 561 562 /* iso is one request per packet */ 563 if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { 564 if (udccs & UDCCS_IO_ROF) 565 req->req.status = -EHOSTUNREACH; 566 /* more like "is_done" */ 567 is_short = 1; 568 } 569 570 /* completion */ 571 if (is_short || req->req.actual == req->req.length) { 572 done (ep, req, 0); 573 if (list_empty(&ep->queue)) 574 pio_irq_disable (ep->bEndpointAddress); 575 return 1; 576 } 577 578 /* finished that packet. the next one may be waiting... */ 579 } 580 return 0; 581} 582 583/* 584 * special ep0 version of the above. no UBCR0 or double buffering; status 585 * handshaking is magic. most device protocols don't need control-OUT. 586 * CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other 587 * protocols do use them. 588 */ 589static int 590read_ep0_fifo (struct pxa25x_ep *ep, struct pxa25x_request *req) 591{ 592 u8 *buf, byte; 593 unsigned bufferspace; 594 595 buf = req->req.buf + req->req.actual; 596 bufferspace = req->req.length - req->req.actual; 597 598 while (UDCCS0 & UDCCS0_RNE) { 599 byte = (u8) UDDR0; 600 601 if (unlikely (bufferspace == 0)) { 602 /* this happens when the driver's buffer 603 * is smaller than what the host sent. 604 * discard the extra data. 605 */ 606 if (req->req.status != -EOVERFLOW) 607 DMSG("%s overflow\n", ep->ep.name); 608 req->req.status = -EOVERFLOW; 609 } else { 610 *buf++ = byte; 611 req->req.actual++; 612 bufferspace--; 613 } 614 } 615 616 UDCCS0 = UDCCS0_OPR | UDCCS0_IPR; 617 618 /* completion */ 619 if (req->req.actual >= req->req.length) 620 return 1; 621 622 /* finished that packet. the next one may be waiting... */ 623 return 0; 624} 625 626/*-------------------------------------------------------------------------*/ 627 628static int 629pxa25x_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) 630{ 631 struct pxa25x_request *req; 632 struct pxa25x_ep *ep; 633 struct pxa25x_udc *dev; 634 unsigned long flags; 635 636 req = container_of(_req, struct pxa25x_request, req); 637 if (unlikely (!_req || !_req->complete || !_req->buf 638 || !list_empty(&req->queue))) { 639 DMSG("%s, bad params\n", __func__); 640 return -EINVAL; 641 } 642 643 ep = container_of(_ep, struct pxa25x_ep, ep); 644 if (unlikely(!_ep || (!ep->ep.desc && ep->ep.name != ep0name))) { 645 DMSG("%s, bad ep\n", __func__); 646 return -EINVAL; 647 } 648 649 dev = ep->dev; 650 if (unlikely (!dev->driver 651 || dev->gadget.speed == USB_SPEED_UNKNOWN)) { 652 DMSG("%s, bogus device state\n", __func__); 653 return -ESHUTDOWN; 654 } 655 656 /* iso is always one packet per request, that's the only way 657 * we can report per-packet status. that also helps with dma. 658 */ 659 if (unlikely (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC 660 && req->req.length > usb_endpoint_maxp(ep->ep.desc))) 661 return -EMSGSIZE; 662 663 DBG(DBG_NOISY, "%s queue req %p, len %d buf %p\n", 664 _ep->name, _req, _req->length, _req->buf); 665 666 local_irq_save(flags); 667 668 _req->status = -EINPROGRESS; 669 _req->actual = 0; 670 671 /* kickstart this i/o queue? */ 672 if (list_empty(&ep->queue) && !ep->stopped) { 673 if (ep->ep.desc == NULL/* ep0 */) { 674 unsigned length = _req->length; 675 676 switch (dev->ep0state) { 677 case EP0_IN_DATA_PHASE: 678 dev->stats.write.ops++; 679 if (write_ep0_fifo(ep, req)) 680 req = NULL; 681 break; 682 683 case EP0_OUT_DATA_PHASE: 684 dev->stats.read.ops++; 685 /* messy ... */ 686 if (dev->req_config) { 687 DBG(DBG_VERBOSE, "ep0 config ack%s\n", 688 dev->has_cfr ? "" : " raced"); 689 if (dev->has_cfr) 690 UDCCFR = UDCCFR_AREN|UDCCFR_ACM 691 |UDCCFR_MB1; 692 done(ep, req, 0); 693 dev->ep0state = EP0_END_XFER; 694 local_irq_restore (flags); 695 return 0; 696 } 697 if (dev->req_pending) 698 ep0start(dev, UDCCS0_IPR, "OUT"); 699 if (length == 0 || ((UDCCS0 & UDCCS0_RNE) != 0 700 && read_ep0_fifo(ep, req))) { 701 ep0_idle(dev); 702 done(ep, req, 0); 703 req = NULL; 704 } 705 break; 706 707 default: 708 DMSG("ep0 i/o, odd state %d\n", dev->ep0state); 709 local_irq_restore (flags); 710 return -EL2HLT; 711 } 712 /* can the FIFO can satisfy the request immediately? */ 713 } else if ((ep->bEndpointAddress & USB_DIR_IN) != 0) { 714 if ((*ep->reg_udccs & UDCCS_BI_TFS) != 0 715 && write_fifo(ep, req)) 716 req = NULL; 717 } else if ((*ep->reg_udccs & UDCCS_BO_RFS) != 0 718 && read_fifo(ep, req)) { 719 req = NULL; 720 } 721 722 if (likely(req && ep->ep.desc)) 723 pio_irq_enable(ep->bEndpointAddress); 724 } 725 726 /* pio or dma irq handler advances the queue. */ 727 if (likely(req != NULL)) 728 list_add_tail(&req->queue, &ep->queue); 729 local_irq_restore(flags); 730 731 return 0; 732} 733 734 735/* 736 * nuke - dequeue ALL requests 737 */ 738static void nuke(struct pxa25x_ep *ep, int status) 739{ 740 struct pxa25x_request *req; 741 742 /* called with irqs blocked */ 743 while (!list_empty(&ep->queue)) { 744 req = list_entry(ep->queue.next, 745 struct pxa25x_request, 746 queue); 747 done(ep, req, status); 748 } 749 if (ep->ep.desc) 750 pio_irq_disable (ep->bEndpointAddress); 751} 752 753 754/* dequeue JUST ONE request */ 755static int pxa25x_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 756{ 757 struct pxa25x_ep *ep; 758 struct pxa25x_request *req; 759 unsigned long flags; 760 761 ep = container_of(_ep, struct pxa25x_ep, ep); 762 if (!_ep || ep->ep.name == ep0name) 763 return -EINVAL; 764 765 local_irq_save(flags); 766 767 /* make sure it's actually queued on this endpoint */ 768 list_for_each_entry (req, &ep->queue, queue) { 769 if (&req->req == _req) 770 break; 771 } 772 if (&req->req != _req) { 773 local_irq_restore(flags); 774 return -EINVAL; 775 } 776 777 done(ep, req, -ECONNRESET); 778 779 local_irq_restore(flags); 780 return 0; 781} 782 783/*-------------------------------------------------------------------------*/ 784 785static int pxa25x_ep_set_halt(struct usb_ep *_ep, int value) 786{ 787 struct pxa25x_ep *ep; 788 unsigned long flags; 789 790 ep = container_of(_ep, struct pxa25x_ep, ep); 791 if (unlikely (!_ep 792 || (!ep->ep.desc && ep->ep.name != ep0name)) 793 || ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) { 794 DMSG("%s, bad ep\n", __func__); 795 return -EINVAL; 796 } 797 if (value == 0) { 798 /* this path (reset toggle+halt) is needed to implement 799 * SET_INTERFACE on normal hardware. but it can't be 800 * done from software on the PXA UDC, and the hardware 801 * forgets to do it as part of SET_INTERFACE automagic. 802 */ 803 DMSG("only host can clear %s halt\n", _ep->name); 804 return -EROFS; 805 } 806 807 local_irq_save(flags); 808 809 if ((ep->bEndpointAddress & USB_DIR_IN) != 0 810 && ((*ep->reg_udccs & UDCCS_BI_TFS) == 0 811 || !list_empty(&ep->queue))) { 812 local_irq_restore(flags); 813 return -EAGAIN; 814 } 815 816 /* FST bit is the same for control, bulk in, bulk out, interrupt in */ 817 *ep->reg_udccs = UDCCS_BI_FST|UDCCS_BI_FTF; 818 819 /* ep0 needs special care */ 820 if (!ep->ep.desc) { 821 start_watchdog(ep->dev); 822 ep->dev->req_pending = 0; 823 ep->dev->ep0state = EP0_STALL; 824 825 /* and bulk/intr endpoints like dropping stalls too */ 826 } else { 827 unsigned i; 828 for (i = 0; i < 1000; i += 20) { 829 if (*ep->reg_udccs & UDCCS_BI_SST) 830 break; 831 udelay(20); 832 } 833 } 834 local_irq_restore(flags); 835 836 DBG(DBG_VERBOSE, "%s halt\n", _ep->name); 837 return 0; 838} 839 840static int pxa25x_ep_fifo_status(struct usb_ep *_ep) 841{ 842 struct pxa25x_ep *ep; 843 844 ep = container_of(_ep, struct pxa25x_ep, ep); 845 if (!_ep) { 846 DMSG("%s, bad ep\n", __func__); 847 return -ENODEV; 848 } 849 /* pxa can't report unclaimed bytes from IN fifos */ 850 if ((ep->bEndpointAddress & USB_DIR_IN) != 0) 851 return -EOPNOTSUPP; 852 if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN 853 || (*ep->reg_udccs & UDCCS_BO_RFS) == 0) 854 return 0; 855 else 856 return (*ep->reg_ubcr & 0xfff) + 1; 857} 858 859static void pxa25x_ep_fifo_flush(struct usb_ep *_ep) 860{ 861 struct pxa25x_ep *ep; 862 863 ep = container_of(_ep, struct pxa25x_ep, ep); 864 if (!_ep || ep->ep.name == ep0name || !list_empty(&ep->queue)) { 865 DMSG("%s, bad ep\n", __func__); 866 return; 867 } 868 869 /* toggle and halt bits stay unchanged */ 870 871 /* for OUT, just read and discard the FIFO contents. */ 872 if ((ep->bEndpointAddress & USB_DIR_IN) == 0) { 873 while (((*ep->reg_udccs) & UDCCS_BO_RNE) != 0) 874 (void) *ep->reg_uddr; 875 return; 876 } 877 878 /* most IN status is the same, but ISO can't stall */ 879 *ep->reg_udccs = UDCCS_BI_TPC|UDCCS_BI_FTF|UDCCS_BI_TUR 880 | (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC 881 ? 0 : UDCCS_BI_SST); 882} 883 884 885static struct usb_ep_ops pxa25x_ep_ops = { 886 .enable = pxa25x_ep_enable, 887 .disable = pxa25x_ep_disable, 888 889 .alloc_request = pxa25x_ep_alloc_request, 890 .free_request = pxa25x_ep_free_request, 891 892 .queue = pxa25x_ep_queue, 893 .dequeue = pxa25x_ep_dequeue, 894 895 .set_halt = pxa25x_ep_set_halt, 896 .fifo_status = pxa25x_ep_fifo_status, 897 .fifo_flush = pxa25x_ep_fifo_flush, 898}; 899 900 901/* --------------------------------------------------------------------------- 902 * device-scoped parts of the api to the usb controller hardware 903 * --------------------------------------------------------------------------- 904 */ 905 906static int pxa25x_udc_get_frame(struct usb_gadget *_gadget) 907{ 908 return ((UFNRH & 0x07) << 8) | (UFNRL & 0xff); 909} 910 911static int pxa25x_udc_wakeup(struct usb_gadget *_gadget) 912{ 913 /* host may not have enabled remote wakeup */ 914 if ((UDCCS0 & UDCCS0_DRWF) == 0) 915 return -EHOSTUNREACH; 916 udc_set_mask_UDCCR(UDCCR_RSM); 917 return 0; 918} 919 920static void stop_activity(struct pxa25x_udc *, struct usb_gadget_driver *); 921static void udc_enable (struct pxa25x_udc *); 922static void udc_disable(struct pxa25x_udc *); 923 924/* We disable the UDC -- and its 48 MHz clock -- whenever it's not 925 * in active use. 926 */ 927static int pullup(struct pxa25x_udc *udc) 928{ 929 int is_active = udc->vbus && udc->pullup && !udc->suspended; 930 DMSG("%s\n", is_active ? "active" : "inactive"); 931 if (is_active) { 932 if (!udc->active) { 933 udc->active = 1; 934 /* Enable clock for USB device */ 935 clk_enable(udc->clk); 936 udc_enable(udc); 937 } 938 } else { 939 if (udc->active) { 940 if (udc->gadget.speed != USB_SPEED_UNKNOWN) { 941 DMSG("disconnect %s\n", udc->driver 942 ? udc->driver->driver.name 943 : "(no driver)"); 944 stop_activity(udc, udc->driver); 945 } 946 udc_disable(udc); 947 /* Disable clock for USB device */ 948 clk_disable(udc->clk); 949 udc->active = 0; 950 } 951 952 } 953 return 0; 954} 955 956/* VBUS reporting logically comes from a transceiver */ 957static int pxa25x_udc_vbus_session(struct usb_gadget *_gadget, int is_active) 958{ 959 struct pxa25x_udc *udc; 960 961 udc = container_of(_gadget, struct pxa25x_udc, gadget); 962 udc->vbus = is_active; 963 DMSG("vbus %s\n", is_active ? "supplied" : "inactive"); 964 pullup(udc); 965 return 0; 966} 967 968/* drivers may have software control over D+ pullup */ 969static int pxa25x_udc_pullup(struct usb_gadget *_gadget, int is_active) 970{ 971 struct pxa25x_udc *udc; 972 973 udc = container_of(_gadget, struct pxa25x_udc, gadget); 974 975 /* not all boards support pullup control */ 976 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command) 977 return -EOPNOTSUPP; 978 979 udc->pullup = (is_active != 0); 980 pullup(udc); 981 return 0; 982} 983 984/* boards may consume current from VBUS, up to 100-500mA based on config. 985 * the 500uA suspend ceiling means that exclusively vbus-powered PXA designs 986 * violate USB specs. 987 */ 988static int pxa25x_udc_vbus_draw(struct usb_gadget *_gadget, unsigned mA) 989{ 990 struct pxa25x_udc *udc; 991 992 udc = container_of(_gadget, struct pxa25x_udc, gadget); 993 994 if (!IS_ERR_OR_NULL(udc->transceiver)) 995 return usb_phy_set_power(udc->transceiver, mA); 996 return -EOPNOTSUPP; 997} 998 999static int pxa25x_start(struct usb_gadget_driver *driver, 1000 int (*bind)(struct usb_gadget *, struct usb_gadget_driver *)); 1001static int pxa25x_stop(struct usb_gadget_driver *driver); 1002 1003static const struct usb_gadget_ops pxa25x_udc_ops = { 1004 .get_frame = pxa25x_udc_get_frame, 1005 .wakeup = pxa25x_udc_wakeup, 1006 .vbus_session = pxa25x_udc_vbus_session, 1007 .pullup = pxa25x_udc_pullup, 1008 .vbus_draw = pxa25x_udc_vbus_draw, 1009 .start = pxa25x_start, 1010 .stop = pxa25x_stop, 1011}; 1012 1013/*-------------------------------------------------------------------------*/ 1014 1015#ifdef CONFIG_USB_GADGET_DEBUG_FS 1016 1017static int 1018udc_seq_show(struct seq_file *m, void *_d) 1019{ 1020 struct pxa25x_udc *dev = m->private; 1021 unsigned long flags; 1022 int i; 1023 u32 tmp; 1024 1025 local_irq_save(flags); 1026 1027 /* basic device status */ 1028 seq_printf(m, DRIVER_DESC "\n" 1029 "%s version: %s\nGadget driver: %s\nHost %s\n\n", 1030 driver_name, DRIVER_VERSION SIZE_STR "(pio)", 1031 dev->driver ? dev->driver->driver.name : "(none)", 1032 dev->gadget.speed == USB_SPEED_FULL ? "full speed" : "disconnected"); 1033 1034 /* registers for device and ep0 */ 1035 seq_printf(m, 1036 "uicr %02X.%02X, usir %02X.%02x, ufnr %02X.%02X\n", 1037 UICR1, UICR0, USIR1, USIR0, UFNRH, UFNRL); 1038 1039 tmp = UDCCR; 1040 seq_printf(m, 1041 "udccr %02X =%s%s%s%s%s%s%s%s\n", tmp, 1042 (tmp & UDCCR_REM) ? " rem" : "", 1043 (tmp & UDCCR_RSTIR) ? " rstir" : "", 1044 (tmp & UDCCR_SRM) ? " srm" : "", 1045 (tmp & UDCCR_SUSIR) ? " susir" : "", 1046 (tmp & UDCCR_RESIR) ? " resir" : "", 1047 (tmp & UDCCR_RSM) ? " rsm" : "", 1048 (tmp & UDCCR_UDA) ? " uda" : "", 1049 (tmp & UDCCR_UDE) ? " ude" : ""); 1050 1051 tmp = UDCCS0; 1052 seq_printf(m, 1053 "udccs0 %02X =%s%s%s%s%s%s%s%s\n", tmp, 1054 (tmp & UDCCS0_SA) ? " sa" : "", 1055 (tmp & UDCCS0_RNE) ? " rne" : "", 1056 (tmp & UDCCS0_FST) ? " fst" : "", 1057 (tmp & UDCCS0_SST) ? " sst" : "", 1058 (tmp & UDCCS0_DRWF) ? " dwrf" : "", 1059 (tmp & UDCCS0_FTF) ? " ftf" : "", 1060 (tmp & UDCCS0_IPR) ? " ipr" : "", 1061 (tmp & UDCCS0_OPR) ? " opr" : ""); 1062 1063 if (dev->has_cfr) { 1064 tmp = UDCCFR; 1065 seq_printf(m, 1066 "udccfr %02X =%s%s\n", tmp, 1067 (tmp & UDCCFR_AREN) ? " aren" : "", 1068 (tmp & UDCCFR_ACM) ? " acm" : ""); 1069 } 1070 1071 if (dev->gadget.speed != USB_SPEED_FULL || !dev->driver) 1072 goto done; 1073 1074 seq_printf(m, "ep0 IN %lu/%lu, OUT %lu/%lu\nirqs %lu\n\n", 1075 dev->stats.write.bytes, dev->stats.write.ops, 1076 dev->stats.read.bytes, dev->stats.read.ops, 1077 dev->stats.irqs); 1078 1079 /* dump endpoint queues */ 1080 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1081 struct pxa25x_ep *ep = &dev->ep [i]; 1082 struct pxa25x_request *req; 1083 1084 if (i != 0) { 1085 const struct usb_endpoint_descriptor *desc; 1086 1087 desc = ep->ep.desc; 1088 if (!desc) 1089 continue; 1090 tmp = *dev->ep [i].reg_udccs; 1091 seq_printf(m, 1092 "%s max %d %s udccs %02x irqs %lu\n", 1093 ep->ep.name, usb_endpoint_maxp(desc), 1094 "pio", tmp, ep->pio_irqs); 1095 /* TODO translate all five groups of udccs bits! */ 1096 1097 } else /* ep0 should only have one transfer queued */ 1098 seq_printf(m, "ep0 max 16 pio irqs %lu\n", 1099 ep->pio_irqs); 1100 1101 if (list_empty(&ep->queue)) { 1102 seq_printf(m, "\t(nothing queued)\n"); 1103 continue; 1104 } 1105 list_for_each_entry(req, &ep->queue, queue) { 1106 seq_printf(m, 1107 "\treq %p len %d/%d buf %p\n", 1108 &req->req, req->req.actual, 1109 req->req.length, req->req.buf); 1110 } 1111 } 1112 1113done: 1114 local_irq_restore(flags); 1115 return 0; 1116} 1117 1118static int 1119udc_debugfs_open(struct inode *inode, struct file *file) 1120{ 1121 return single_open(file, udc_seq_show, inode->i_private); 1122} 1123 1124static const struct file_operations debug_fops = { 1125 .open = udc_debugfs_open, 1126 .read = seq_read, 1127 .llseek = seq_lseek, 1128 .release = single_release, 1129 .owner = THIS_MODULE, 1130}; 1131 1132#define create_debug_files(dev) \ 1133 do { \ 1134 dev->debugfs_udc = debugfs_create_file(dev->gadget.name, \ 1135 S_IRUGO, NULL, dev, &debug_fops); \ 1136 } while (0) 1137#define remove_debug_files(dev) \ 1138 do { \ 1139 if (dev->debugfs_udc) \ 1140 debugfs_remove(dev->debugfs_udc); \ 1141 } while (0) 1142 1143#else /* !CONFIG_USB_GADGET_DEBUG_FILES */ 1144 1145#define create_debug_files(dev) do {} while (0) 1146#define remove_debug_files(dev) do {} while (0) 1147 1148#endif /* CONFIG_USB_GADGET_DEBUG_FILES */ 1149 1150/*-------------------------------------------------------------------------*/ 1151 1152/* 1153 * udc_disable - disable USB device controller 1154 */ 1155static void udc_disable(struct pxa25x_udc *dev) 1156{ 1157 /* block all irqs */ 1158 udc_set_mask_UDCCR(UDCCR_SRM|UDCCR_REM); 1159 UICR0 = UICR1 = 0xff; 1160 UFNRH = UFNRH_SIM; 1161 1162 /* if hardware supports it, disconnect from usb */ 1163 pullup_off(); 1164 1165 udc_clear_mask_UDCCR(UDCCR_UDE); 1166 1167 ep0_idle (dev); 1168 dev->gadget.speed = USB_SPEED_UNKNOWN; 1169} 1170 1171 1172/* 1173 * udc_reinit - initialize software state 1174 */ 1175static void udc_reinit(struct pxa25x_udc *dev) 1176{ 1177 u32 i; 1178 1179 /* device/ep0 records init */ 1180 INIT_LIST_HEAD (&dev->gadget.ep_list); 1181 INIT_LIST_HEAD (&dev->gadget.ep0->ep_list); 1182 dev->ep0state = EP0_IDLE; 1183 1184 /* basic endpoint records init */ 1185 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1186 struct pxa25x_ep *ep = &dev->ep[i]; 1187 1188 if (i != 0) 1189 list_add_tail (&ep->ep.ep_list, &dev->gadget.ep_list); 1190 1191 ep->ep.desc = NULL; 1192 ep->stopped = 0; 1193 INIT_LIST_HEAD (&ep->queue); 1194 ep->pio_irqs = 0; 1195 } 1196 1197 /* the rest was statically initialized, and is read-only */ 1198} 1199 1200/* until it's enabled, this UDC should be completely invisible 1201 * to any USB host. 1202 */ 1203static void udc_enable (struct pxa25x_udc *dev) 1204{ 1205 udc_clear_mask_UDCCR(UDCCR_UDE); 1206 1207 /* try to clear these bits before we enable the udc */ 1208 udc_ack_int_UDCCR(UDCCR_SUSIR|/*UDCCR_RSTIR|*/UDCCR_RESIR); 1209 1210 ep0_idle(dev); 1211 dev->gadget.speed = USB_SPEED_UNKNOWN; 1212 dev->stats.irqs = 0; 1213 1214 /* 1215 * sequence taken from chapter 12.5.10, PXA250 AppProcDevManual: 1216 * - enable UDC 1217 * - if RESET is already in progress, ack interrupt 1218 * - unmask reset interrupt 1219 */ 1220 udc_set_mask_UDCCR(UDCCR_UDE); 1221 if (!(UDCCR & UDCCR_UDA)) 1222 udc_ack_int_UDCCR(UDCCR_RSTIR); 1223 1224 if (dev->has_cfr /* UDC_RES2 is defined */) { 1225 /* pxa255 (a0+) can avoid a set_config race that could 1226 * prevent gadget drivers from configuring correctly 1227 */ 1228 UDCCFR = UDCCFR_ACM | UDCCFR_MB1; 1229 } else { 1230 /* "USB test mode" for pxa250 errata 40-42 (stepping a0, a1) 1231 * which could result in missing packets and interrupts. 1232 * supposedly one bit per endpoint, controlling whether it 1233 * double buffers or not; ACM/AREN bits fit into the holes. 1234 * zero bits (like USIR0_IRx) disable double buffering. 1235 */ 1236 UDC_RES1 = 0x00; 1237 UDC_RES2 = 0x00; 1238 } 1239 1240 /* enable suspend/resume and reset irqs */ 1241 udc_clear_mask_UDCCR(UDCCR_SRM | UDCCR_REM); 1242 1243 /* enable ep0 irqs */ 1244 UICR0 &= ~UICR0_IM0; 1245 1246 /* if hardware supports it, pullup D+ and wait for reset */ 1247 pullup_on(); 1248} 1249 1250 1251/* when a driver is successfully registered, it will receive 1252 * control requests including set_configuration(), which enables 1253 * non-control requests. then usb traffic follows until a 1254 * disconnect is reported. then a host may connect again, or 1255 * the driver might get unbound. 1256 */ 1257static int pxa25x_start(struct usb_gadget_driver *driver, 1258 int (*bind)(struct usb_gadget *, struct usb_gadget_driver *)) 1259{ 1260 struct pxa25x_udc *dev = the_controller; 1261 int retval; 1262 1263 if (!driver 1264 || driver->max_speed < USB_SPEED_FULL 1265 || !bind 1266 || !driver->disconnect 1267 || !driver->setup) 1268 return -EINVAL; 1269 if (!dev) 1270 return -ENODEV; 1271 if (dev->driver) 1272 return -EBUSY; 1273 1274 /* first hook up the driver ... */ 1275 dev->driver = driver; 1276 dev->gadget.dev.driver = &driver->driver; 1277 dev->pullup = 1; 1278 1279 retval = device_add (&dev->gadget.dev); 1280 if (retval) { 1281fail: 1282 dev->driver = NULL; 1283 dev->gadget.dev.driver = NULL; 1284 return retval; 1285 } 1286 retval = bind(&dev->gadget, driver); 1287 if (retval) { 1288 DMSG("bind to driver %s --> error %d\n", 1289 driver->driver.name, retval); 1290 device_del (&dev->gadget.dev); 1291 goto fail; 1292 } 1293 1294 /* ... then enable host detection and ep0; and we're ready 1295 * for set_configuration as well as eventual disconnect. 1296 */ 1297 DMSG("registered gadget driver '%s'\n", driver->driver.name); 1298 1299 /* connect to bus through transceiver */ 1300 if (!IS_ERR_OR_NULL(dev->transceiver)) { 1301 retval = otg_set_peripheral(dev->transceiver->otg, 1302 &dev->gadget); 1303 if (retval) { 1304 DMSG("can't bind to transceiver\n"); 1305 if (driver->unbind) 1306 driver->unbind(&dev->gadget); 1307 goto bind_fail; 1308 } 1309 } 1310 1311 pullup(dev); 1312 dump_state(dev); 1313 return 0; 1314bind_fail: 1315 return retval; 1316} 1317 1318static void 1319stop_activity(struct pxa25x_udc *dev, struct usb_gadget_driver *driver) 1320{ 1321 int i; 1322 1323 /* don't disconnect drivers more than once */ 1324 if (dev->gadget.speed == USB_SPEED_UNKNOWN) 1325 driver = NULL; 1326 dev->gadget.speed = USB_SPEED_UNKNOWN; 1327 1328 /* prevent new request submissions, kill any outstanding requests */ 1329 for (i = 0; i < PXA_UDC_NUM_ENDPOINTS; i++) { 1330 struct pxa25x_ep *ep = &dev->ep[i]; 1331 1332 ep->stopped = 1; 1333 nuke(ep, -ESHUTDOWN); 1334 } 1335 del_timer_sync(&dev->timer); 1336 1337 /* report disconnect; the driver is already quiesced */ 1338 if (driver) 1339 driver->disconnect(&dev->gadget); 1340 1341 /* re-init driver-visible data structures */ 1342 udc_reinit(dev); 1343} 1344 1345static int pxa25x_stop(struct usb_gadget_driver *driver) 1346{ 1347 struct pxa25x_udc *dev = the_controller; 1348 1349 if (!dev) 1350 return -ENODEV; 1351 if (!driver || driver != dev->driver || !driver->unbind) 1352 return -EINVAL; 1353 1354 local_irq_disable(); 1355 dev->pullup = 0; 1356 pullup(dev); 1357 stop_activity(dev, driver); 1358 local_irq_enable(); 1359 1360 if (!IS_ERR_OR_NULL(dev->transceiver)) 1361 (void) otg_set_peripheral(dev->transceiver->otg, NULL); 1362 1363 driver->unbind(&dev->gadget); 1364 dev->gadget.dev.driver = NULL; 1365 dev->driver = NULL; 1366 1367 device_del (&dev->gadget.dev); 1368 1369 DMSG("unregistered gadget driver '%s'\n", driver->driver.name); 1370 dump_state(dev); 1371 return 0; 1372} 1373 1374/*-------------------------------------------------------------------------*/ 1375 1376#ifdef CONFIG_ARCH_LUBBOCK 1377 1378/* Lubbock has separate connect and disconnect irqs. More typical designs 1379 * use one GPIO as the VBUS IRQ, and another to control the D+ pullup. 1380 */ 1381 1382static irqreturn_t 1383lubbock_vbus_irq(int irq, void *_dev) 1384{ 1385 struct pxa25x_udc *dev = _dev; 1386 int vbus; 1387 1388 dev->stats.irqs++; 1389 switch (irq) { 1390 case LUBBOCK_USB_IRQ: 1391 vbus = 1; 1392 disable_irq(LUBBOCK_USB_IRQ); 1393 enable_irq(LUBBOCK_USB_DISC_IRQ); 1394 break; 1395 case LUBBOCK_USB_DISC_IRQ: 1396 vbus = 0; 1397 disable_irq(LUBBOCK_USB_DISC_IRQ); 1398 enable_irq(LUBBOCK_USB_IRQ); 1399 break; 1400 default: 1401 return IRQ_NONE; 1402 } 1403 1404 pxa25x_udc_vbus_session(&dev->gadget, vbus); 1405 return IRQ_HANDLED; 1406} 1407 1408#endif 1409 1410 1411/*-------------------------------------------------------------------------*/ 1412 1413static inline void clear_ep_state (struct pxa25x_udc *dev) 1414{ 1415 unsigned i; 1416 1417 /* hardware SET_{CONFIGURATION,INTERFACE} automagic resets endpoint 1418 * fifos, and pending transactions mustn't be continued in any case. 1419 */ 1420 for (i = 1; i < PXA_UDC_NUM_ENDPOINTS; i++) 1421 nuke(&dev->ep[i], -ECONNABORTED); 1422} 1423 1424static void udc_watchdog(unsigned long _dev) 1425{ 1426 struct pxa25x_udc *dev = (void *)_dev; 1427 1428 local_irq_disable(); 1429 if (dev->ep0state == EP0_STALL 1430 && (UDCCS0 & UDCCS0_FST) == 0 1431 && (UDCCS0 & UDCCS0_SST) == 0) { 1432 UDCCS0 = UDCCS0_FST|UDCCS0_FTF; 1433 DBG(DBG_VERBOSE, "ep0 re-stall\n"); 1434 start_watchdog(dev); 1435 } 1436 local_irq_enable(); 1437} 1438 1439static void handle_ep0 (struct pxa25x_udc *dev) 1440{ 1441 u32 udccs0 = UDCCS0; 1442 struct pxa25x_ep *ep = &dev->ep [0]; 1443 struct pxa25x_request *req; 1444 union { 1445 struct usb_ctrlrequest r; 1446 u8 raw [8]; 1447 u32 word [2]; 1448 } u; 1449 1450 if (list_empty(&ep->queue)) 1451 req = NULL; 1452 else 1453 req = list_entry(ep->queue.next, struct pxa25x_request, queue); 1454 1455 /* clear stall status */ 1456 if (udccs0 & UDCCS0_SST) { 1457 nuke(ep, -EPIPE); 1458 UDCCS0 = UDCCS0_SST; 1459 del_timer(&dev->timer); 1460 ep0_idle(dev); 1461 } 1462 1463 /* previous request unfinished? non-error iff back-to-back ... */ 1464 if ((udccs0 & UDCCS0_SA) != 0 && dev->ep0state != EP0_IDLE) { 1465 nuke(ep, 0); 1466 del_timer(&dev->timer); 1467 ep0_idle(dev); 1468 } 1469 1470 switch (dev->ep0state) { 1471 case EP0_IDLE: 1472 /* late-breaking status? */ 1473 udccs0 = UDCCS0; 1474 1475 /* start control request? */ 1476 if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE)) 1477 == (UDCCS0_OPR|UDCCS0_SA|UDCCS0_RNE))) { 1478 int i; 1479 1480 nuke (ep, -EPROTO); 1481 1482 /* read SETUP packet */ 1483 for (i = 0; i < 8; i++) { 1484 if (unlikely(!(UDCCS0 & UDCCS0_RNE))) { 1485bad_setup: 1486 DMSG("SETUP %d!\n", i); 1487 goto stall; 1488 } 1489 u.raw [i] = (u8) UDDR0; 1490 } 1491 if (unlikely((UDCCS0 & UDCCS0_RNE) != 0)) 1492 goto bad_setup; 1493 1494got_setup: 1495 DBG(DBG_VERBOSE, "SETUP %02x.%02x v%04x i%04x l%04x\n", 1496 u.r.bRequestType, u.r.bRequest, 1497 le16_to_cpu(u.r.wValue), 1498 le16_to_cpu(u.r.wIndex), 1499 le16_to_cpu(u.r.wLength)); 1500 1501 /* cope with automagic for some standard requests. */ 1502 dev->req_std = (u.r.bRequestType & USB_TYPE_MASK) 1503 == USB_TYPE_STANDARD; 1504 dev->req_config = 0; 1505 dev->req_pending = 1; 1506 switch (u.r.bRequest) { 1507 /* hardware restricts gadget drivers here! */ 1508 case USB_REQ_SET_CONFIGURATION: 1509 if (u.r.bRequestType == USB_RECIP_DEVICE) { 1510 /* reflect hardware's automagic 1511 * up to the gadget driver. 1512 */ 1513config_change: 1514 dev->req_config = 1; 1515 clear_ep_state(dev); 1516 /* if !has_cfr, there's no synch 1517 * else use AREN (later) not SA|OPR 1518 * USIR0_IR0 acts edge sensitive 1519 */ 1520 } 1521 break; 1522 /* ... and here, even more ... */ 1523 case USB_REQ_SET_INTERFACE: 1524 if (u.r.bRequestType == USB_RECIP_INTERFACE) { 1525 /* udc hardware is broken by design: 1526 * - altsetting may only be zero; 1527 * - hw resets all interfaces' eps; 1528 * - ep reset doesn't include halt(?). 1529 */ 1530 DMSG("broken set_interface (%d/%d)\n", 1531 le16_to_cpu(u.r.wIndex), 1532 le16_to_cpu(u.r.wValue)); 1533 goto config_change; 1534 } 1535 break; 1536 /* hardware was supposed to hide this */ 1537 case USB_REQ_SET_ADDRESS: 1538 if (u.r.bRequestType == USB_RECIP_DEVICE) { 1539 ep0start(dev, 0, "address"); 1540 return; 1541 } 1542 break; 1543 } 1544 1545 if (u.r.bRequestType & USB_DIR_IN) 1546 dev->ep0state = EP0_IN_DATA_PHASE; 1547 else 1548 dev->ep0state = EP0_OUT_DATA_PHASE; 1549 1550 i = dev->driver->setup(&dev->gadget, &u.r); 1551 if (i < 0) { 1552 /* hardware automagic preventing STALL... */ 1553 if (dev->req_config) { 1554 /* hardware sometimes neglects to tell 1555 * tell us about config change events, 1556 * so later ones may fail... 1557 */ 1558 WARNING("config change %02x fail %d?\n", 1559 u.r.bRequest, i); 1560 return; 1561 /* TODO experiment: if has_cfr, 1562 * hardware didn't ACK; maybe we 1563 * could actually STALL! 1564 */ 1565 } 1566 DBG(DBG_VERBOSE, "protocol STALL, " 1567 "%02x err %d\n", UDCCS0, i); 1568stall: 1569 /* the watchdog timer helps deal with cases 1570 * where udc seems to clear FST wrongly, and 1571 * then NAKs instead of STALLing. 1572 */ 1573 ep0start(dev, UDCCS0_FST|UDCCS0_FTF, "stall"); 1574 start_watchdog(dev); 1575 dev->ep0state = EP0_STALL; 1576 1577 /* deferred i/o == no response yet */ 1578 } else if (dev->req_pending) { 1579 if (likely(dev->ep0state == EP0_IN_DATA_PHASE 1580 || dev->req_std || u.r.wLength)) 1581 ep0start(dev, 0, "defer"); 1582 else 1583 ep0start(dev, UDCCS0_IPR, "defer/IPR"); 1584 } 1585 1586 /* expect at least one data or status stage irq */ 1587 return; 1588 1589 } else if (likely((udccs0 & (UDCCS0_OPR|UDCCS0_SA)) 1590 == (UDCCS0_OPR|UDCCS0_SA))) { 1591 unsigned i; 1592 1593 /* pxa210/250 erratum 131 for B0/B1 says RNE lies. 1594 * still observed on a pxa255 a0. 1595 */ 1596 DBG(DBG_VERBOSE, "e131\n"); 1597 nuke(ep, -EPROTO); 1598 1599 /* read SETUP data, but don't trust it too much */ 1600 for (i = 0; i < 8; i++) 1601 u.raw [i] = (u8) UDDR0; 1602 if ((u.r.bRequestType & USB_RECIP_MASK) 1603 > USB_RECIP_OTHER) 1604 goto stall; 1605 if (u.word [0] == 0 && u.word [1] == 0) 1606 goto stall; 1607 goto got_setup; 1608 } else { 1609 /* some random early IRQ: 1610 * - we acked FST 1611 * - IPR cleared 1612 * - OPR got set, without SA (likely status stage) 1613 */ 1614 UDCCS0 = udccs0 & (UDCCS0_SA|UDCCS0_OPR); 1615 } 1616 break; 1617 case EP0_IN_DATA_PHASE: /* GET_DESCRIPTOR etc */ 1618 if (udccs0 & UDCCS0_OPR) { 1619 UDCCS0 = UDCCS0_OPR|UDCCS0_FTF; 1620 DBG(DBG_VERBOSE, "ep0in premature status\n"); 1621 if (req) 1622 done(ep, req, 0); 1623 ep0_idle(dev); 1624 } else /* irq was IPR clearing */ { 1625 if (req) { 1626 /* this IN packet might finish the request */ 1627 (void) write_ep0_fifo(ep, req); 1628 } /* else IN token before response was written */ 1629 } 1630 break; 1631 case EP0_OUT_DATA_PHASE: /* SET_DESCRIPTOR etc */ 1632 if (udccs0 & UDCCS0_OPR) { 1633 if (req) { 1634 /* this OUT packet might finish the request */ 1635 if (read_ep0_fifo(ep, req)) 1636 done(ep, req, 0); 1637 /* else more OUT packets expected */ 1638 } /* else OUT token before read was issued */ 1639 } else /* irq was IPR clearing */ { 1640 DBG(DBG_VERBOSE, "ep0out premature status\n"); 1641 if (req) 1642 done(ep, req, 0); 1643 ep0_idle(dev); 1644 } 1645 break; 1646 case EP0_END_XFER: 1647 if (req) 1648 done(ep, req, 0); 1649 /* ack control-IN status (maybe in-zlp was skipped) 1650 * also appears after some config change events. 1651 */ 1652 if (udccs0 & UDCCS0_OPR) 1653 UDCCS0 = UDCCS0_OPR; 1654 ep0_idle(dev); 1655 break; 1656 case EP0_STALL: 1657 UDCCS0 = UDCCS0_FST; 1658 break; 1659 } 1660 USIR0 = USIR0_IR0; 1661} 1662 1663static void handle_ep(struct pxa25x_ep *ep) 1664{ 1665 struct pxa25x_request *req; 1666 int is_in = ep->bEndpointAddress & USB_DIR_IN; 1667 int completed; 1668 u32 udccs, tmp; 1669 1670 do { 1671 completed = 0; 1672 if (likely (!list_empty(&ep->queue))) 1673 req = list_entry(ep->queue.next, 1674 struct pxa25x_request, queue); 1675 else 1676 req = NULL; 1677 1678 // TODO check FST handling 1679 1680 udccs = *ep->reg_udccs; 1681 if (unlikely(is_in)) { /* irq from TPC, SST, or (ISO) TUR */ 1682 tmp = UDCCS_BI_TUR; 1683 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) 1684 tmp |= UDCCS_BI_SST; 1685 tmp &= udccs; 1686 if (likely (tmp)) 1687 *ep->reg_udccs = tmp; 1688 if (req && likely ((udccs & UDCCS_BI_TFS) != 0)) 1689 completed = write_fifo(ep, req); 1690 1691 } else { /* irq from RPC (or for ISO, ROF) */ 1692 if (likely(ep->bmAttributes == USB_ENDPOINT_XFER_BULK)) 1693 tmp = UDCCS_BO_SST | UDCCS_BO_DME; 1694 else 1695 tmp = UDCCS_IO_ROF | UDCCS_IO_DME; 1696 tmp &= udccs; 1697 if (likely(tmp)) 1698 *ep->reg_udccs = tmp; 1699 1700 /* fifos can hold packets, ready for reading... */ 1701 if (likely(req)) { 1702 completed = read_fifo(ep, req); 1703 } else 1704 pio_irq_disable (ep->bEndpointAddress); 1705 } 1706 ep->pio_irqs++; 1707 } while (completed); 1708} 1709 1710/* 1711 * pxa25x_udc_irq - interrupt handler 1712 * 1713 * avoid delays in ep0 processing. the control handshaking isn't always 1714 * under software control (pxa250c0 and the pxa255 are better), and delays 1715 * could cause usb protocol errors. 1716 */ 1717static irqreturn_t 1718pxa25x_udc_irq(int irq, void *_dev) 1719{ 1720 struct pxa25x_udc *dev = _dev; 1721 int handled; 1722 1723 dev->stats.irqs++; 1724 do { 1725 u32 udccr = UDCCR; 1726 1727 handled = 0; 1728 1729 /* SUSpend Interrupt Request */ 1730 if (unlikely(udccr & UDCCR_SUSIR)) { 1731 udc_ack_int_UDCCR(UDCCR_SUSIR); 1732 handled = 1; 1733 DBG(DBG_VERBOSE, "USB suspend\n"); 1734 1735 if (dev->gadget.speed != USB_SPEED_UNKNOWN 1736 && dev->driver 1737 && dev->driver->suspend) 1738 dev->driver->suspend(&dev->gadget); 1739 ep0_idle (dev); 1740 } 1741 1742 /* RESume Interrupt Request */ 1743 if (unlikely(udccr & UDCCR_RESIR)) { 1744 udc_ack_int_UDCCR(UDCCR_RESIR); 1745 handled = 1; 1746 DBG(DBG_VERBOSE, "USB resume\n"); 1747 1748 if (dev->gadget.speed != USB_SPEED_UNKNOWN 1749 && dev->driver 1750 && dev->driver->resume) 1751 dev->driver->resume(&dev->gadget); 1752 } 1753 1754 /* ReSeT Interrupt Request - USB reset */ 1755 if (unlikely(udccr & UDCCR_RSTIR)) { 1756 udc_ack_int_UDCCR(UDCCR_RSTIR); 1757 handled = 1; 1758 1759 if ((UDCCR & UDCCR_UDA) == 0) { 1760 DBG(DBG_VERBOSE, "USB reset start\n"); 1761 1762 /* reset driver and endpoints, 1763 * in case that's not yet done 1764 */ 1765 stop_activity (dev, dev->driver); 1766 1767 } else { 1768 DBG(DBG_VERBOSE, "USB reset end\n"); 1769 dev->gadget.speed = USB_SPEED_FULL; 1770 memset(&dev->stats, 0, sizeof dev->stats); 1771 /* driver and endpoints are still reset */ 1772 } 1773 1774 } else { 1775 u32 usir0 = USIR0 & ~UICR0; 1776 u32 usir1 = USIR1 & ~UICR1; 1777 int i; 1778 1779 if (unlikely (!usir0 && !usir1)) 1780 continue; 1781 1782 DBG(DBG_VERY_NOISY, "irq %02x.%02x\n", usir1, usir0); 1783 1784 /* control traffic */ 1785 if (usir0 & USIR0_IR0) { 1786 dev->ep[0].pio_irqs++; 1787 handle_ep0(dev); 1788 handled = 1; 1789 } 1790 1791 /* endpoint data transfers */ 1792 for (i = 0; i < 8; i++) { 1793 u32 tmp = 1 << i; 1794 1795 if (i && (usir0 & tmp)) { 1796 handle_ep(&dev->ep[i]); 1797 USIR0 |= tmp; 1798 handled = 1; 1799 } 1800#ifndef CONFIG_USB_PXA25X_SMALL 1801 if (usir1 & tmp) { 1802 handle_ep(&dev->ep[i+8]); 1803 USIR1 |= tmp; 1804 handled = 1; 1805 } 1806#endif 1807 } 1808 } 1809 1810 /* we could also ask for 1 msec SOF (SIR) interrupts */ 1811 1812 } while (handled); 1813 return IRQ_HANDLED; 1814} 1815 1816/*-------------------------------------------------------------------------*/ 1817 1818static void nop_release (struct device *dev) 1819{ 1820 DMSG("%s %s\n", __func__, dev_name(dev)); 1821} 1822 1823/* this uses load-time allocation and initialization (instead of 1824 * doing it at run-time) to save code, eliminate fault paths, and 1825 * be more obviously correct. 1826 */ 1827static struct pxa25x_udc memory = { 1828 .gadget = { 1829 .ops = &pxa25x_udc_ops, 1830 .ep0 = &memory.ep[0].ep, 1831 .name = driver_name, 1832 .dev = { 1833 .init_name = "gadget", 1834 .release = nop_release, 1835 }, 1836 }, 1837 1838 /* control endpoint */ 1839 .ep[0] = { 1840 .ep = { 1841 .name = ep0name, 1842 .ops = &pxa25x_ep_ops, 1843 .maxpacket = EP0_FIFO_SIZE, 1844 }, 1845 .dev = &memory, 1846 .reg_udccs = &UDCCS0, 1847 .reg_uddr = &UDDR0, 1848 }, 1849 1850 /* first group of endpoints */ 1851 .ep[1] = { 1852 .ep = { 1853 .name = "ep1in-bulk", 1854 .ops = &pxa25x_ep_ops, 1855 .maxpacket = BULK_FIFO_SIZE, 1856 }, 1857 .dev = &memory, 1858 .fifo_size = BULK_FIFO_SIZE, 1859 .bEndpointAddress = USB_DIR_IN | 1, 1860 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1861 .reg_udccs = &UDCCS1, 1862 .reg_uddr = &UDDR1, 1863 }, 1864 .ep[2] = { 1865 .ep = { 1866 .name = "ep2out-bulk", 1867 .ops = &pxa25x_ep_ops, 1868 .maxpacket = BULK_FIFO_SIZE, 1869 }, 1870 .dev = &memory, 1871 .fifo_size = BULK_FIFO_SIZE, 1872 .bEndpointAddress = 2, 1873 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1874 .reg_udccs = &UDCCS2, 1875 .reg_ubcr = &UBCR2, 1876 .reg_uddr = &UDDR2, 1877 }, 1878#ifndef CONFIG_USB_PXA25X_SMALL 1879 .ep[3] = { 1880 .ep = { 1881 .name = "ep3in-iso", 1882 .ops = &pxa25x_ep_ops, 1883 .maxpacket = ISO_FIFO_SIZE, 1884 }, 1885 .dev = &memory, 1886 .fifo_size = ISO_FIFO_SIZE, 1887 .bEndpointAddress = USB_DIR_IN | 3, 1888 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1889 .reg_udccs = &UDCCS3, 1890 .reg_uddr = &UDDR3, 1891 }, 1892 .ep[4] = { 1893 .ep = { 1894 .name = "ep4out-iso", 1895 .ops = &pxa25x_ep_ops, 1896 .maxpacket = ISO_FIFO_SIZE, 1897 }, 1898 .dev = &memory, 1899 .fifo_size = ISO_FIFO_SIZE, 1900 .bEndpointAddress = 4, 1901 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1902 .reg_udccs = &UDCCS4, 1903 .reg_ubcr = &UBCR4, 1904 .reg_uddr = &UDDR4, 1905 }, 1906 .ep[5] = { 1907 .ep = { 1908 .name = "ep5in-int", 1909 .ops = &pxa25x_ep_ops, 1910 .maxpacket = INT_FIFO_SIZE, 1911 }, 1912 .dev = &memory, 1913 .fifo_size = INT_FIFO_SIZE, 1914 .bEndpointAddress = USB_DIR_IN | 5, 1915 .bmAttributes = USB_ENDPOINT_XFER_INT, 1916 .reg_udccs = &UDCCS5, 1917 .reg_uddr = &UDDR5, 1918 }, 1919 1920 /* second group of endpoints */ 1921 .ep[6] = { 1922 .ep = { 1923 .name = "ep6in-bulk", 1924 .ops = &pxa25x_ep_ops, 1925 .maxpacket = BULK_FIFO_SIZE, 1926 }, 1927 .dev = &memory, 1928 .fifo_size = BULK_FIFO_SIZE, 1929 .bEndpointAddress = USB_DIR_IN | 6, 1930 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1931 .reg_udccs = &UDCCS6, 1932 .reg_uddr = &UDDR6, 1933 }, 1934 .ep[7] = { 1935 .ep = { 1936 .name = "ep7out-bulk", 1937 .ops = &pxa25x_ep_ops, 1938 .maxpacket = BULK_FIFO_SIZE, 1939 }, 1940 .dev = &memory, 1941 .fifo_size = BULK_FIFO_SIZE, 1942 .bEndpointAddress = 7, 1943 .bmAttributes = USB_ENDPOINT_XFER_BULK, 1944 .reg_udccs = &UDCCS7, 1945 .reg_ubcr = &UBCR7, 1946 .reg_uddr = &UDDR7, 1947 }, 1948 .ep[8] = { 1949 .ep = { 1950 .name = "ep8in-iso", 1951 .ops = &pxa25x_ep_ops, 1952 .maxpacket = ISO_FIFO_SIZE, 1953 }, 1954 .dev = &memory, 1955 .fifo_size = ISO_FIFO_SIZE, 1956 .bEndpointAddress = USB_DIR_IN | 8, 1957 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1958 .reg_udccs = &UDCCS8, 1959 .reg_uddr = &UDDR8, 1960 }, 1961 .ep[9] = { 1962 .ep = { 1963 .name = "ep9out-iso", 1964 .ops = &pxa25x_ep_ops, 1965 .maxpacket = ISO_FIFO_SIZE, 1966 }, 1967 .dev = &memory, 1968 .fifo_size = ISO_FIFO_SIZE, 1969 .bEndpointAddress = 9, 1970 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 1971 .reg_udccs = &UDCCS9, 1972 .reg_ubcr = &UBCR9, 1973 .reg_uddr = &UDDR9, 1974 }, 1975 .ep[10] = { 1976 .ep = { 1977 .name = "ep10in-int", 1978 .ops = &pxa25x_ep_ops, 1979 .maxpacket = INT_FIFO_SIZE, 1980 }, 1981 .dev = &memory, 1982 .fifo_size = INT_FIFO_SIZE, 1983 .bEndpointAddress = USB_DIR_IN | 10, 1984 .bmAttributes = USB_ENDPOINT_XFER_INT, 1985 .reg_udccs = &UDCCS10, 1986 .reg_uddr = &UDDR10, 1987 }, 1988 1989 /* third group of endpoints */ 1990 .ep[11] = { 1991 .ep = { 1992 .name = "ep11in-bulk", 1993 .ops = &pxa25x_ep_ops, 1994 .maxpacket = BULK_FIFO_SIZE, 1995 }, 1996 .dev = &memory, 1997 .fifo_size = BULK_FIFO_SIZE, 1998 .bEndpointAddress = USB_DIR_IN | 11, 1999 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2000 .reg_udccs = &UDCCS11, 2001 .reg_uddr = &UDDR11, 2002 }, 2003 .ep[12] = { 2004 .ep = { 2005 .name = "ep12out-bulk", 2006 .ops = &pxa25x_ep_ops, 2007 .maxpacket = BULK_FIFO_SIZE, 2008 }, 2009 .dev = &memory, 2010 .fifo_size = BULK_FIFO_SIZE, 2011 .bEndpointAddress = 12, 2012 .bmAttributes = USB_ENDPOINT_XFER_BULK, 2013 .reg_udccs = &UDCCS12, 2014 .reg_ubcr = &UBCR12, 2015 .reg_uddr = &UDDR12, 2016 }, 2017 .ep[13] = { 2018 .ep = { 2019 .name = "ep13in-iso", 2020 .ops = &pxa25x_ep_ops, 2021 .maxpacket = ISO_FIFO_SIZE, 2022 }, 2023 .dev = &memory, 2024 .fifo_size = ISO_FIFO_SIZE, 2025 .bEndpointAddress = USB_DIR_IN | 13, 2026 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2027 .reg_udccs = &UDCCS13, 2028 .reg_uddr = &UDDR13, 2029 }, 2030 .ep[14] = { 2031 .ep = { 2032 .name = "ep14out-iso", 2033 .ops = &pxa25x_ep_ops, 2034 .maxpacket = ISO_FIFO_SIZE, 2035 }, 2036 .dev = &memory, 2037 .fifo_size = ISO_FIFO_SIZE, 2038 .bEndpointAddress = 14, 2039 .bmAttributes = USB_ENDPOINT_XFER_ISOC, 2040 .reg_udccs = &UDCCS14, 2041 .reg_ubcr = &UBCR14, 2042 .reg_uddr = &UDDR14, 2043 }, 2044 .ep[15] = { 2045 .ep = { 2046 .name = "ep15in-int", 2047 .ops = &pxa25x_ep_ops, 2048 .maxpacket = INT_FIFO_SIZE, 2049 }, 2050 .dev = &memory, 2051 .fifo_size = INT_FIFO_SIZE, 2052 .bEndpointAddress = USB_DIR_IN | 15, 2053 .bmAttributes = USB_ENDPOINT_XFER_INT, 2054 .reg_udccs = &UDCCS15, 2055 .reg_uddr = &UDDR15, 2056 }, 2057#endif /* !CONFIG_USB_PXA25X_SMALL */ 2058}; 2059 2060#define CP15R0_VENDOR_MASK 0xffffe000 2061 2062#if defined(CONFIG_ARCH_PXA) 2063#define CP15R0_XSCALE_VALUE 0x69052000 /* intel/arm/xscale */ 2064 2065#elif defined(CONFIG_ARCH_IXP4XX) 2066#define CP15R0_XSCALE_VALUE 0x69054000 /* intel/arm/ixp4xx */ 2067 2068#endif 2069 2070#define CP15R0_PROD_MASK 0x000003f0 2071#define PXA25x 0x00000100 /* and PXA26x */ 2072#define PXA210 0x00000120 2073 2074#define CP15R0_REV_MASK 0x0000000f 2075 2076#define CP15R0_PRODREV_MASK (CP15R0_PROD_MASK | CP15R0_REV_MASK) 2077 2078#define PXA255_A0 0x00000106 /* or PXA260_B1 */ 2079#define PXA250_C0 0x00000105 /* or PXA26x_B0 */ 2080#define PXA250_B2 0x00000104 2081#define PXA250_B1 0x00000103 /* or PXA260_A0 */ 2082#define PXA250_B0 0x00000102 2083#define PXA250_A1 0x00000101 2084#define PXA250_A0 0x00000100 2085 2086#define PXA210_C0 0x00000125 2087#define PXA210_B2 0x00000124 2088#define PXA210_B1 0x00000123 2089#define PXA210_B0 0x00000122 2090#define IXP425_A0 0x000001c1 2091#define IXP425_B0 0x000001f1 2092#define IXP465_AD 0x00000200 2093 2094/* 2095 * probe - binds to the platform device 2096 */ 2097static int __init pxa25x_udc_probe(struct platform_device *pdev) 2098{ 2099 struct pxa25x_udc *dev = &memory; 2100 int retval, irq; 2101 u32 chiprev; 2102 2103 /* insist on Intel/ARM/XScale */ 2104 asm("mrc%? p15, 0, %0, c0, c0" : "=r" (chiprev)); 2105 if ((chiprev & CP15R0_VENDOR_MASK) != CP15R0_XSCALE_VALUE) { 2106 pr_err("%s: not XScale!\n", driver_name); 2107 return -ENODEV; 2108 } 2109 2110 /* trigger chiprev-specific logic */ 2111 switch (chiprev & CP15R0_PRODREV_MASK) { 2112#if defined(CONFIG_ARCH_PXA) 2113 case PXA255_A0: 2114 dev->has_cfr = 1; 2115 break; 2116 case PXA250_A0: 2117 case PXA250_A1: 2118 /* A0/A1 "not released"; ep 13, 15 unusable */ 2119 /* fall through */ 2120 case PXA250_B2: case PXA210_B2: 2121 case PXA250_B1: case PXA210_B1: 2122 case PXA250_B0: case PXA210_B0: 2123 /* OUT-DMA is broken ... */ 2124 /* fall through */ 2125 case PXA250_C0: case PXA210_C0: 2126 break; 2127#elif defined(CONFIG_ARCH_IXP4XX) 2128 case IXP425_A0: 2129 case IXP425_B0: 2130 case IXP465_AD: 2131 dev->has_cfr = 1; 2132 break; 2133#endif 2134 default: 2135 pr_err("%s: unrecognized processor: %08x\n", 2136 driver_name, chiprev); 2137 /* iop3xx, ixp4xx, ... */ 2138 return -ENODEV; 2139 } 2140 2141 irq = platform_get_irq(pdev, 0); 2142 if (irq < 0) 2143 return -ENODEV; 2144 2145 dev->clk = clk_get(&pdev->dev, NULL); 2146 if (IS_ERR(dev->clk)) { 2147 retval = PTR_ERR(dev->clk); 2148 goto err_clk; 2149 } 2150 2151 pr_debug("%s: IRQ %d%s%s\n", driver_name, irq, 2152 dev->has_cfr ? "" : " (!cfr)", 2153 SIZE_STR "(pio)" 2154 ); 2155 2156 /* other non-static parts of init */ 2157 dev->dev = &pdev->dev; 2158 dev->mach = pdev->dev.platform_data; 2159 2160 dev->transceiver = usb_get_phy(USB_PHY_TYPE_USB2); 2161 2162 if (gpio_is_valid(dev->mach->gpio_pullup)) { 2163 if ((retval = gpio_request(dev->mach->gpio_pullup, 2164 "pca25x_udc GPIO PULLUP"))) { 2165 dev_dbg(&pdev->dev, 2166 "can't get pullup gpio %d, err: %d\n", 2167 dev->mach->gpio_pullup, retval); 2168 goto err_gpio_pullup; 2169 } 2170 gpio_direction_output(dev->mach->gpio_pullup, 0); 2171 } 2172 2173 init_timer(&dev->timer); 2174 dev->timer.function = udc_watchdog; 2175 dev->timer.data = (unsigned long) dev; 2176 2177 device_initialize(&dev->gadget.dev); 2178 dev->gadget.dev.parent = &pdev->dev; 2179 dev->gadget.dev.dma_mask = pdev->dev.dma_mask; 2180 2181 the_controller = dev; 2182 platform_set_drvdata(pdev, dev); 2183 2184 udc_disable(dev); 2185 udc_reinit(dev); 2186 2187 dev->vbus = 0; 2188 2189 /* irq setup after old hardware state is cleaned up */ 2190 retval = request_irq(irq, pxa25x_udc_irq, 2191 0, driver_name, dev); 2192 if (retval != 0) { 2193 pr_err("%s: can't get irq %d, err %d\n", 2194 driver_name, irq, retval); 2195 goto err_irq1; 2196 } 2197 dev->got_irq = 1; 2198 2199#ifdef CONFIG_ARCH_LUBBOCK 2200 if (machine_is_lubbock()) { 2201 retval = request_irq(LUBBOCK_USB_DISC_IRQ, lubbock_vbus_irq, 2202 0, driver_name, dev); 2203 if (retval != 0) { 2204 pr_err("%s: can't get irq %i, err %d\n", 2205 driver_name, LUBBOCK_USB_DISC_IRQ, retval); 2206 goto err_irq_lub; 2207 } 2208 retval = request_irq(LUBBOCK_USB_IRQ, lubbock_vbus_irq, 2209 0, driver_name, dev); 2210 if (retval != 0) { 2211 pr_err("%s: can't get irq %i, err %d\n", 2212 driver_name, LUBBOCK_USB_IRQ, retval); 2213 goto lubbock_fail0; 2214 } 2215 } else 2216#endif 2217 create_debug_files(dev); 2218 2219 retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget); 2220 if (!retval) 2221 return retval; 2222 2223 remove_debug_files(dev); 2224#ifdef CONFIG_ARCH_LUBBOCK 2225lubbock_fail0: 2226 free_irq(LUBBOCK_USB_DISC_IRQ, dev); 2227 err_irq_lub: 2228 free_irq(irq, dev); 2229#endif 2230 err_irq1: 2231 if (gpio_is_valid(dev->mach->gpio_pullup)) 2232 gpio_free(dev->mach->gpio_pullup); 2233 err_gpio_pullup: 2234 if (!IS_ERR_OR_NULL(dev->transceiver)) { 2235 usb_put_phy(dev->transceiver); 2236 dev->transceiver = NULL; 2237 } 2238 clk_put(dev->clk); 2239 err_clk: 2240 return retval; 2241} 2242 2243static void pxa25x_udc_shutdown(struct platform_device *_dev) 2244{ 2245 pullup_off(); 2246} 2247 2248static int __exit pxa25x_udc_remove(struct platform_device *pdev) 2249{ 2250 struct pxa25x_udc *dev = platform_get_drvdata(pdev); 2251 2252 usb_del_gadget_udc(&dev->gadget); 2253 if (dev->driver) 2254 return -EBUSY; 2255 2256 dev->pullup = 0; 2257 pullup(dev); 2258 2259 remove_debug_files(dev); 2260 2261 if (dev->got_irq) { 2262 free_irq(platform_get_irq(pdev, 0), dev); 2263 dev->got_irq = 0; 2264 } 2265#ifdef CONFIG_ARCH_LUBBOCK 2266 if (machine_is_lubbock()) { 2267 free_irq(LUBBOCK_USB_DISC_IRQ, dev); 2268 free_irq(LUBBOCK_USB_IRQ, dev); 2269 } 2270#endif 2271 if (gpio_is_valid(dev->mach->gpio_pullup)) 2272 gpio_free(dev->mach->gpio_pullup); 2273 2274 clk_put(dev->clk); 2275 2276 if (!IS_ERR_OR_NULL(dev->transceiver)) { 2277 usb_put_phy(dev->transceiver); 2278 dev->transceiver = NULL; 2279 } 2280 2281 platform_set_drvdata(pdev, NULL); 2282 the_controller = NULL; 2283 return 0; 2284} 2285 2286/*-------------------------------------------------------------------------*/ 2287 2288#ifdef CONFIG_PM 2289 2290/* USB suspend (controlled by the host) and system suspend (controlled 2291 * by the PXA) don't necessarily work well together. If USB is active, 2292 * the 48 MHz clock is required; so the system can't enter 33 MHz idle 2293 * mode, or any deeper PM saving state. 2294 * 2295 * For now, we punt and forcibly disconnect from the USB host when PXA 2296 * enters any suspend state. While we're disconnected, we always disable 2297 * the 48MHz USB clock ... allowing PXA sleep and/or 33 MHz idle states. 2298 * Boards without software pullup control shouldn't use those states. 2299 * VBUS IRQs should probably be ignored so that the PXA device just acts 2300 * "dead" to USB hosts until system resume. 2301 */ 2302static int pxa25x_udc_suspend(struct platform_device *dev, pm_message_t state) 2303{ 2304 struct pxa25x_udc *udc = platform_get_drvdata(dev); 2305 unsigned long flags; 2306 2307 if (!gpio_is_valid(udc->mach->gpio_pullup) && !udc->mach->udc_command) 2308 WARNING("USB host won't detect disconnect!\n"); 2309 udc->suspended = 1; 2310 2311 local_irq_save(flags); 2312 pullup(udc); 2313 local_irq_restore(flags); 2314 2315 return 0; 2316} 2317 2318static int pxa25x_udc_resume(struct platform_device *dev) 2319{ 2320 struct pxa25x_udc *udc = platform_get_drvdata(dev); 2321 unsigned long flags; 2322 2323 udc->suspended = 0; 2324 local_irq_save(flags); 2325 pullup(udc); 2326 local_irq_restore(flags); 2327 2328 return 0; 2329} 2330 2331#else 2332#define pxa25x_udc_suspend NULL 2333#define pxa25x_udc_resume NULL 2334#endif 2335 2336/*-------------------------------------------------------------------------*/ 2337 2338static struct platform_driver udc_driver = { 2339 .shutdown = pxa25x_udc_shutdown, 2340 .remove = __exit_p(pxa25x_udc_remove), 2341 .suspend = pxa25x_udc_suspend, 2342 .resume = pxa25x_udc_resume, 2343 .driver = { 2344 .owner = THIS_MODULE, 2345 .name = "pxa25x-udc", 2346 }, 2347}; 2348 2349static int __init udc_init(void) 2350{ 2351 pr_info("%s: version %s\n", driver_name, DRIVER_VERSION); 2352 return platform_driver_probe(&udc_driver, pxa25x_udc_probe); 2353} 2354module_init(udc_init); 2355 2356static void __exit udc_exit(void) 2357{ 2358 platform_driver_unregister(&udc_driver); 2359} 2360module_exit(udc_exit); 2361 2362MODULE_DESCRIPTION(DRIVER_DESC); 2363MODULE_AUTHOR("Frank Becker, Robert Schwebel, David Brownell"); 2364MODULE_LICENSE("GPL"); 2365MODULE_ALIAS("platform:pxa25x-udc");