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1/*
2 * TI DaVinci Audio Serial Port support
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __DAVINCI_ASP_H
17#define __DAVINCI_ASP_H
18
19struct snd_platform_data {
20 u32 tx_dma_offset;
21 u32 rx_dma_offset;
22 int asp_chan_q; /* event queue number for ASP channel */
23 int ram_chan_q; /* event queue number for RAM channel */
24 unsigned int codec_fmt;
25 /*
26 * Allowing this is more efficient and eliminates left and right swaps
27 * caused by underruns, but will swap the left and right channels
28 * when compared to previous behavior.
29 */
30 unsigned enable_channel_combine:1;
31 unsigned sram_size_playback;
32 unsigned sram_size_capture;
33
34 /*
35 * If McBSP peripheral gets the clock from an external pin,
36 * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR
37 * and MCBSP_CLKS.
38 * Depending on different hardware connections it is possible
39 * to use this setting to change the behaviour of McBSP
40 * driver.
41 */
42 int clk_input_pin;
43
44 /*
45 * This flag works when both clock and FS are outputs for the cpu
46 * and makes clock more accurate (FS is not symmetrical and the
47 * clock is very fast.
48 * The clock becoming faster is named
49 * i2s continuous serial clock (I2S_SCK) and it is an externally
50 * visible bit clock.
51 *
52 * first line : WordSelect
53 * second line : ContinuousSerialClock
54 * third line: SerialData
55 *
56 * SYMMETRICAL APPROACH:
57 * _______________________ LEFT
58 * _| RIGHT |______________________|
59 * _ _ _ _ _ _ _ _
60 * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_
61 * _ _ _ _ _ _ _ _
62 * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_
63 * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
64 *
65 * ACCURATE CLOCK APPROACH:
66 * ______________ LEFT
67 * _| RIGHT |_______________________________|
68 * _ _ _ _ _ _ _ _ _
69 * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| |
70 * _ _ _ _ dummy cycles
71 * _/ \_ ... _/ \_/ \_ ... _/ \__________________
72 * \_/ \_/ \_/ \_/
73 *
74 */
75 bool i2s_accurate_sck;
76
77 /* McASP specific fields */
78 int tdm_slots;
79 u8 op_mode;
80 u8 num_serializer;
81 u8 *serial_dir;
82 u8 version;
83 u8 txnumevt;
84 u8 rxnumevt;
85};
86
87enum {
88 MCASP_VERSION_1 = 0, /* DM646x */
89 MCASP_VERSION_2, /* DA8xx/OMAPL1x */
90 MCASP_VERSION_3, /* TI81xx/AM33xx */
91};
92
93enum mcbsp_clk_input_pin {
94 MCBSP_CLKR = 0, /* as in DM365 */
95 MCBSP_CLKS,
96};
97
98#define INACTIVE_MODE 0
99#define TX_MODE 1
100#define RX_MODE 2
101
102#define DAVINCI_MCASP_IIS_MODE 0
103#define DAVINCI_MCASP_DIT_MODE 1
104
105#endif