Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v3.7 2245 lines 60 kB view raw
1/* 2 * isp.c 3 * 4 * TI OMAP3 ISP - Core 5 * 6 * Copyright (C) 2006-2010 Nokia Corporation 7 * Copyright (C) 2007-2009 Texas Instruments, Inc. 8 * 9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com> 10 * Sakari Ailus <sakari.ailus@iki.fi> 11 * 12 * Contributors: 13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com> 14 * Sakari Ailus <sakari.ailus@iki.fi> 15 * David Cohen <dacohen@gmail.com> 16 * Stanimir Varbanov <svarbanov@mm-sol.com> 17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com> 18 * Tuukka Toivonen <tuukkat76@gmail.com> 19 * Sergio Aguirre <saaguirre@ti.com> 20 * Antti Koskipaa <akoskipa@gmail.com> 21 * Ivan T. Ivanov <iivanov@mm-sol.com> 22 * RaniSuneela <r-m@ti.com> 23 * Atanas Filipov <afilipov@mm-sol.com> 24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com> 25 * Hiroshi DOYU <hiroshi.doyu@nokia.com> 26 * Nayden Kanchev <nkanchev@mm-sol.com> 27 * Phil Carmody <ext-phil.2.carmody@nokia.com> 28 * Artem Bityutskiy <artem.bityutskiy@nokia.com> 29 * Dominic Curran <dcurran@ti.com> 30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi> 31 * Pallavi Kulkarni <p-kulkarni@ti.com> 32 * Vaibhav Hiremath <hvaibhav@ti.com> 33 * Mohit Jalori <mjalori@ti.com> 34 * Sameer Venkatraman <sameerv@ti.com> 35 * Senthilvadivu Guruswamy <svadivu@ti.com> 36 * Thara Gopinath <thara@ti.com> 37 * Toni Leinonen <toni.leinonen@nokia.com> 38 * Troy Laramy <t-laramy@ti.com> 39 * 40 * This program is free software; you can redistribute it and/or modify 41 * it under the terms of the GNU General Public License version 2 as 42 * published by the Free Software Foundation. 43 * 44 * This program is distributed in the hope that it will be useful, but 45 * WITHOUT ANY WARRANTY; without even the implied warranty of 46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 47 * General Public License for more details. 48 * 49 * You should have received a copy of the GNU General Public License 50 * along with this program; if not, write to the Free Software 51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 52 * 02110-1301 USA 53 */ 54 55#include <asm/cacheflush.h> 56 57#include <linux/clk.h> 58#include <linux/delay.h> 59#include <linux/device.h> 60#include <linux/dma-mapping.h> 61#include <linux/i2c.h> 62#include <linux/interrupt.h> 63#include <linux/module.h> 64#include <linux/platform_device.h> 65#include <linux/regulator/consumer.h> 66#include <linux/slab.h> 67#include <linux/sched.h> 68#include <linux/vmalloc.h> 69 70#include <media/v4l2-common.h> 71#include <media/v4l2-device.h> 72 73#include <plat/cpu.h> 74 75#include "isp.h" 76#include "ispreg.h" 77#include "ispccdc.h" 78#include "isppreview.h" 79#include "ispresizer.h" 80#include "ispcsi2.h" 81#include "ispccp2.h" 82#include "isph3a.h" 83#include "isphist.h" 84 85static unsigned int autoidle; 86module_param(autoidle, int, 0444); 87MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support"); 88 89static void isp_save_ctx(struct isp_device *isp); 90 91static void isp_restore_ctx(struct isp_device *isp); 92 93static const struct isp_res_mapping isp_res_maps[] = { 94 { 95 .isp_rev = ISP_REVISION_2_0, 96 .map = 1 << OMAP3_ISP_IOMEM_MAIN | 97 1 << OMAP3_ISP_IOMEM_CCP2 | 98 1 << OMAP3_ISP_IOMEM_CCDC | 99 1 << OMAP3_ISP_IOMEM_HIST | 100 1 << OMAP3_ISP_IOMEM_H3A | 101 1 << OMAP3_ISP_IOMEM_PREV | 102 1 << OMAP3_ISP_IOMEM_RESZ | 103 1 << OMAP3_ISP_IOMEM_SBL | 104 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 | 105 1 << OMAP3_ISP_IOMEM_CSIPHY2, 106 }, 107 { 108 .isp_rev = ISP_REVISION_15_0, 109 .map = 1 << OMAP3_ISP_IOMEM_MAIN | 110 1 << OMAP3_ISP_IOMEM_CCP2 | 111 1 << OMAP3_ISP_IOMEM_CCDC | 112 1 << OMAP3_ISP_IOMEM_HIST | 113 1 << OMAP3_ISP_IOMEM_H3A | 114 1 << OMAP3_ISP_IOMEM_PREV | 115 1 << OMAP3_ISP_IOMEM_RESZ | 116 1 << OMAP3_ISP_IOMEM_SBL | 117 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 | 118 1 << OMAP3_ISP_IOMEM_CSIPHY2 | 119 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 | 120 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 | 121 1 << OMAP3_ISP_IOMEM_CSIPHY1 | 122 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2, 123 }, 124}; 125 126/* Structure for saving/restoring ISP module registers */ 127static struct isp_reg isp_reg_list[] = { 128 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0}, 129 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0}, 130 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0}, 131 {0, ISP_TOK_TERM, 0} 132}; 133 134/* 135 * omap3isp_flush - Post pending L3 bus writes by doing a register readback 136 * @isp: OMAP3 ISP device 137 * 138 * In order to force posting of pending writes, we need to write and 139 * readback the same register, in this case the revision register. 140 * 141 * See this link for reference: 142 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html 143 */ 144void omap3isp_flush(struct isp_device *isp) 145{ 146 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION); 147 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION); 148} 149 150/* 151 * isp_enable_interrupts - Enable ISP interrupts. 152 * @isp: OMAP3 ISP device 153 */ 154static void isp_enable_interrupts(struct isp_device *isp) 155{ 156 static const u32 irq = IRQ0ENABLE_CSIA_IRQ 157 | IRQ0ENABLE_CSIB_IRQ 158 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ 159 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ 160 | IRQ0ENABLE_CCDC_VD0_IRQ 161 | IRQ0ENABLE_CCDC_VD1_IRQ 162 | IRQ0ENABLE_HS_VS_IRQ 163 | IRQ0ENABLE_HIST_DONE_IRQ 164 | IRQ0ENABLE_H3A_AWB_DONE_IRQ 165 | IRQ0ENABLE_H3A_AF_DONE_IRQ 166 | IRQ0ENABLE_PRV_DONE_IRQ 167 | IRQ0ENABLE_RSZ_DONE_IRQ; 168 169 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 170 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE); 171} 172 173/* 174 * isp_disable_interrupts - Disable ISP interrupts. 175 * @isp: OMAP3 ISP device 176 */ 177static void isp_disable_interrupts(struct isp_device *isp) 178{ 179 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE); 180} 181 182/** 183 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency. 184 * @isp: OMAP3 ISP device 185 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high 186 * @xclksel: XCLK to configure (0 = A, 1 = B). 187 * 188 * Configures the specified MCLK divisor in the ISP timing control register 189 * (TCTRL_CTRL) to generate the desired xclk clock value. 190 * 191 * Divisor = cam_mclk_hz / xclk 192 * 193 * Returns the final frequency that is actually being generated 194 **/ 195static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel) 196{ 197 u32 divisor; 198 u32 currentxclk; 199 unsigned long mclk_hz; 200 201 if (!omap3isp_get(isp)) 202 return 0; 203 204 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]); 205 206 if (xclk >= mclk_hz) { 207 divisor = ISPTCTRL_CTRL_DIV_BYPASS; 208 currentxclk = mclk_hz; 209 } else if (xclk >= 2) { 210 divisor = mclk_hz / xclk; 211 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS) 212 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1; 213 currentxclk = mclk_hz / divisor; 214 } else { 215 divisor = xclk; 216 currentxclk = 0; 217 } 218 219 switch (xclksel) { 220 case ISP_XCLK_A: 221 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 222 ISPTCTRL_CTRL_DIVA_MASK, 223 divisor << ISPTCTRL_CTRL_DIVA_SHIFT); 224 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n", 225 currentxclk); 226 break; 227 case ISP_XCLK_B: 228 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 229 ISPTCTRL_CTRL_DIVB_MASK, 230 divisor << ISPTCTRL_CTRL_DIVB_SHIFT); 231 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n", 232 currentxclk); 233 break; 234 case ISP_XCLK_NONE: 235 default: 236 omap3isp_put(isp); 237 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested " 238 "xclk. Must be 0 (A) or 1 (B).\n"); 239 return -EINVAL; 240 } 241 242 /* Do we go from stable whatever to clock? */ 243 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2) 244 omap3isp_get(isp); 245 /* Stopping the clock. */ 246 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2) 247 omap3isp_put(isp); 248 249 isp->xclk_divisor[xclksel - 1] = divisor; 250 251 omap3isp_put(isp); 252 253 return currentxclk; 254} 255 256/* 257 * isp_core_init - ISP core settings 258 * @isp: OMAP3 ISP device 259 * @idle: Consider idle state. 260 * 261 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS 262 * interrupt source. 263 * 264 * We need to configure the HS/VS interrupt source before interrupts get 265 * enabled, as the sensor might be free-running and the ISP default setting 266 * (HS edge) would put an unnecessary burden on the CPU. 267 */ 268static void isp_core_init(struct isp_device *isp, int idle) 269{ 270 isp_reg_writel(isp, 271 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY : 272 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) << 273 ISP_SYSCONFIG_MIDLEMODE_SHIFT) | 274 ((isp->revision == ISP_REVISION_15_0) ? 275 ISP_SYSCONFIG_AUTOIDLE : 0), 276 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG); 277 278 isp_reg_writel(isp, 279 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) | 280 ISPCTRL_SYNC_DETECT_VSRISE, 281 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL); 282} 283 284/* 285 * Configure the bridge and lane shifter. Valid inputs are 286 * 287 * CCDC_INPUT_PARALLEL: Parallel interface 288 * CCDC_INPUT_CSI2A: CSI2a receiver 289 * CCDC_INPUT_CCP2B: CCP2b receiver 290 * CCDC_INPUT_CSI2C: CSI2c receiver 291 * 292 * The bridge and lane shifter are configured according to the selected input 293 * and the ISP platform data. 294 */ 295void omap3isp_configure_bridge(struct isp_device *isp, 296 enum ccdc_input_entity input, 297 const struct isp_parallel_platform_data *pdata, 298 unsigned int shift, unsigned int bridge) 299{ 300 u32 ispctrl_val; 301 302 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL); 303 ispctrl_val &= ~ISPCTRL_SHIFT_MASK; 304 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV; 305 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK; 306 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK; 307 ispctrl_val |= bridge; 308 309 switch (input) { 310 case CCDC_INPUT_PARALLEL: 311 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL; 312 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT; 313 shift += pdata->data_lane_shift * 2; 314 break; 315 316 case CCDC_INPUT_CSI2A: 317 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA; 318 break; 319 320 case CCDC_INPUT_CCP2B: 321 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB; 322 break; 323 324 case CCDC_INPUT_CSI2C: 325 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC; 326 break; 327 328 default: 329 return; 330 } 331 332 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK; 333 334 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL); 335} 336 337void omap3isp_hist_dma_done(struct isp_device *isp) 338{ 339 if (omap3isp_ccdc_busy(&isp->isp_ccdc) || 340 omap3isp_stat_pcr_busy(&isp->isp_hist)) { 341 /* Histogram cannot be enabled in this frame anymore */ 342 atomic_set(&isp->isp_hist.buf_err, 1); 343 dev_dbg(isp->dev, "hist: Out of synchronization with " 344 "CCDC. Ignoring next buffer.\n"); 345 } 346} 347 348static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus) 349{ 350 static const char *name[] = { 351 "CSIA_IRQ", 352 "res1", 353 "res2", 354 "CSIB_LCM_IRQ", 355 "CSIB_IRQ", 356 "res5", 357 "res6", 358 "res7", 359 "CCDC_VD0_IRQ", 360 "CCDC_VD1_IRQ", 361 "CCDC_VD2_IRQ", 362 "CCDC_ERR_IRQ", 363 "H3A_AF_DONE_IRQ", 364 "H3A_AWB_DONE_IRQ", 365 "res14", 366 "res15", 367 "HIST_DONE_IRQ", 368 "CCDC_LSC_DONE", 369 "CCDC_LSC_PREFETCH_COMPLETED", 370 "CCDC_LSC_PREFETCH_ERROR", 371 "PRV_DONE_IRQ", 372 "CBUFF_IRQ", 373 "res22", 374 "res23", 375 "RSZ_DONE_IRQ", 376 "OVF_IRQ", 377 "res26", 378 "res27", 379 "MMU_ERR_IRQ", 380 "OCP_ERR_IRQ", 381 "SEC_ERR_IRQ", 382 "HS_VS_IRQ", 383 }; 384 int i; 385 386 dev_dbg(isp->dev, "ISP IRQ: "); 387 388 for (i = 0; i < ARRAY_SIZE(name); i++) { 389 if ((1 << i) & irqstatus) 390 printk(KERN_CONT "%s ", name[i]); 391 } 392 printk(KERN_CONT "\n"); 393} 394 395static void isp_isr_sbl(struct isp_device *isp) 396{ 397 struct device *dev = isp->dev; 398 struct isp_pipeline *pipe; 399 u32 sbl_pcr; 400 401 /* 402 * Handle shared buffer logic overflows for video buffers. 403 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored. 404 */ 405 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR); 406 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR); 407 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF; 408 409 if (sbl_pcr) 410 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr); 411 412 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) { 413 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity); 414 if (pipe != NULL) 415 pipe->error = true; 416 } 417 418 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) { 419 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity); 420 if (pipe != NULL) 421 pipe->error = true; 422 } 423 424 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) { 425 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity); 426 if (pipe != NULL) 427 pipe->error = true; 428 } 429 430 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) { 431 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity); 432 if (pipe != NULL) 433 pipe->error = true; 434 } 435 436 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF 437 | ISPSBL_PCR_RSZ2_WBL_OVF 438 | ISPSBL_PCR_RSZ3_WBL_OVF 439 | ISPSBL_PCR_RSZ4_WBL_OVF)) { 440 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity); 441 if (pipe != NULL) 442 pipe->error = true; 443 } 444 445 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF) 446 omap3isp_stat_sbl_overflow(&isp->isp_af); 447 448 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF) 449 omap3isp_stat_sbl_overflow(&isp->isp_aewb); 450} 451 452/* 453 * isp_isr - Interrupt Service Routine for Camera ISP module. 454 * @irq: Not used currently. 455 * @_isp: Pointer to the OMAP3 ISP device 456 * 457 * Handles the corresponding callback if plugged in. 458 * 459 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the 460 * IRQ wasn't handled. 461 */ 462static irqreturn_t isp_isr(int irq, void *_isp) 463{ 464 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ | 465 IRQ0STATUS_CCDC_LSC_DONE_IRQ | 466 IRQ0STATUS_CCDC_VD0_IRQ | 467 IRQ0STATUS_CCDC_VD1_IRQ | 468 IRQ0STATUS_HS_VS_IRQ; 469 struct isp_device *isp = _isp; 470 u32 irqstatus; 471 472 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 473 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS); 474 475 isp_isr_sbl(isp); 476 477 if (irqstatus & IRQ0STATUS_CSIA_IRQ) 478 omap3isp_csi2_isr(&isp->isp_csi2a); 479 480 if (irqstatus & IRQ0STATUS_CSIB_IRQ) 481 omap3isp_ccp2_isr(&isp->isp_ccp2); 482 483 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) { 484 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW) 485 omap3isp_preview_isr_frame_sync(&isp->isp_prev); 486 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER) 487 omap3isp_resizer_isr_frame_sync(&isp->isp_res); 488 omap3isp_stat_isr_frame_sync(&isp->isp_aewb); 489 omap3isp_stat_isr_frame_sync(&isp->isp_af); 490 omap3isp_stat_isr_frame_sync(&isp->isp_hist); 491 } 492 493 if (irqstatus & ccdc_events) 494 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events); 495 496 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) { 497 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER) 498 omap3isp_resizer_isr_frame_sync(&isp->isp_res); 499 omap3isp_preview_isr(&isp->isp_prev); 500 } 501 502 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ) 503 omap3isp_resizer_isr(&isp->isp_res); 504 505 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ) 506 omap3isp_stat_isr(&isp->isp_aewb); 507 508 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ) 509 omap3isp_stat_isr(&isp->isp_af); 510 511 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ) 512 omap3isp_stat_isr(&isp->isp_hist); 513 514 omap3isp_flush(isp); 515 516#if defined(DEBUG) && defined(ISP_ISR_DEBUG) 517 isp_isr_dbg(isp, irqstatus); 518#endif 519 520 return IRQ_HANDLED; 521} 522 523/* ----------------------------------------------------------------------------- 524 * Pipeline power management 525 * 526 * Entities must be powered up when part of a pipeline that contains at least 527 * one open video device node. 528 * 529 * To achieve this use the entity use_count field to track the number of users. 530 * For entities corresponding to video device nodes the use_count field stores 531 * the users count of the node. For entities corresponding to subdevs the 532 * use_count field stores the total number of users of all video device nodes 533 * in the pipeline. 534 * 535 * The omap3isp_pipeline_pm_use() function must be called in the open() and 536 * close() handlers of video device nodes. It increments or decrements the use 537 * count of all subdev entities in the pipeline. 538 * 539 * To react to link management on powered pipelines, the link setup notification 540 * callback updates the use count of all entities in the source and sink sides 541 * of the link. 542 */ 543 544/* 545 * isp_pipeline_pm_use_count - Count the number of users of a pipeline 546 * @entity: The entity 547 * 548 * Return the total number of users of all video device nodes in the pipeline. 549 */ 550static int isp_pipeline_pm_use_count(struct media_entity *entity) 551{ 552 struct media_entity_graph graph; 553 int use = 0; 554 555 media_entity_graph_walk_start(&graph, entity); 556 557 while ((entity = media_entity_graph_walk_next(&graph))) { 558 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE) 559 use += entity->use_count; 560 } 561 562 return use; 563} 564 565/* 566 * isp_pipeline_pm_power_one - Apply power change to an entity 567 * @entity: The entity 568 * @change: Use count change 569 * 570 * Change the entity use count by @change. If the entity is a subdev update its 571 * power state by calling the core::s_power operation when the use count goes 572 * from 0 to != 0 or from != 0 to 0. 573 * 574 * Return 0 on success or a negative error code on failure. 575 */ 576static int isp_pipeline_pm_power_one(struct media_entity *entity, int change) 577{ 578 struct v4l2_subdev *subdev; 579 int ret; 580 581 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV 582 ? media_entity_to_v4l2_subdev(entity) : NULL; 583 584 if (entity->use_count == 0 && change > 0 && subdev != NULL) { 585 ret = v4l2_subdev_call(subdev, core, s_power, 1); 586 if (ret < 0 && ret != -ENOIOCTLCMD) 587 return ret; 588 } 589 590 entity->use_count += change; 591 WARN_ON(entity->use_count < 0); 592 593 if (entity->use_count == 0 && change < 0 && subdev != NULL) 594 v4l2_subdev_call(subdev, core, s_power, 0); 595 596 return 0; 597} 598 599/* 600 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline 601 * @entity: The entity 602 * @change: Use count change 603 * 604 * Walk the pipeline to update the use count and the power state of all non-node 605 * entities. 606 * 607 * Return 0 on success or a negative error code on failure. 608 */ 609static int isp_pipeline_pm_power(struct media_entity *entity, int change) 610{ 611 struct media_entity_graph graph; 612 struct media_entity *first = entity; 613 int ret = 0; 614 615 if (!change) 616 return 0; 617 618 media_entity_graph_walk_start(&graph, entity); 619 620 while (!ret && (entity = media_entity_graph_walk_next(&graph))) 621 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE) 622 ret = isp_pipeline_pm_power_one(entity, change); 623 624 if (!ret) 625 return 0; 626 627 media_entity_graph_walk_start(&graph, first); 628 629 while ((first = media_entity_graph_walk_next(&graph)) 630 && first != entity) 631 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE) 632 isp_pipeline_pm_power_one(first, -change); 633 634 return ret; 635} 636 637/* 638 * omap3isp_pipeline_pm_use - Update the use count of an entity 639 * @entity: The entity 640 * @use: Use (1) or stop using (0) the entity 641 * 642 * Update the use count of all entities in the pipeline and power entities on or 643 * off accordingly. 644 * 645 * Return 0 on success or a negative error code on failure. Powering entities 646 * off is assumed to never fail. No failure can occur when the use parameter is 647 * set to 0. 648 */ 649int omap3isp_pipeline_pm_use(struct media_entity *entity, int use) 650{ 651 int change = use ? 1 : -1; 652 int ret; 653 654 mutex_lock(&entity->parent->graph_mutex); 655 656 /* Apply use count to node. */ 657 entity->use_count += change; 658 WARN_ON(entity->use_count < 0); 659 660 /* Apply power change to connected non-nodes. */ 661 ret = isp_pipeline_pm_power(entity, change); 662 if (ret < 0) 663 entity->use_count -= change; 664 665 mutex_unlock(&entity->parent->graph_mutex); 666 667 return ret; 668} 669 670/* 671 * isp_pipeline_link_notify - Link management notification callback 672 * @source: Pad at the start of the link 673 * @sink: Pad at the end of the link 674 * @flags: New link flags that will be applied 675 * 676 * React to link management on powered pipelines by updating the use count of 677 * all entities in the source and sink sides of the link. Entities are powered 678 * on or off accordingly. 679 * 680 * Return 0 on success or a negative error code on failure. Powering entities 681 * off is assumed to never fail. This function will not fail for disconnection 682 * events. 683 */ 684static int isp_pipeline_link_notify(struct media_pad *source, 685 struct media_pad *sink, u32 flags) 686{ 687 int source_use = isp_pipeline_pm_use_count(source->entity); 688 int sink_use = isp_pipeline_pm_use_count(sink->entity); 689 int ret; 690 691 if (!(flags & MEDIA_LNK_FL_ENABLED)) { 692 /* Powering off entities is assumed to never fail. */ 693 isp_pipeline_pm_power(source->entity, -sink_use); 694 isp_pipeline_pm_power(sink->entity, -source_use); 695 return 0; 696 } 697 698 ret = isp_pipeline_pm_power(source->entity, sink_use); 699 if (ret < 0) 700 return ret; 701 702 ret = isp_pipeline_pm_power(sink->entity, source_use); 703 if (ret < 0) 704 isp_pipeline_pm_power(source->entity, -sink_use); 705 706 return ret; 707} 708 709/* ----------------------------------------------------------------------------- 710 * Pipeline stream management 711 */ 712 713/* 714 * isp_pipeline_enable - Enable streaming on a pipeline 715 * @pipe: ISP pipeline 716 * @mode: Stream mode (single shot or continuous) 717 * 718 * Walk the entities chain starting at the pipeline output video node and start 719 * all modules in the chain in the given mode. 720 * 721 * Return 0 if successful, or the return value of the failed video::s_stream 722 * operation otherwise. 723 */ 724static int isp_pipeline_enable(struct isp_pipeline *pipe, 725 enum isp_pipeline_stream_state mode) 726{ 727 struct isp_device *isp = pipe->output->isp; 728 struct media_entity *entity; 729 struct media_pad *pad; 730 struct v4l2_subdev *subdev; 731 unsigned long flags; 732 int ret; 733 734 /* If the preview engine crashed it might not respond to read/write 735 * operations on the L4 bus. This would result in a bus fault and a 736 * kernel oops. Refuse to start streaming in that case. This check must 737 * be performed before the loop below to avoid starting entities if the 738 * pipeline won't start anyway (those entities would then likely fail to 739 * stop, making the problem worse). 740 */ 741 if ((pipe->entities & isp->crashed) & 742 (1U << isp->isp_prev.subdev.entity.id)) 743 return -EIO; 744 745 spin_lock_irqsave(&pipe->lock, flags); 746 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT); 747 spin_unlock_irqrestore(&pipe->lock, flags); 748 749 pipe->do_propagation = false; 750 751 entity = &pipe->output->video.entity; 752 while (1) { 753 pad = &entity->pads[0]; 754 if (!(pad->flags & MEDIA_PAD_FL_SINK)) 755 break; 756 757 pad = media_entity_remote_source(pad); 758 if (pad == NULL || 759 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) 760 break; 761 762 entity = pad->entity; 763 subdev = media_entity_to_v4l2_subdev(entity); 764 765 ret = v4l2_subdev_call(subdev, video, s_stream, mode); 766 if (ret < 0 && ret != -ENOIOCTLCMD) 767 return ret; 768 769 if (subdev == &isp->isp_ccdc.subdev) { 770 v4l2_subdev_call(&isp->isp_aewb.subdev, video, 771 s_stream, mode); 772 v4l2_subdev_call(&isp->isp_af.subdev, video, 773 s_stream, mode); 774 v4l2_subdev_call(&isp->isp_hist.subdev, video, 775 s_stream, mode); 776 pipe->do_propagation = true; 777 } 778 } 779 780 return 0; 781} 782 783static int isp_pipeline_wait_resizer(struct isp_device *isp) 784{ 785 return omap3isp_resizer_busy(&isp->isp_res); 786} 787 788static int isp_pipeline_wait_preview(struct isp_device *isp) 789{ 790 return omap3isp_preview_busy(&isp->isp_prev); 791} 792 793static int isp_pipeline_wait_ccdc(struct isp_device *isp) 794{ 795 return omap3isp_stat_busy(&isp->isp_af) 796 || omap3isp_stat_busy(&isp->isp_aewb) 797 || omap3isp_stat_busy(&isp->isp_hist) 798 || omap3isp_ccdc_busy(&isp->isp_ccdc); 799} 800 801#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000) 802 803static int isp_pipeline_wait(struct isp_device *isp, 804 int(*busy)(struct isp_device *isp)) 805{ 806 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT; 807 808 while (!time_after(jiffies, timeout)) { 809 if (!busy(isp)) 810 return 0; 811 } 812 813 return 1; 814} 815 816/* 817 * isp_pipeline_disable - Disable streaming on a pipeline 818 * @pipe: ISP pipeline 819 * 820 * Walk the entities chain starting at the pipeline output video node and stop 821 * all modules in the chain. Wait synchronously for the modules to be stopped if 822 * necessary. 823 * 824 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module 825 * can't be stopped (in which case a software reset of the ISP is probably 826 * necessary). 827 */ 828static int isp_pipeline_disable(struct isp_pipeline *pipe) 829{ 830 struct isp_device *isp = pipe->output->isp; 831 struct media_entity *entity; 832 struct media_pad *pad; 833 struct v4l2_subdev *subdev; 834 int failure = 0; 835 int ret; 836 837 /* 838 * We need to stop all the modules after CCDC first or they'll 839 * never stop since they may not get a full frame from CCDC. 840 */ 841 entity = &pipe->output->video.entity; 842 while (1) { 843 pad = &entity->pads[0]; 844 if (!(pad->flags & MEDIA_PAD_FL_SINK)) 845 break; 846 847 pad = media_entity_remote_source(pad); 848 if (pad == NULL || 849 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) 850 break; 851 852 entity = pad->entity; 853 subdev = media_entity_to_v4l2_subdev(entity); 854 855 if (subdev == &isp->isp_ccdc.subdev) { 856 v4l2_subdev_call(&isp->isp_aewb.subdev, 857 video, s_stream, 0); 858 v4l2_subdev_call(&isp->isp_af.subdev, 859 video, s_stream, 0); 860 v4l2_subdev_call(&isp->isp_hist.subdev, 861 video, s_stream, 0); 862 } 863 864 v4l2_subdev_call(subdev, video, s_stream, 0); 865 866 if (subdev == &isp->isp_res.subdev) 867 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer); 868 else if (subdev == &isp->isp_prev.subdev) 869 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview); 870 else if (subdev == &isp->isp_ccdc.subdev) 871 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc); 872 else 873 ret = 0; 874 875 if (ret) { 876 dev_info(isp->dev, "Unable to stop %s\n", subdev->name); 877 /* If the entity failed to stopped, assume it has 878 * crashed. Mark it as such, the ISP will be reset when 879 * applications will release it. 880 */ 881 isp->crashed |= 1U << subdev->entity.id; 882 failure = -ETIMEDOUT; 883 } 884 } 885 886 return failure; 887} 888 889/* 890 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline 891 * @pipe: ISP pipeline 892 * @state: Stream state (stopped, single shot or continuous) 893 * 894 * Set the pipeline to the given stream state. Pipelines can be started in 895 * single-shot or continuous mode. 896 * 897 * Return 0 if successful, or the return value of the failed video::s_stream 898 * operation otherwise. The pipeline state is not updated when the operation 899 * fails, except when stopping the pipeline. 900 */ 901int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe, 902 enum isp_pipeline_stream_state state) 903{ 904 int ret; 905 906 if (state == ISP_PIPELINE_STREAM_STOPPED) 907 ret = isp_pipeline_disable(pipe); 908 else 909 ret = isp_pipeline_enable(pipe, state); 910 911 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED) 912 pipe->stream_state = state; 913 914 return ret; 915} 916 917/* 918 * isp_pipeline_resume - Resume streaming on a pipeline 919 * @pipe: ISP pipeline 920 * 921 * Resume video output and input and re-enable pipeline. 922 */ 923static void isp_pipeline_resume(struct isp_pipeline *pipe) 924{ 925 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT; 926 927 omap3isp_video_resume(pipe->output, !singleshot); 928 if (singleshot) 929 omap3isp_video_resume(pipe->input, 0); 930 isp_pipeline_enable(pipe, pipe->stream_state); 931} 932 933/* 934 * isp_pipeline_suspend - Suspend streaming on a pipeline 935 * @pipe: ISP pipeline 936 * 937 * Suspend pipeline. 938 */ 939static void isp_pipeline_suspend(struct isp_pipeline *pipe) 940{ 941 isp_pipeline_disable(pipe); 942} 943 944/* 945 * isp_pipeline_is_last - Verify if entity has an enabled link to the output 946 * video node 947 * @me: ISP module's media entity 948 * 949 * Returns 1 if the entity has an enabled link to the output video node or 0 950 * otherwise. It's true only while pipeline can have no more than one output 951 * node. 952 */ 953static int isp_pipeline_is_last(struct media_entity *me) 954{ 955 struct isp_pipeline *pipe; 956 struct media_pad *pad; 957 958 if (!me->pipe) 959 return 0; 960 pipe = to_isp_pipeline(me); 961 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED) 962 return 0; 963 pad = media_entity_remote_source(&pipe->output->pad); 964 return pad->entity == me; 965} 966 967/* 968 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module 969 * @me: ISP module's media entity 970 * 971 * Suspend the whole pipeline if module's entity has an enabled link to the 972 * output video node. It works only while pipeline can have no more than one 973 * output node. 974 */ 975static void isp_suspend_module_pipeline(struct media_entity *me) 976{ 977 if (isp_pipeline_is_last(me)) 978 isp_pipeline_suspend(to_isp_pipeline(me)); 979} 980 981/* 982 * isp_resume_module_pipeline - Resume pipeline to which belongs the module 983 * @me: ISP module's media entity 984 * 985 * Resume the whole pipeline if module's entity has an enabled link to the 986 * output video node. It works only while pipeline can have no more than one 987 * output node. 988 */ 989static void isp_resume_module_pipeline(struct media_entity *me) 990{ 991 if (isp_pipeline_is_last(me)) 992 isp_pipeline_resume(to_isp_pipeline(me)); 993} 994 995/* 996 * isp_suspend_modules - Suspend ISP submodules. 997 * @isp: OMAP3 ISP device 998 * 999 * Returns 0 if suspend left in idle state all the submodules properly, 1000 * or returns 1 if a general Reset is required to suspend the submodules. 1001 */ 1002static int isp_suspend_modules(struct isp_device *isp) 1003{ 1004 unsigned long timeout; 1005 1006 omap3isp_stat_suspend(&isp->isp_aewb); 1007 omap3isp_stat_suspend(&isp->isp_af); 1008 omap3isp_stat_suspend(&isp->isp_hist); 1009 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity); 1010 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity); 1011 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity); 1012 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity); 1013 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity); 1014 1015 timeout = jiffies + ISP_STOP_TIMEOUT; 1016 while (omap3isp_stat_busy(&isp->isp_af) 1017 || omap3isp_stat_busy(&isp->isp_aewb) 1018 || omap3isp_stat_busy(&isp->isp_hist) 1019 || omap3isp_preview_busy(&isp->isp_prev) 1020 || omap3isp_resizer_busy(&isp->isp_res) 1021 || omap3isp_ccdc_busy(&isp->isp_ccdc)) { 1022 if (time_after(jiffies, timeout)) { 1023 dev_info(isp->dev, "can't stop modules.\n"); 1024 return 1; 1025 } 1026 msleep(1); 1027 } 1028 1029 return 0; 1030} 1031 1032/* 1033 * isp_resume_modules - Resume ISP submodules. 1034 * @isp: OMAP3 ISP device 1035 */ 1036static void isp_resume_modules(struct isp_device *isp) 1037{ 1038 omap3isp_stat_resume(&isp->isp_aewb); 1039 omap3isp_stat_resume(&isp->isp_af); 1040 omap3isp_stat_resume(&isp->isp_hist); 1041 isp_resume_module_pipeline(&isp->isp_res.subdev.entity); 1042 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity); 1043 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity); 1044 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity); 1045 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity); 1046} 1047 1048/* 1049 * isp_reset - Reset ISP with a timeout wait for idle. 1050 * @isp: OMAP3 ISP device 1051 */ 1052static int isp_reset(struct isp_device *isp) 1053{ 1054 unsigned long timeout = 0; 1055 1056 isp_reg_writel(isp, 1057 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG) 1058 | ISP_SYSCONFIG_SOFTRESET, 1059 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG); 1060 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, 1061 ISP_SYSSTATUS) & 0x1)) { 1062 if (timeout++ > 10000) { 1063 dev_alert(isp->dev, "cannot reset ISP\n"); 1064 return -ETIMEDOUT; 1065 } 1066 udelay(1); 1067 } 1068 1069 isp->crashed = 0; 1070 return 0; 1071} 1072 1073/* 1074 * isp_save_context - Saves the values of the ISP module registers. 1075 * @isp: OMAP3 ISP device 1076 * @reg_list: Structure containing pairs of register address and value to 1077 * modify on OMAP. 1078 */ 1079static void 1080isp_save_context(struct isp_device *isp, struct isp_reg *reg_list) 1081{ 1082 struct isp_reg *next = reg_list; 1083 1084 for (; next->reg != ISP_TOK_TERM; next++) 1085 next->val = isp_reg_readl(isp, next->mmio_range, next->reg); 1086} 1087 1088/* 1089 * isp_restore_context - Restores the values of the ISP module registers. 1090 * @isp: OMAP3 ISP device 1091 * @reg_list: Structure containing pairs of register address and value to 1092 * modify on OMAP. 1093 */ 1094static void 1095isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list) 1096{ 1097 struct isp_reg *next = reg_list; 1098 1099 for (; next->reg != ISP_TOK_TERM; next++) 1100 isp_reg_writel(isp, next->val, next->mmio_range, next->reg); 1101} 1102 1103/* 1104 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context. 1105 * @isp: OMAP3 ISP device 1106 * 1107 * Routine for saving the context of each module in the ISP. 1108 * CCDC, HIST, H3A, PREV, RESZ and MMU. 1109 */ 1110static void isp_save_ctx(struct isp_device *isp) 1111{ 1112 isp_save_context(isp, isp_reg_list); 1113 omap_iommu_save_ctx(isp->dev); 1114} 1115 1116/* 1117 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context. 1118 * @isp: OMAP3 ISP device 1119 * 1120 * Routine for restoring the context of each module in the ISP. 1121 * CCDC, HIST, H3A, PREV, RESZ and MMU. 1122 */ 1123static void isp_restore_ctx(struct isp_device *isp) 1124{ 1125 isp_restore_context(isp, isp_reg_list); 1126 omap_iommu_restore_ctx(isp->dev); 1127 omap3isp_ccdc_restore_context(isp); 1128 omap3isp_preview_restore_context(isp); 1129} 1130 1131/* ----------------------------------------------------------------------------- 1132 * SBL resources management 1133 */ 1134#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \ 1135 OMAP3_ISP_SBL_CCDC_LSC_READ | \ 1136 OMAP3_ISP_SBL_PREVIEW_READ | \ 1137 OMAP3_ISP_SBL_RESIZER_READ) 1138#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \ 1139 OMAP3_ISP_SBL_CSI2A_WRITE | \ 1140 OMAP3_ISP_SBL_CSI2C_WRITE | \ 1141 OMAP3_ISP_SBL_CCDC_WRITE | \ 1142 OMAP3_ISP_SBL_PREVIEW_WRITE) 1143 1144void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res) 1145{ 1146 u32 sbl = 0; 1147 1148 isp->sbl_resources |= res; 1149 1150 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ) 1151 sbl |= ISPCTRL_SBL_SHARED_RPORTA; 1152 1153 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ) 1154 sbl |= ISPCTRL_SBL_SHARED_RPORTB; 1155 1156 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE) 1157 sbl |= ISPCTRL_SBL_SHARED_WPORTC; 1158 1159 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE) 1160 sbl |= ISPCTRL_SBL_WR0_RAM_EN; 1161 1162 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE) 1163 sbl |= ISPCTRL_SBL_WR1_RAM_EN; 1164 1165 if (isp->sbl_resources & OMAP3_ISP_SBL_READ) 1166 sbl |= ISPCTRL_SBL_RD_RAM_EN; 1167 1168 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl); 1169} 1170 1171void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res) 1172{ 1173 u32 sbl = 0; 1174 1175 isp->sbl_resources &= ~res; 1176 1177 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)) 1178 sbl |= ISPCTRL_SBL_SHARED_RPORTA; 1179 1180 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)) 1181 sbl |= ISPCTRL_SBL_SHARED_RPORTB; 1182 1183 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)) 1184 sbl |= ISPCTRL_SBL_SHARED_WPORTC; 1185 1186 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)) 1187 sbl |= ISPCTRL_SBL_WR0_RAM_EN; 1188 1189 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE)) 1190 sbl |= ISPCTRL_SBL_WR1_RAM_EN; 1191 1192 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ)) 1193 sbl |= ISPCTRL_SBL_RD_RAM_EN; 1194 1195 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl); 1196} 1197 1198/* 1199 * isp_module_sync_idle - Helper to sync module with its idle state 1200 * @me: ISP submodule's media entity 1201 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization 1202 * @stopping: flag which tells module wants to stop 1203 * 1204 * This function checks if ISP submodule needs to wait for next interrupt. If 1205 * yes, makes the caller to sleep while waiting for such event. 1206 */ 1207int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait, 1208 atomic_t *stopping) 1209{ 1210 struct isp_pipeline *pipe = to_isp_pipeline(me); 1211 1212 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED || 1213 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT && 1214 !isp_pipeline_ready(pipe))) 1215 return 0; 1216 1217 /* 1218 * atomic_set() doesn't include memory barrier on ARM platform for SMP 1219 * scenario. We'll call it here to avoid race conditions. 1220 */ 1221 atomic_set(stopping, 1); 1222 smp_mb(); 1223 1224 /* 1225 * If module is the last one, it's writing to memory. In this case, 1226 * it's necessary to check if the module is already paused due to 1227 * DMA queue underrun or if it has to wait for next interrupt to be 1228 * idle. 1229 * If it isn't the last one, the function won't sleep but *stopping 1230 * will still be set to warn next submodule caller's interrupt the 1231 * module wants to be idle. 1232 */ 1233 if (isp_pipeline_is_last(me)) { 1234 struct isp_video *video = pipe->output; 1235 unsigned long flags; 1236 spin_lock_irqsave(&video->queue->irqlock, flags); 1237 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) { 1238 spin_unlock_irqrestore(&video->queue->irqlock, flags); 1239 atomic_set(stopping, 0); 1240 smp_mb(); 1241 return 0; 1242 } 1243 spin_unlock_irqrestore(&video->queue->irqlock, flags); 1244 if (!wait_event_timeout(*wait, !atomic_read(stopping), 1245 msecs_to_jiffies(1000))) { 1246 atomic_set(stopping, 0); 1247 smp_mb(); 1248 return -ETIMEDOUT; 1249 } 1250 } 1251 1252 return 0; 1253} 1254 1255/* 1256 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping 1257 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization 1258 * @stopping: flag which tells module wants to stop 1259 * 1260 * This function checks if ISP submodule was stopping. In case of yes, it 1261 * notices the caller by setting stopping to 0 and waking up the wait queue. 1262 * Returns 1 if it was stopping or 0 otherwise. 1263 */ 1264int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait, 1265 atomic_t *stopping) 1266{ 1267 if (atomic_cmpxchg(stopping, 1, 0)) { 1268 wake_up(wait); 1269 return 1; 1270 } 1271 1272 return 0; 1273} 1274 1275/* -------------------------------------------------------------------------- 1276 * Clock management 1277 */ 1278 1279#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \ 1280 ISPCTRL_HIST_CLK_EN | \ 1281 ISPCTRL_RSZ_CLK_EN | \ 1282 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \ 1283 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN)) 1284 1285static void __isp_subclk_update(struct isp_device *isp) 1286{ 1287 u32 clk = 0; 1288 1289 /* AEWB and AF share the same clock. */ 1290 if (isp->subclk_resources & 1291 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF)) 1292 clk |= ISPCTRL_H3A_CLK_EN; 1293 1294 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST) 1295 clk |= ISPCTRL_HIST_CLK_EN; 1296 1297 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER) 1298 clk |= ISPCTRL_RSZ_CLK_EN; 1299 1300 /* NOTE: For CCDC & Preview submodules, we need to affect internal 1301 * RAM as well. 1302 */ 1303 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC) 1304 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN; 1305 1306 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW) 1307 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN; 1308 1309 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 1310 ISPCTRL_CLKS_MASK, clk); 1311} 1312 1313void omap3isp_subclk_enable(struct isp_device *isp, 1314 enum isp_subclk_resource res) 1315{ 1316 isp->subclk_resources |= res; 1317 1318 __isp_subclk_update(isp); 1319} 1320 1321void omap3isp_subclk_disable(struct isp_device *isp, 1322 enum isp_subclk_resource res) 1323{ 1324 isp->subclk_resources &= ~res; 1325 1326 __isp_subclk_update(isp); 1327} 1328 1329/* 1330 * isp_enable_clocks - Enable ISP clocks 1331 * @isp: OMAP3 ISP device 1332 * 1333 * Return 0 if successful, or clk_enable return value if any of tthem fails. 1334 */ 1335static int isp_enable_clocks(struct isp_device *isp) 1336{ 1337 int r; 1338 unsigned long rate; 1339 int divisor; 1340 1341 /* 1342 * cam_mclk clock chain: 1343 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk 1344 * 1345 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are 1346 * set to the same value. Hence the rate set for dpll4_m5 1347 * has to be twice of what is set on OMAP3430 to get 1348 * the required value for cam_mclk 1349 */ 1350 if (cpu_is_omap3630()) 1351 divisor = 1; 1352 else 1353 divisor = 2; 1354 1355 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]); 1356 if (r) { 1357 dev_err(isp->dev, "clk_enable cam_ick failed\n"); 1358 goto out_clk_enable_ick; 1359 } 1360 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK], 1361 CM_CAM_MCLK_HZ/divisor); 1362 if (r) { 1363 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n"); 1364 goto out_clk_enable_mclk; 1365 } 1366 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]); 1367 if (r) { 1368 dev_err(isp->dev, "clk_enable cam_mclk failed\n"); 1369 goto out_clk_enable_mclk; 1370 } 1371 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]); 1372 if (rate != CM_CAM_MCLK_HZ) 1373 dev_warn(isp->dev, "unexpected cam_mclk rate:\n" 1374 " expected : %d\n" 1375 " actual : %ld\n", CM_CAM_MCLK_HZ, rate); 1376 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]); 1377 if (r) { 1378 dev_err(isp->dev, "clk_enable csi2_fck failed\n"); 1379 goto out_clk_enable_csi2_fclk; 1380 } 1381 return 0; 1382 1383out_clk_enable_csi2_fclk: 1384 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]); 1385out_clk_enable_mclk: 1386 clk_disable(isp->clock[ISP_CLK_CAM_ICK]); 1387out_clk_enable_ick: 1388 return r; 1389} 1390 1391/* 1392 * isp_disable_clocks - Disable ISP clocks 1393 * @isp: OMAP3 ISP device 1394 */ 1395static void isp_disable_clocks(struct isp_device *isp) 1396{ 1397 clk_disable(isp->clock[ISP_CLK_CAM_ICK]); 1398 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]); 1399 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]); 1400} 1401 1402static const char *isp_clocks[] = { 1403 "cam_ick", 1404 "cam_mclk", 1405 "dpll4_m5_ck", 1406 "csi2_96m_fck", 1407 "l3_ick", 1408}; 1409 1410static void isp_put_clocks(struct isp_device *isp) 1411{ 1412 unsigned int i; 1413 1414 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) { 1415 if (isp->clock[i]) { 1416 clk_put(isp->clock[i]); 1417 isp->clock[i] = NULL; 1418 } 1419 } 1420} 1421 1422static int isp_get_clocks(struct isp_device *isp) 1423{ 1424 struct clk *clk; 1425 unsigned int i; 1426 1427 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) { 1428 clk = clk_get(isp->dev, isp_clocks[i]); 1429 if (IS_ERR(clk)) { 1430 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]); 1431 isp_put_clocks(isp); 1432 return PTR_ERR(clk); 1433 } 1434 1435 isp->clock[i] = clk; 1436 } 1437 1438 return 0; 1439} 1440 1441/* 1442 * omap3isp_get - Acquire the ISP resource. 1443 * 1444 * Initializes the clocks for the first acquire. 1445 * 1446 * Increment the reference count on the ISP. If the first reference is taken, 1447 * enable clocks and power-up all submodules. 1448 * 1449 * Return a pointer to the ISP device structure, or NULL if an error occurred. 1450 */ 1451static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq) 1452{ 1453 struct isp_device *__isp = isp; 1454 1455 if (isp == NULL) 1456 return NULL; 1457 1458 mutex_lock(&isp->isp_mutex); 1459 if (isp->ref_count > 0) 1460 goto out; 1461 1462 if (isp_enable_clocks(isp) < 0) { 1463 __isp = NULL; 1464 goto out; 1465 } 1466 1467 /* We don't want to restore context before saving it! */ 1468 if (isp->has_context) 1469 isp_restore_ctx(isp); 1470 1471 if (irq) 1472 isp_enable_interrupts(isp); 1473 1474out: 1475 if (__isp != NULL) 1476 isp->ref_count++; 1477 mutex_unlock(&isp->isp_mutex); 1478 1479 return __isp; 1480} 1481 1482struct isp_device *omap3isp_get(struct isp_device *isp) 1483{ 1484 return __omap3isp_get(isp, true); 1485} 1486 1487/* 1488 * omap3isp_put - Release the ISP 1489 * 1490 * Decrement the reference count on the ISP. If the last reference is released, 1491 * power-down all submodules, disable clocks and free temporary buffers. 1492 */ 1493void omap3isp_put(struct isp_device *isp) 1494{ 1495 if (isp == NULL) 1496 return; 1497 1498 mutex_lock(&isp->isp_mutex); 1499 BUG_ON(isp->ref_count == 0); 1500 if (--isp->ref_count == 0) { 1501 isp_disable_interrupts(isp); 1502 if (isp->domain) { 1503 isp_save_ctx(isp); 1504 isp->has_context = 1; 1505 } 1506 /* Reset the ISP if an entity has failed to stop. This is the 1507 * only way to recover from such conditions. 1508 */ 1509 if (isp->crashed) 1510 isp_reset(isp); 1511 isp_disable_clocks(isp); 1512 } 1513 mutex_unlock(&isp->isp_mutex); 1514} 1515 1516/* -------------------------------------------------------------------------- 1517 * Platform device driver 1518 */ 1519 1520/* 1521 * omap3isp_print_status - Prints the values of the ISP Control Module registers 1522 * @isp: OMAP3 ISP device 1523 */ 1524#define ISP_PRINT_REGISTER(isp, name)\ 1525 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \ 1526 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name)) 1527#define SBL_PRINT_REGISTER(isp, name)\ 1528 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \ 1529 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name)) 1530 1531void omap3isp_print_status(struct isp_device *isp) 1532{ 1533 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n"); 1534 1535 ISP_PRINT_REGISTER(isp, SYSCONFIG); 1536 ISP_PRINT_REGISTER(isp, SYSSTATUS); 1537 ISP_PRINT_REGISTER(isp, IRQ0ENABLE); 1538 ISP_PRINT_REGISTER(isp, IRQ0STATUS); 1539 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH); 1540 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY); 1541 ISP_PRINT_REGISTER(isp, CTRL); 1542 ISP_PRINT_REGISTER(isp, TCTRL_CTRL); 1543 ISP_PRINT_REGISTER(isp, TCTRL_FRAME); 1544 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY); 1545 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY); 1546 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY); 1547 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH); 1548 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH); 1549 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH); 1550 1551 SBL_PRINT_REGISTER(isp, PCR); 1552 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP); 1553 1554 dev_dbg(isp->dev, "--------------------------------------------\n"); 1555} 1556 1557#ifdef CONFIG_PM 1558 1559/* 1560 * Power management support. 1561 * 1562 * As the ISP can't properly handle an input video stream interruption on a non 1563 * frame boundary, the ISP pipelines need to be stopped before sensors get 1564 * suspended. However, as suspending the sensors can require a running clock, 1565 * which can be provided by the ISP, the ISP can't be completely suspended 1566 * before the sensor. 1567 * 1568 * To solve this problem power management support is split into prepare/complete 1569 * and suspend/resume operations. The pipelines are stopped in prepare() and the 1570 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in 1571 * resume(), and the the pipelines are restarted in complete(). 1572 * 1573 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly 1574 * yet. 1575 */ 1576static int isp_pm_prepare(struct device *dev) 1577{ 1578 struct isp_device *isp = dev_get_drvdata(dev); 1579 int reset; 1580 1581 WARN_ON(mutex_is_locked(&isp->isp_mutex)); 1582 1583 if (isp->ref_count == 0) 1584 return 0; 1585 1586 reset = isp_suspend_modules(isp); 1587 isp_disable_interrupts(isp); 1588 isp_save_ctx(isp); 1589 if (reset) 1590 isp_reset(isp); 1591 1592 return 0; 1593} 1594 1595static int isp_pm_suspend(struct device *dev) 1596{ 1597 struct isp_device *isp = dev_get_drvdata(dev); 1598 1599 WARN_ON(mutex_is_locked(&isp->isp_mutex)); 1600 1601 if (isp->ref_count) 1602 isp_disable_clocks(isp); 1603 1604 return 0; 1605} 1606 1607static int isp_pm_resume(struct device *dev) 1608{ 1609 struct isp_device *isp = dev_get_drvdata(dev); 1610 1611 if (isp->ref_count == 0) 1612 return 0; 1613 1614 return isp_enable_clocks(isp); 1615} 1616 1617static void isp_pm_complete(struct device *dev) 1618{ 1619 struct isp_device *isp = dev_get_drvdata(dev); 1620 1621 if (isp->ref_count == 0) 1622 return; 1623 1624 isp_restore_ctx(isp); 1625 isp_enable_interrupts(isp); 1626 isp_resume_modules(isp); 1627} 1628 1629#else 1630 1631#define isp_pm_prepare NULL 1632#define isp_pm_suspend NULL 1633#define isp_pm_resume NULL 1634#define isp_pm_complete NULL 1635 1636#endif /* CONFIG_PM */ 1637 1638static void isp_unregister_entities(struct isp_device *isp) 1639{ 1640 omap3isp_csi2_unregister_entities(&isp->isp_csi2a); 1641 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2); 1642 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc); 1643 omap3isp_preview_unregister_entities(&isp->isp_prev); 1644 omap3isp_resizer_unregister_entities(&isp->isp_res); 1645 omap3isp_stat_unregister_entities(&isp->isp_aewb); 1646 omap3isp_stat_unregister_entities(&isp->isp_af); 1647 omap3isp_stat_unregister_entities(&isp->isp_hist); 1648 1649 v4l2_device_unregister(&isp->v4l2_dev); 1650 media_device_unregister(&isp->media_dev); 1651} 1652 1653/* 1654 * isp_register_subdev_group - Register a group of subdevices 1655 * @isp: OMAP3 ISP device 1656 * @board_info: I2C subdevs board information array 1657 * 1658 * Register all I2C subdevices in the board_info array. The array must be 1659 * terminated by a NULL entry, and the first entry must be the sensor. 1660 * 1661 * Return a pointer to the sensor media entity if it has been successfully 1662 * registered, or NULL otherwise. 1663 */ 1664static struct v4l2_subdev * 1665isp_register_subdev_group(struct isp_device *isp, 1666 struct isp_subdev_i2c_board_info *board_info) 1667{ 1668 struct v4l2_subdev *sensor = NULL; 1669 unsigned int first; 1670 1671 if (board_info->board_info == NULL) 1672 return NULL; 1673 1674 for (first = 1; board_info->board_info; ++board_info, first = 0) { 1675 struct v4l2_subdev *subdev; 1676 struct i2c_adapter *adapter; 1677 1678 adapter = i2c_get_adapter(board_info->i2c_adapter_id); 1679 if (adapter == NULL) { 1680 printk(KERN_ERR "%s: Unable to get I2C adapter %d for " 1681 "device %s\n", __func__, 1682 board_info->i2c_adapter_id, 1683 board_info->board_info->type); 1684 continue; 1685 } 1686 1687 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter, 1688 board_info->board_info, NULL); 1689 if (subdev == NULL) { 1690 printk(KERN_ERR "%s: Unable to register subdev %s\n", 1691 __func__, board_info->board_info->type); 1692 continue; 1693 } 1694 1695 if (first) 1696 sensor = subdev; 1697 } 1698 1699 return sensor; 1700} 1701 1702static int isp_register_entities(struct isp_device *isp) 1703{ 1704 struct isp_platform_data *pdata = isp->pdata; 1705 struct isp_v4l2_subdevs_group *subdevs; 1706 int ret; 1707 1708 isp->media_dev.dev = isp->dev; 1709 strlcpy(isp->media_dev.model, "TI OMAP3 ISP", 1710 sizeof(isp->media_dev.model)); 1711 isp->media_dev.hw_revision = isp->revision; 1712 isp->media_dev.link_notify = isp_pipeline_link_notify; 1713 ret = media_device_register(&isp->media_dev); 1714 if (ret < 0) { 1715 printk(KERN_ERR "%s: Media device registration failed (%d)\n", 1716 __func__, ret); 1717 return ret; 1718 } 1719 1720 isp->v4l2_dev.mdev = &isp->media_dev; 1721 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev); 1722 if (ret < 0) { 1723 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n", 1724 __func__, ret); 1725 goto done; 1726 } 1727 1728 /* Register internal entities */ 1729 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev); 1730 if (ret < 0) 1731 goto done; 1732 1733 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev); 1734 if (ret < 0) 1735 goto done; 1736 1737 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev); 1738 if (ret < 0) 1739 goto done; 1740 1741 ret = omap3isp_preview_register_entities(&isp->isp_prev, 1742 &isp->v4l2_dev); 1743 if (ret < 0) 1744 goto done; 1745 1746 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev); 1747 if (ret < 0) 1748 goto done; 1749 1750 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev); 1751 if (ret < 0) 1752 goto done; 1753 1754 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev); 1755 if (ret < 0) 1756 goto done; 1757 1758 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev); 1759 if (ret < 0) 1760 goto done; 1761 1762 /* Register external entities */ 1763 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) { 1764 struct v4l2_subdev *sensor; 1765 struct media_entity *input; 1766 unsigned int flags; 1767 unsigned int pad; 1768 1769 sensor = isp_register_subdev_group(isp, subdevs->subdevs); 1770 if (sensor == NULL) 1771 continue; 1772 1773 sensor->host_priv = subdevs; 1774 1775 /* Connect the sensor to the correct interface module. Parallel 1776 * sensors are connected directly to the CCDC, while serial 1777 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver 1778 * through CSIPHY1 or CSIPHY2. 1779 */ 1780 switch (subdevs->interface) { 1781 case ISP_INTERFACE_PARALLEL: 1782 input = &isp->isp_ccdc.subdev.entity; 1783 pad = CCDC_PAD_SINK; 1784 flags = 0; 1785 break; 1786 1787 case ISP_INTERFACE_CSI2A_PHY2: 1788 input = &isp->isp_csi2a.subdev.entity; 1789 pad = CSI2_PAD_SINK; 1790 flags = MEDIA_LNK_FL_IMMUTABLE 1791 | MEDIA_LNK_FL_ENABLED; 1792 break; 1793 1794 case ISP_INTERFACE_CCP2B_PHY1: 1795 case ISP_INTERFACE_CCP2B_PHY2: 1796 input = &isp->isp_ccp2.subdev.entity; 1797 pad = CCP2_PAD_SINK; 1798 flags = 0; 1799 break; 1800 1801 case ISP_INTERFACE_CSI2C_PHY1: 1802 input = &isp->isp_csi2c.subdev.entity; 1803 pad = CSI2_PAD_SINK; 1804 flags = MEDIA_LNK_FL_IMMUTABLE 1805 | MEDIA_LNK_FL_ENABLED; 1806 break; 1807 1808 default: 1809 printk(KERN_ERR "%s: invalid interface type %u\n", 1810 __func__, subdevs->interface); 1811 ret = -EINVAL; 1812 goto done; 1813 } 1814 1815 ret = media_entity_create_link(&sensor->entity, 0, input, pad, 1816 flags); 1817 if (ret < 0) 1818 goto done; 1819 } 1820 1821 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev); 1822 1823done: 1824 if (ret < 0) 1825 isp_unregister_entities(isp); 1826 1827 return ret; 1828} 1829 1830static void isp_cleanup_modules(struct isp_device *isp) 1831{ 1832 omap3isp_h3a_aewb_cleanup(isp); 1833 omap3isp_h3a_af_cleanup(isp); 1834 omap3isp_hist_cleanup(isp); 1835 omap3isp_resizer_cleanup(isp); 1836 omap3isp_preview_cleanup(isp); 1837 omap3isp_ccdc_cleanup(isp); 1838 omap3isp_ccp2_cleanup(isp); 1839 omap3isp_csi2_cleanup(isp); 1840} 1841 1842static int isp_initialize_modules(struct isp_device *isp) 1843{ 1844 int ret; 1845 1846 ret = omap3isp_csiphy_init(isp); 1847 if (ret < 0) { 1848 dev_err(isp->dev, "CSI PHY initialization failed\n"); 1849 goto error_csiphy; 1850 } 1851 1852 ret = omap3isp_csi2_init(isp); 1853 if (ret < 0) { 1854 dev_err(isp->dev, "CSI2 initialization failed\n"); 1855 goto error_csi2; 1856 } 1857 1858 ret = omap3isp_ccp2_init(isp); 1859 if (ret < 0) { 1860 dev_err(isp->dev, "CCP2 initialization failed\n"); 1861 goto error_ccp2; 1862 } 1863 1864 ret = omap3isp_ccdc_init(isp); 1865 if (ret < 0) { 1866 dev_err(isp->dev, "CCDC initialization failed\n"); 1867 goto error_ccdc; 1868 } 1869 1870 ret = omap3isp_preview_init(isp); 1871 if (ret < 0) { 1872 dev_err(isp->dev, "Preview initialization failed\n"); 1873 goto error_preview; 1874 } 1875 1876 ret = omap3isp_resizer_init(isp); 1877 if (ret < 0) { 1878 dev_err(isp->dev, "Resizer initialization failed\n"); 1879 goto error_resizer; 1880 } 1881 1882 ret = omap3isp_hist_init(isp); 1883 if (ret < 0) { 1884 dev_err(isp->dev, "Histogram initialization failed\n"); 1885 goto error_hist; 1886 } 1887 1888 ret = omap3isp_h3a_aewb_init(isp); 1889 if (ret < 0) { 1890 dev_err(isp->dev, "H3A AEWB initialization failed\n"); 1891 goto error_h3a_aewb; 1892 } 1893 1894 ret = omap3isp_h3a_af_init(isp); 1895 if (ret < 0) { 1896 dev_err(isp->dev, "H3A AF initialization failed\n"); 1897 goto error_h3a_af; 1898 } 1899 1900 /* Connect the submodules. */ 1901 ret = media_entity_create_link( 1902 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE, 1903 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0); 1904 if (ret < 0) 1905 goto error_link; 1906 1907 ret = media_entity_create_link( 1908 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE, 1909 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0); 1910 if (ret < 0) 1911 goto error_link; 1912 1913 ret = media_entity_create_link( 1914 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP, 1915 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0); 1916 if (ret < 0) 1917 goto error_link; 1918 1919 ret = media_entity_create_link( 1920 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF, 1921 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0); 1922 if (ret < 0) 1923 goto error_link; 1924 1925 ret = media_entity_create_link( 1926 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE, 1927 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0); 1928 if (ret < 0) 1929 goto error_link; 1930 1931 ret = media_entity_create_link( 1932 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP, 1933 &isp->isp_aewb.subdev.entity, 0, 1934 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); 1935 if (ret < 0) 1936 goto error_link; 1937 1938 ret = media_entity_create_link( 1939 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP, 1940 &isp->isp_af.subdev.entity, 0, 1941 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); 1942 if (ret < 0) 1943 goto error_link; 1944 1945 ret = media_entity_create_link( 1946 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP, 1947 &isp->isp_hist.subdev.entity, 0, 1948 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE); 1949 if (ret < 0) 1950 goto error_link; 1951 1952 return 0; 1953 1954error_link: 1955 omap3isp_h3a_af_cleanup(isp); 1956error_h3a_af: 1957 omap3isp_h3a_aewb_cleanup(isp); 1958error_h3a_aewb: 1959 omap3isp_hist_cleanup(isp); 1960error_hist: 1961 omap3isp_resizer_cleanup(isp); 1962error_resizer: 1963 omap3isp_preview_cleanup(isp); 1964error_preview: 1965 omap3isp_ccdc_cleanup(isp); 1966error_ccdc: 1967 omap3isp_ccp2_cleanup(isp); 1968error_ccp2: 1969 omap3isp_csi2_cleanup(isp); 1970error_csi2: 1971error_csiphy: 1972 return ret; 1973} 1974 1975/* 1976 * isp_remove - Remove ISP platform device 1977 * @pdev: Pointer to ISP platform device 1978 * 1979 * Always returns 0. 1980 */ 1981static int __devexit isp_remove(struct platform_device *pdev) 1982{ 1983 struct isp_device *isp = platform_get_drvdata(pdev); 1984 int i; 1985 1986 isp_unregister_entities(isp); 1987 isp_cleanup_modules(isp); 1988 1989 __omap3isp_get(isp, false); 1990 iommu_detach_device(isp->domain, &pdev->dev); 1991 iommu_domain_free(isp->domain); 1992 isp->domain = NULL; 1993 omap3isp_put(isp); 1994 1995 free_irq(isp->irq_num, isp); 1996 isp_put_clocks(isp); 1997 1998 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) { 1999 if (isp->mmio_base[i]) { 2000 iounmap(isp->mmio_base[i]); 2001 isp->mmio_base[i] = NULL; 2002 } 2003 2004 if (isp->mmio_base_phys[i]) { 2005 release_mem_region(isp->mmio_base_phys[i], 2006 isp->mmio_size[i]); 2007 isp->mmio_base_phys[i] = 0; 2008 } 2009 } 2010 2011 regulator_put(isp->isp_csiphy1.vdd); 2012 regulator_put(isp->isp_csiphy2.vdd); 2013 kfree(isp); 2014 2015 return 0; 2016} 2017 2018static int isp_map_mem_resource(struct platform_device *pdev, 2019 struct isp_device *isp, 2020 enum isp_mem_resources res) 2021{ 2022 struct resource *mem; 2023 2024 /* request the mem region for the camera registers */ 2025 2026 mem = platform_get_resource(pdev, IORESOURCE_MEM, res); 2027 if (!mem) { 2028 dev_err(isp->dev, "no mem resource?\n"); 2029 return -ENODEV; 2030 } 2031 2032 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) { 2033 dev_err(isp->dev, 2034 "cannot reserve camera register I/O region\n"); 2035 return -ENODEV; 2036 } 2037 isp->mmio_base_phys[res] = mem->start; 2038 isp->mmio_size[res] = resource_size(mem); 2039 2040 /* map the region */ 2041 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res], 2042 isp->mmio_size[res]); 2043 if (!isp->mmio_base[res]) { 2044 dev_err(isp->dev, "cannot map camera register I/O region\n"); 2045 return -ENODEV; 2046 } 2047 2048 return 0; 2049} 2050 2051/* 2052 * isp_probe - Probe ISP platform device 2053 * @pdev: Pointer to ISP platform device 2054 * 2055 * Returns 0 if successful, 2056 * -ENOMEM if no memory available, 2057 * -ENODEV if no platform device resources found 2058 * or no space for remapping registers, 2059 * -EINVAL if couldn't install ISR, 2060 * or clk_get return error value. 2061 */ 2062static int __devinit isp_probe(struct platform_device *pdev) 2063{ 2064 struct isp_platform_data *pdata = pdev->dev.platform_data; 2065 struct isp_device *isp; 2066 int ret; 2067 int i, m; 2068 2069 if (pdata == NULL) 2070 return -EINVAL; 2071 2072 isp = kzalloc(sizeof(*isp), GFP_KERNEL); 2073 if (!isp) { 2074 dev_err(&pdev->dev, "could not allocate memory\n"); 2075 return -ENOMEM; 2076 } 2077 2078 isp->autoidle = autoidle; 2079 isp->platform_cb.set_xclk = isp_set_xclk; 2080 2081 mutex_init(&isp->isp_mutex); 2082 spin_lock_init(&isp->stat_lock); 2083 2084 isp->dev = &pdev->dev; 2085 isp->pdata = pdata; 2086 isp->ref_count = 0; 2087 2088 isp->raw_dmamask = DMA_BIT_MASK(32); 2089 isp->dev->dma_mask = &isp->raw_dmamask; 2090 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32); 2091 2092 platform_set_drvdata(pdev, isp); 2093 2094 /* Regulators */ 2095 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1"); 2096 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2"); 2097 2098 /* Clocks */ 2099 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN); 2100 if (ret < 0) 2101 goto error; 2102 2103 ret = isp_get_clocks(isp); 2104 if (ret < 0) 2105 goto error; 2106 2107 if (__omap3isp_get(isp, false) == NULL) { 2108 ret = -ENODEV; 2109 goto error; 2110 } 2111 2112 ret = isp_reset(isp); 2113 if (ret < 0) 2114 goto error_isp; 2115 2116 /* Memory resources */ 2117 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION); 2118 dev_info(isp->dev, "Revision %d.%d found\n", 2119 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f); 2120 2121 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++) 2122 if (isp->revision == isp_res_maps[m].isp_rev) 2123 break; 2124 2125 if (m == ARRAY_SIZE(isp_res_maps)) { 2126 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n", 2127 (isp->revision & 0xf0) >> 4, isp->revision & 0xf); 2128 ret = -ENODEV; 2129 goto error_isp; 2130 } 2131 2132 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) { 2133 if (isp_res_maps[m].map & 1 << i) { 2134 ret = isp_map_mem_resource(pdev, isp, i); 2135 if (ret) 2136 goto error_isp; 2137 } 2138 } 2139 2140 isp->domain = iommu_domain_alloc(pdev->dev.bus); 2141 if (!isp->domain) { 2142 dev_err(isp->dev, "can't alloc iommu domain\n"); 2143 ret = -ENOMEM; 2144 goto error_isp; 2145 } 2146 2147 ret = iommu_attach_device(isp->domain, &pdev->dev); 2148 if (ret) { 2149 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret); 2150 goto free_domain; 2151 } 2152 2153 /* Interrupt */ 2154 isp->irq_num = platform_get_irq(pdev, 0); 2155 if (isp->irq_num <= 0) { 2156 dev_err(isp->dev, "No IRQ resource\n"); 2157 ret = -ENODEV; 2158 goto detach_dev; 2159 } 2160 2161 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) { 2162 dev_err(isp->dev, "Unable to request IRQ\n"); 2163 ret = -EINVAL; 2164 goto detach_dev; 2165 } 2166 2167 /* Entities */ 2168 ret = isp_initialize_modules(isp); 2169 if (ret < 0) 2170 goto error_irq; 2171 2172 ret = isp_register_entities(isp); 2173 if (ret < 0) 2174 goto error_modules; 2175 2176 isp_core_init(isp, 1); 2177 omap3isp_put(isp); 2178 2179 return 0; 2180 2181error_modules: 2182 isp_cleanup_modules(isp); 2183error_irq: 2184 free_irq(isp->irq_num, isp); 2185detach_dev: 2186 iommu_detach_device(isp->domain, &pdev->dev); 2187free_domain: 2188 iommu_domain_free(isp->domain); 2189error_isp: 2190 omap3isp_put(isp); 2191error: 2192 isp_put_clocks(isp); 2193 2194 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) { 2195 if (isp->mmio_base[i]) { 2196 iounmap(isp->mmio_base[i]); 2197 isp->mmio_base[i] = NULL; 2198 } 2199 2200 if (isp->mmio_base_phys[i]) { 2201 release_mem_region(isp->mmio_base_phys[i], 2202 isp->mmio_size[i]); 2203 isp->mmio_base_phys[i] = 0; 2204 } 2205 } 2206 regulator_put(isp->isp_csiphy2.vdd); 2207 regulator_put(isp->isp_csiphy1.vdd); 2208 platform_set_drvdata(pdev, NULL); 2209 2210 mutex_destroy(&isp->isp_mutex); 2211 kfree(isp); 2212 2213 return ret; 2214} 2215 2216static const struct dev_pm_ops omap3isp_pm_ops = { 2217 .prepare = isp_pm_prepare, 2218 .suspend = isp_pm_suspend, 2219 .resume = isp_pm_resume, 2220 .complete = isp_pm_complete, 2221}; 2222 2223static struct platform_device_id omap3isp_id_table[] = { 2224 { "omap3isp", 0 }, 2225 { }, 2226}; 2227MODULE_DEVICE_TABLE(platform, omap3isp_id_table); 2228 2229static struct platform_driver omap3isp_driver = { 2230 .probe = isp_probe, 2231 .remove = __devexit_p(isp_remove), 2232 .id_table = omap3isp_id_table, 2233 .driver = { 2234 .owner = THIS_MODULE, 2235 .name = "omap3isp", 2236 .pm = &omap3isp_pm_ops, 2237 }, 2238}; 2239 2240module_platform_driver(omap3isp_driver); 2241 2242MODULE_AUTHOR("Nokia Corporation"); 2243MODULE_DESCRIPTION("TI OMAP3 ISP driver"); 2244MODULE_LICENSE("GPL"); 2245MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);