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1/* 2 * Blackfin On-Chip Serial Driver 3 * 4 * Copyright 2006-2011 Analog Devices Inc. 5 * 6 * Enter bugs at http://blackfin.uclinux.org/ 7 * 8 * Licensed under the GPL-2 or later. 9 */ 10 11#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 12#define SUPPORT_SYSRQ 13#endif 14 15#define DRIVER_NAME "bfin-uart" 16#define pr_fmt(fmt) DRIVER_NAME ": " fmt 17 18#include <linux/module.h> 19#include <linux/ioport.h> 20#include <linux/gfp.h> 21#include <linux/io.h> 22#include <linux/init.h> 23#include <linux/console.h> 24#include <linux/sysrq.h> 25#include <linux/platform_device.h> 26#include <linux/tty.h> 27#include <linux/tty_flip.h> 28#include <linux/serial_core.h> 29#include <linux/gpio.h> 30#include <linux/irq.h> 31#include <linux/kgdb.h> 32#include <linux/slab.h> 33#include <linux/dma-mapping.h> 34 35#include <asm/portmux.h> 36#include <asm/cacheflush.h> 37#include <asm/dma.h> 38#include <asm/bfin_serial.h> 39 40#ifdef CONFIG_SERIAL_BFIN_MODULE 41# undef CONFIG_EARLY_PRINTK 42#endif 43 44#ifdef CONFIG_SERIAL_BFIN_MODULE 45# undef CONFIG_EARLY_PRINTK 46#endif 47 48/* UART name and device definitions */ 49#define BFIN_SERIAL_DEV_NAME "ttyBF" 50#define BFIN_SERIAL_MAJOR 204 51#define BFIN_SERIAL_MINOR 64 52 53static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS]; 54 55#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ 56 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) 57 58# ifndef CONFIG_SERIAL_BFIN_PIO 59# error KGDB only support UART in PIO mode. 60# endif 61 62static int kgdboc_port_line; 63static int kgdboc_break_enabled; 64#endif 65/* 66 * Setup for console. Argument comes from the menuconfig 67 */ 68#define DMA_RX_XCOUNT 512 69#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT) 70 71#define DMA_RX_FLUSH_JIFFIES (HZ / 50) 72 73#ifdef CONFIG_SERIAL_BFIN_DMA 74static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart); 75#else 76static void bfin_serial_tx_chars(struct bfin_serial_port *uart); 77#endif 78 79static void bfin_serial_reset_irda(struct uart_port *port); 80 81#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ 82 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) 83static unsigned int bfin_serial_get_mctrl(struct uart_port *port) 84{ 85 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 86 if (uart->cts_pin < 0) 87 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 88 89 /* CTS PIN is negative assertive. */ 90 if (UART_GET_CTS(uart)) 91 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 92 else 93 return TIOCM_DSR | TIOCM_CAR; 94} 95 96static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) 97{ 98 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 99 if (uart->rts_pin < 0) 100 return; 101 102 /* RTS PIN is negative assertive. */ 103 if (mctrl & TIOCM_RTS) 104 UART_ENABLE_RTS(uart); 105 else 106 UART_DISABLE_RTS(uart); 107} 108 109/* 110 * Handle any change of modem status signal. 111 */ 112static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id) 113{ 114 struct bfin_serial_port *uart = dev_id; 115 unsigned int status = bfin_serial_get_mctrl(&uart->port); 116#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS 117 struct tty_struct *tty = uart->port.state->port.tty; 118 119 UART_CLEAR_SCTS(uart); 120 if (tty->hw_stopped) { 121 if (status) { 122 tty->hw_stopped = 0; 123 uart_write_wakeup(&uart->port); 124 } 125 } else { 126 if (!status) 127 tty->hw_stopped = 1; 128 } 129#endif 130 uart_handle_cts_change(&uart->port, status & TIOCM_CTS); 131 132 return IRQ_HANDLED; 133} 134#else 135static unsigned int bfin_serial_get_mctrl(struct uart_port *port) 136{ 137 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; 138} 139 140static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) 141{ 142} 143#endif 144 145/* 146 * interrupts are disabled on entry 147 */ 148static void bfin_serial_stop_tx(struct uart_port *port) 149{ 150 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 151#ifdef CONFIG_SERIAL_BFIN_DMA 152 struct circ_buf *xmit = &uart->port.state->xmit; 153#endif 154 155 while (!(UART_GET_LSR(uart) & TEMT)) 156 cpu_relax(); 157 158#ifdef CONFIG_SERIAL_BFIN_DMA 159 disable_dma(uart->tx_dma_channel); 160 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1); 161 uart->port.icount.tx += uart->tx_count; 162 uart->tx_count = 0; 163 uart->tx_done = 1; 164#else 165#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x) 166 /* Clear TFI bit */ 167 UART_PUT_LSR(uart, TFI); 168#endif 169 UART_CLEAR_IER(uart, ETBEI); 170#endif 171} 172 173/* 174 * port is locked and interrupts are disabled 175 */ 176static void bfin_serial_start_tx(struct uart_port *port) 177{ 178 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 179 struct tty_struct *tty = uart->port.state->port.tty; 180 181 /* 182 * To avoid losting RX interrupt, we reset IR function 183 * before sending data. 184 */ 185 if (tty->termios.c_line == N_IRDA) 186 bfin_serial_reset_irda(port); 187 188#ifdef CONFIG_SERIAL_BFIN_DMA 189 if (uart->tx_done) 190 bfin_serial_dma_tx_chars(uart); 191#else 192 UART_SET_IER(uart, ETBEI); 193 bfin_serial_tx_chars(uart); 194#endif 195} 196 197/* 198 * Interrupts are enabled 199 */ 200static void bfin_serial_stop_rx(struct uart_port *port) 201{ 202 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 203 204 UART_CLEAR_IER(uart, ERBFI); 205} 206 207/* 208 * Set the modem control timer to fire immediately. 209 */ 210static void bfin_serial_enable_ms(struct uart_port *port) 211{ 212} 213 214 215#if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO) 216# define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold) 217# define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v)) 218#else 219# define UART_GET_ANOMALY_THRESHOLD(uart) 0 220# define UART_SET_ANOMALY_THRESHOLD(uart, v) 221#endif 222 223#ifdef CONFIG_SERIAL_BFIN_PIO 224static void bfin_serial_rx_chars(struct bfin_serial_port *uart) 225{ 226 struct tty_struct *tty = NULL; 227 unsigned int status, ch, flg; 228 static struct timeval anomaly_start = { .tv_sec = 0 }; 229 230 status = UART_GET_LSR(uart); 231 UART_CLEAR_LSR(uart); 232 233 ch = UART_GET_CHAR(uart); 234 uart->port.icount.rx++; 235 236#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ 237 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) 238 if (kgdb_connected && kgdboc_port_line == uart->port.line 239 && kgdboc_break_enabled) 240 if (ch == 0x3) {/* Ctrl + C */ 241 kgdb_breakpoint(); 242 return; 243 } 244 245 if (!uart->port.state || !uart->port.state->port.tty) 246 return; 247#endif 248 tty = uart->port.state->port.tty; 249 250 if (ANOMALY_05000363) { 251 /* The BF533 (and BF561) family of processors have a nice anomaly 252 * where they continuously generate characters for a "single" break. 253 * We have to basically ignore this flood until the "next" valid 254 * character comes across. Due to the nature of the flood, it is 255 * not possible to reliably catch bytes that are sent too quickly 256 * after this break. So application code talking to the Blackfin 257 * which sends a break signal must allow at least 1.5 character 258 * times after the end of the break for things to stabilize. This 259 * timeout was picked as it must absolutely be larger than 1 260 * character time +/- some percent. So 1.5 sounds good. All other 261 * Blackfin families operate properly. Woo. 262 */ 263 if (anomaly_start.tv_sec) { 264 struct timeval curr; 265 suseconds_t usecs; 266 267 if ((~ch & (~ch + 1)) & 0xff) 268 goto known_good_char; 269 270 do_gettimeofday(&curr); 271 if (curr.tv_sec - anomaly_start.tv_sec > 1) 272 goto known_good_char; 273 274 usecs = 0; 275 if (curr.tv_sec != anomaly_start.tv_sec) 276 usecs += USEC_PER_SEC; 277 usecs += curr.tv_usec - anomaly_start.tv_usec; 278 279 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart)) 280 goto known_good_char; 281 282 if (ch) 283 anomaly_start.tv_sec = 0; 284 else 285 anomaly_start = curr; 286 287 return; 288 289 known_good_char: 290 status &= ~BI; 291 anomaly_start.tv_sec = 0; 292 } 293 } 294 295 if (status & BI) { 296 if (ANOMALY_05000363) 297 if (bfin_revid() < 5) 298 do_gettimeofday(&anomaly_start); 299 uart->port.icount.brk++; 300 if (uart_handle_break(&uart->port)) 301 goto ignore_char; 302 status &= ~(PE | FE); 303 } 304 if (status & PE) 305 uart->port.icount.parity++; 306 if (status & OE) 307 uart->port.icount.overrun++; 308 if (status & FE) 309 uart->port.icount.frame++; 310 311 status &= uart->port.read_status_mask; 312 313 if (status & BI) 314 flg = TTY_BREAK; 315 else if (status & PE) 316 flg = TTY_PARITY; 317 else if (status & FE) 318 flg = TTY_FRAME; 319 else 320 flg = TTY_NORMAL; 321 322 if (uart_handle_sysrq_char(&uart->port, ch)) 323 goto ignore_char; 324 325 uart_insert_char(&uart->port, status, OE, ch, flg); 326 327 ignore_char: 328 tty_flip_buffer_push(tty); 329} 330 331static void bfin_serial_tx_chars(struct bfin_serial_port *uart) 332{ 333 struct circ_buf *xmit = &uart->port.state->xmit; 334 335 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { 336#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x) 337 /* Clear TFI bit */ 338 UART_PUT_LSR(uart, TFI); 339#endif 340 /* Anomaly notes: 341 * 05000215 - we always clear ETBEI within last UART TX 342 * interrupt to end a string. It is always set 343 * when start a new tx. 344 */ 345 UART_CLEAR_IER(uart, ETBEI); 346 return; 347 } 348 349 if (uart->port.x_char) { 350 UART_PUT_CHAR(uart, uart->port.x_char); 351 uart->port.icount.tx++; 352 uart->port.x_char = 0; 353 } 354 355 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) { 356 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]); 357 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 358 uart->port.icount.tx++; 359 } 360 361 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 362 uart_write_wakeup(&uart->port); 363} 364 365static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id) 366{ 367 struct bfin_serial_port *uart = dev_id; 368 369 while (UART_GET_LSR(uart) & DR) 370 bfin_serial_rx_chars(uart); 371 372 return IRQ_HANDLED; 373} 374 375static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id) 376{ 377 struct bfin_serial_port *uart = dev_id; 378 379 spin_lock(&uart->port.lock); 380 if (UART_GET_LSR(uart) & THRE) 381 bfin_serial_tx_chars(uart); 382 spin_unlock(&uart->port.lock); 383 384 return IRQ_HANDLED; 385} 386#endif 387 388#ifdef CONFIG_SERIAL_BFIN_DMA 389static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) 390{ 391 struct circ_buf *xmit = &uart->port.state->xmit; 392 393 uart->tx_done = 0; 394 395 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { 396 uart->tx_count = 0; 397 uart->tx_done = 1; 398 return; 399 } 400 401 if (uart->port.x_char) { 402 UART_PUT_CHAR(uart, uart->port.x_char); 403 uart->port.icount.tx++; 404 uart->port.x_char = 0; 405 } 406 407 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE); 408 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail)) 409 uart->tx_count = UART_XMIT_SIZE - xmit->tail; 410 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail), 411 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count)); 412 set_dma_config(uart->tx_dma_channel, 413 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP, 414 INTR_ON_BUF, 415 DIMENSION_LINEAR, 416 DATA_SIZE_8, 417 DMA_SYNC_RESTART)); 418 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail)); 419 set_dma_x_count(uart->tx_dma_channel, uart->tx_count); 420 set_dma_x_modify(uart->tx_dma_channel, 1); 421 SSYNC(); 422 enable_dma(uart->tx_dma_channel); 423 424 UART_SET_IER(uart, ETBEI); 425} 426 427static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart) 428{ 429 struct tty_struct *tty = uart->port.state->port.tty; 430 int i, flg, status; 431 432 status = UART_GET_LSR(uart); 433 UART_CLEAR_LSR(uart); 434 435 uart->port.icount.rx += 436 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, 437 UART_XMIT_SIZE); 438 439 if (status & BI) { 440 uart->port.icount.brk++; 441 if (uart_handle_break(&uart->port)) 442 goto dma_ignore_char; 443 status &= ~(PE | FE); 444 } 445 if (status & PE) 446 uart->port.icount.parity++; 447 if (status & OE) 448 uart->port.icount.overrun++; 449 if (status & FE) 450 uart->port.icount.frame++; 451 452 status &= uart->port.read_status_mask; 453 454 if (status & BI) 455 flg = TTY_BREAK; 456 else if (status & PE) 457 flg = TTY_PARITY; 458 else if (status & FE) 459 flg = TTY_FRAME; 460 else 461 flg = TTY_NORMAL; 462 463 for (i = uart->rx_dma_buf.tail; ; i++) { 464 if (i >= UART_XMIT_SIZE) 465 i = 0; 466 if (i == uart->rx_dma_buf.head) 467 break; 468 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i])) 469 uart_insert_char(&uart->port, status, OE, 470 uart->rx_dma_buf.buf[i], flg); 471 } 472 473 dma_ignore_char: 474 tty_flip_buffer_push(tty); 475} 476 477void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart) 478{ 479 int x_pos, pos; 480 481 dma_disable_irq_nosync(uart->rx_dma_channel); 482 spin_lock_bh(&uart->rx_lock); 483 484 /* 2D DMA RX buffer ring is used. Because curr_y_count and 485 * curr_x_count can't be read as an atomic operation, 486 * curr_y_count should be read before curr_x_count. When 487 * curr_x_count is read, curr_y_count may already indicate 488 * next buffer line. But, the position calculated here is 489 * still indicate the old line. The wrong position data may 490 * be smaller than current buffer tail, which cause garbages 491 * are received if it is not prohibit. 492 */ 493 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel); 494 x_pos = get_dma_curr_xcount(uart->rx_dma_channel); 495 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows; 496 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0) 497 uart->rx_dma_nrows = 0; 498 x_pos = DMA_RX_XCOUNT - x_pos; 499 if (x_pos == DMA_RX_XCOUNT) 500 x_pos = 0; 501 502 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos; 503 /* Ignore receiving data if new position is in the same line of 504 * current buffer tail and small. 505 */ 506 if (pos > uart->rx_dma_buf.tail || 507 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) { 508 uart->rx_dma_buf.head = pos; 509 bfin_serial_dma_rx_chars(uart); 510 uart->rx_dma_buf.tail = uart->rx_dma_buf.head; 511 } 512 513 spin_unlock_bh(&uart->rx_lock); 514 dma_enable_irq(uart->rx_dma_channel); 515 516 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES); 517} 518 519static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id) 520{ 521 struct bfin_serial_port *uart = dev_id; 522 struct circ_buf *xmit = &uart->port.state->xmit; 523 524 spin_lock(&uart->port.lock); 525 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { 526 disable_dma(uart->tx_dma_channel); 527 clear_dma_irqstat(uart->tx_dma_channel); 528 /* Anomaly notes: 529 * 05000215 - we always clear ETBEI within last UART TX 530 * interrupt to end a string. It is always set 531 * when start a new tx. 532 */ 533 UART_CLEAR_IER(uart, ETBEI); 534 uart->port.icount.tx += uart->tx_count; 535 if (!(xmit->tail == 0 && xmit->head == 0)) { 536 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1); 537 538 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 539 uart_write_wakeup(&uart->port); 540 } 541 542 bfin_serial_dma_tx_chars(uart); 543 } 544 545 spin_unlock(&uart->port.lock); 546 return IRQ_HANDLED; 547} 548 549static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id) 550{ 551 struct bfin_serial_port *uart = dev_id; 552 unsigned int irqstat; 553 int x_pos, pos; 554 555 spin_lock(&uart->rx_lock); 556 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel); 557 clear_dma_irqstat(uart->rx_dma_channel); 558 559 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel); 560 x_pos = get_dma_curr_xcount(uart->rx_dma_channel); 561 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows; 562 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0) 563 uart->rx_dma_nrows = 0; 564 565 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT; 566 if (pos > uart->rx_dma_buf.tail || 567 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) { 568 uart->rx_dma_buf.head = pos; 569 bfin_serial_dma_rx_chars(uart); 570 uart->rx_dma_buf.tail = uart->rx_dma_buf.head; 571 } 572 573 spin_unlock(&uart->rx_lock); 574 575 return IRQ_HANDLED; 576} 577#endif 578 579/* 580 * Return TIOCSER_TEMT when transmitter is not busy. 581 */ 582static unsigned int bfin_serial_tx_empty(struct uart_port *port) 583{ 584 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 585 unsigned int lsr; 586 587 lsr = UART_GET_LSR(uart); 588 if (lsr & TEMT) 589 return TIOCSER_TEMT; 590 else 591 return 0; 592} 593 594static void bfin_serial_break_ctl(struct uart_port *port, int break_state) 595{ 596 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 597 u32 lcr = UART_GET_LCR(uart); 598 if (break_state) 599 lcr |= SB; 600 else 601 lcr &= ~SB; 602 UART_PUT_LCR(uart, lcr); 603 SSYNC(); 604} 605 606static int bfin_serial_startup(struct uart_port *port) 607{ 608 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 609 610#ifdef CONFIG_SERIAL_BFIN_DMA 611 dma_addr_t dma_handle; 612 613 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) { 614 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n"); 615 return -EBUSY; 616 } 617 618 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) { 619 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n"); 620 free_dma(uart->rx_dma_channel); 621 return -EBUSY; 622 } 623 624 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart); 625 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart); 626 627 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA); 628 uart->rx_dma_buf.head = 0; 629 uart->rx_dma_buf.tail = 0; 630 uart->rx_dma_nrows = 0; 631 632 set_dma_config(uart->rx_dma_channel, 633 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO, 634 INTR_ON_ROW, DIMENSION_2D, 635 DATA_SIZE_8, 636 DMA_SYNC_RESTART)); 637 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT); 638 set_dma_x_modify(uart->rx_dma_channel, 1); 639 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT); 640 set_dma_y_modify(uart->rx_dma_channel, 1); 641 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf); 642 enable_dma(uart->rx_dma_channel); 643 644 uart->rx_dma_timer.data = (unsigned long)(uart); 645 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout; 646 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES; 647 add_timer(&(uart->rx_dma_timer)); 648#else 649# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ 650 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) 651 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled) 652 kgdboc_break_enabled = 0; 653 else { 654# endif 655 if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0, 656 "BFIN_UART_RX", uart)) { 657 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n"); 658 return -EBUSY; 659 } 660 661 if (request_irq 662 (uart->tx_irq, bfin_serial_tx_int, 0, 663 "BFIN_UART_TX", uart)) { 664 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n"); 665 free_irq(uart->rx_irq, uart); 666 return -EBUSY; 667 } 668 669# ifdef CONFIG_BF54x 670 { 671 /* 672 * UART2 and UART3 on BF548 share interrupt PINs and DMA 673 * controllers with SPORT2 and SPORT3. UART rx and tx 674 * interrupts are generated in PIO mode only when configure 675 * their peripheral mapping registers properly, which means 676 * request corresponding DMA channels in PIO mode as well. 677 */ 678 unsigned uart_dma_ch_rx, uart_dma_ch_tx; 679 680 switch (uart->rx_irq) { 681 case IRQ_UART3_RX: 682 uart_dma_ch_rx = CH_UART3_RX; 683 uart_dma_ch_tx = CH_UART3_TX; 684 break; 685 case IRQ_UART2_RX: 686 uart_dma_ch_rx = CH_UART2_RX; 687 uart_dma_ch_tx = CH_UART2_TX; 688 break; 689 default: 690 uart_dma_ch_rx = uart_dma_ch_tx = 0; 691 break; 692 }; 693 694 if (uart_dma_ch_rx && 695 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) { 696 printk(KERN_NOTICE"Fail to attach UART interrupt\n"); 697 free_irq(uart->rx_irq, uart); 698 free_irq(uart->tx_irq, uart); 699 return -EBUSY; 700 } 701 if (uart_dma_ch_tx && 702 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) { 703 printk(KERN_NOTICE "Fail to attach UART interrupt\n"); 704 free_dma(uart_dma_ch_rx); 705 free_irq(uart->rx_irq, uart); 706 free_irq(uart->tx_irq, uart); 707 return -EBUSY; 708 } 709 } 710# endif 711# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ 712 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) 713 } 714# endif 715#endif 716 717#ifdef CONFIG_SERIAL_BFIN_CTSRTS 718 if (uart->cts_pin >= 0) { 719 if (request_irq(gpio_to_irq(uart->cts_pin), 720 bfin_serial_mctrl_cts_int, 721 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | 722 0, "BFIN_UART_CTS", uart)) { 723 uart->cts_pin = -1; 724 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n"); 725 } 726 } 727 if (uart->rts_pin >= 0) { 728 if (gpio_request(uart->rts_pin, DRIVER_NAME)) { 729 pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin); 730 uart->rts_pin = -1; 731 } else 732 gpio_direction_output(uart->rts_pin, 0); 733 } 734#endif 735#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS 736 if (uart->cts_pin >= 0) { 737 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int, 738 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) { 739 uart->cts_pin = -1; 740 dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n"); 741 } 742 743 /* CTS RTS PINs are negative assertive. */ 744 UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS); 745 UART_SET_IER(uart, EDSSI); 746 } 747#endif 748 749 UART_SET_IER(uart, ERBFI); 750 return 0; 751} 752 753static void bfin_serial_shutdown(struct uart_port *port) 754{ 755 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 756 757#ifdef CONFIG_SERIAL_BFIN_DMA 758 disable_dma(uart->tx_dma_channel); 759 free_dma(uart->tx_dma_channel); 760 disable_dma(uart->rx_dma_channel); 761 free_dma(uart->rx_dma_channel); 762 del_timer(&(uart->rx_dma_timer)); 763 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0); 764#else 765#ifdef CONFIG_BF54x 766 switch (uart->port.irq) { 767 case IRQ_UART3_RX: 768 free_dma(CH_UART3_RX); 769 free_dma(CH_UART3_TX); 770 break; 771 case IRQ_UART2_RX: 772 free_dma(CH_UART2_RX); 773 free_dma(CH_UART2_TX); 774 break; 775 default: 776 break; 777 }; 778#endif 779 free_irq(uart->rx_irq, uart); 780 free_irq(uart->tx_irq, uart); 781#endif 782 783#ifdef CONFIG_SERIAL_BFIN_CTSRTS 784 if (uart->cts_pin >= 0) 785 free_irq(gpio_to_irq(uart->cts_pin), uart); 786 if (uart->rts_pin >= 0) 787 gpio_free(uart->rts_pin); 788#endif 789#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS 790 if (uart->cts_pin >= 0) 791 free_irq(uart->status_irq, uart); 792#endif 793} 794 795static void 796bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios, 797 struct ktermios *old) 798{ 799 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 800 unsigned long flags; 801 unsigned int baud, quot; 802 unsigned int ier, lcr = 0; 803 804 switch (termios->c_cflag & CSIZE) { 805 case CS8: 806 lcr = WLS(8); 807 break; 808 case CS7: 809 lcr = WLS(7); 810 break; 811 case CS6: 812 lcr = WLS(6); 813 break; 814 case CS5: 815 lcr = WLS(5); 816 break; 817 default: 818 printk(KERN_ERR "%s: word lengh not supported\n", 819 __func__); 820 } 821 822 /* Anomaly notes: 823 * 05000231 - STOP bit is always set to 1 whatever the user is set. 824 */ 825 if (termios->c_cflag & CSTOPB) { 826 if (ANOMALY_05000231) 827 printk(KERN_WARNING "STOP bits other than 1 is not " 828 "supported in case of anomaly 05000231.\n"); 829 else 830 lcr |= STB; 831 } 832 if (termios->c_cflag & PARENB) 833 lcr |= PEN; 834 if (!(termios->c_cflag & PARODD)) 835 lcr |= EPS; 836 if (termios->c_cflag & CMSPAR) 837 lcr |= STP; 838 839 spin_lock_irqsave(&uart->port.lock, flags); 840 841 port->read_status_mask = OE; 842 if (termios->c_iflag & INPCK) 843 port->read_status_mask |= (FE | PE); 844 if (termios->c_iflag & (BRKINT | PARMRK)) 845 port->read_status_mask |= BI; 846 847 /* 848 * Characters to ignore 849 */ 850 port->ignore_status_mask = 0; 851 if (termios->c_iflag & IGNPAR) 852 port->ignore_status_mask |= FE | PE; 853 if (termios->c_iflag & IGNBRK) { 854 port->ignore_status_mask |= BI; 855 /* 856 * If we're ignoring parity and break indicators, 857 * ignore overruns too (for real raw support). 858 */ 859 if (termios->c_iflag & IGNPAR) 860 port->ignore_status_mask |= OE; 861 } 862 863 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); 864 quot = uart_get_divisor(port, baud); 865 866 /* If discipline is not IRDA, apply ANOMALY_05000230 */ 867 if (termios->c_line != N_IRDA) 868 quot -= ANOMALY_05000230; 869 870 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15); 871 872 /* Disable UART */ 873 ier = UART_GET_IER(uart); 874 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN); 875 UART_DISABLE_INTS(uart); 876 877 /* Set DLAB in LCR to Access CLK */ 878 UART_SET_DLAB(uart); 879 880 UART_PUT_CLK(uart, quot); 881 SSYNC(); 882 883 /* Clear DLAB in LCR to Access THR RBR IER */ 884 UART_CLEAR_DLAB(uart); 885 886 UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr); 887 888 /* Enable UART */ 889 UART_ENABLE_INTS(uart, ier); 890 UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN); 891 892 /* Port speed changed, update the per-port timeout. */ 893 uart_update_timeout(port, termios->c_cflag, baud); 894 895 spin_unlock_irqrestore(&uart->port.lock, flags); 896} 897 898static const char *bfin_serial_type(struct uart_port *port) 899{ 900 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 901 902 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL; 903} 904 905/* 906 * Release the memory region(s) being used by 'port'. 907 */ 908static void bfin_serial_release_port(struct uart_port *port) 909{ 910} 911 912/* 913 * Request the memory region(s) being used by 'port'. 914 */ 915static int bfin_serial_request_port(struct uart_port *port) 916{ 917 return 0; 918} 919 920/* 921 * Configure/autoconfigure the port. 922 */ 923static void bfin_serial_config_port(struct uart_port *port, int flags) 924{ 925 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 926 927 if (flags & UART_CONFIG_TYPE && 928 bfin_serial_request_port(&uart->port) == 0) 929 uart->port.type = PORT_BFIN; 930} 931 932/* 933 * Verify the new serial_struct (for TIOCSSERIAL). 934 * The only change we allow are to the flags and type, and 935 * even then only between PORT_BFIN and PORT_UNKNOWN 936 */ 937static int 938bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser) 939{ 940 return 0; 941} 942 943/* 944 * Enable the IrDA function if tty->ldisc.num is N_IRDA. 945 * In other cases, disable IrDA function. 946 */ 947static void bfin_serial_set_ldisc(struct uart_port *port, int ld) 948{ 949 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 950 unsigned int val; 951 952 switch (ld) { 953 case N_IRDA: 954 val = UART_GET_GCTL(uart); 955 val |= (UMOD_IRDA | RPOLC); 956 UART_PUT_GCTL(uart, val); 957 break; 958 default: 959 val = UART_GET_GCTL(uart); 960 val &= ~(UMOD_MASK | RPOLC); 961 UART_PUT_GCTL(uart, val); 962 } 963} 964 965static void bfin_serial_reset_irda(struct uart_port *port) 966{ 967 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 968 unsigned int val; 969 970 val = UART_GET_GCTL(uart); 971 val &= ~(UMOD_MASK | RPOLC); 972 UART_PUT_GCTL(uart, val); 973 SSYNC(); 974 val |= (UMOD_IRDA | RPOLC); 975 UART_PUT_GCTL(uart, val); 976 SSYNC(); 977} 978 979#ifdef CONFIG_CONSOLE_POLL 980/* Anomaly notes: 981 * 05000099 - Because we only use THRE in poll_put and DR in poll_get, 982 * losing other bits of UART_LSR is not a problem here. 983 */ 984static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr) 985{ 986 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 987 988 while (!(UART_GET_LSR(uart) & THRE)) 989 cpu_relax(); 990 991 UART_CLEAR_DLAB(uart); 992 UART_PUT_CHAR(uart, (unsigned char)chr); 993} 994 995static int bfin_serial_poll_get_char(struct uart_port *port) 996{ 997 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 998 unsigned char chr; 999 1000 while (!(UART_GET_LSR(uart) & DR)) 1001 cpu_relax(); 1002 1003 UART_CLEAR_DLAB(uart); 1004 chr = UART_GET_CHAR(uart); 1005 1006 return chr; 1007} 1008#endif 1009 1010#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ 1011 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) 1012static void bfin_kgdboc_port_shutdown(struct uart_port *port) 1013{ 1014 if (kgdboc_break_enabled) { 1015 kgdboc_break_enabled = 0; 1016 bfin_serial_shutdown(port); 1017 } 1018} 1019 1020static int bfin_kgdboc_port_startup(struct uart_port *port) 1021{ 1022 kgdboc_port_line = port->line; 1023 kgdboc_break_enabled = !bfin_serial_startup(port); 1024 return 0; 1025} 1026#endif 1027 1028static struct uart_ops bfin_serial_pops = { 1029 .tx_empty = bfin_serial_tx_empty, 1030 .set_mctrl = bfin_serial_set_mctrl, 1031 .get_mctrl = bfin_serial_get_mctrl, 1032 .stop_tx = bfin_serial_stop_tx, 1033 .start_tx = bfin_serial_start_tx, 1034 .stop_rx = bfin_serial_stop_rx, 1035 .enable_ms = bfin_serial_enable_ms, 1036 .break_ctl = bfin_serial_break_ctl, 1037 .startup = bfin_serial_startup, 1038 .shutdown = bfin_serial_shutdown, 1039 .set_termios = bfin_serial_set_termios, 1040 .set_ldisc = bfin_serial_set_ldisc, 1041 .type = bfin_serial_type, 1042 .release_port = bfin_serial_release_port, 1043 .request_port = bfin_serial_request_port, 1044 .config_port = bfin_serial_config_port, 1045 .verify_port = bfin_serial_verify_port, 1046#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ 1047 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) 1048 .kgdboc_port_startup = bfin_kgdboc_port_startup, 1049 .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown, 1050#endif 1051#ifdef CONFIG_CONSOLE_POLL 1052 .poll_put_char = bfin_serial_poll_put_char, 1053 .poll_get_char = bfin_serial_poll_get_char, 1054#endif 1055}; 1056 1057#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) 1058/* 1059 * If the port was already initialised (eg, by a boot loader), 1060 * try to determine the current setup. 1061 */ 1062static void __init 1063bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud, 1064 int *parity, int *bits) 1065{ 1066 unsigned int status; 1067 1068 status = UART_GET_IER(uart) & (ERBFI | ETBEI); 1069 if (status == (ERBFI | ETBEI)) { 1070 /* ok, the port was enabled */ 1071 u32 lcr, clk; 1072 1073 lcr = UART_GET_LCR(uart); 1074 1075 *parity = 'n'; 1076 if (lcr & PEN) { 1077 if (lcr & EPS) 1078 *parity = 'e'; 1079 else 1080 *parity = 'o'; 1081 } 1082 *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5; 1083 1084 /* Set DLAB in LCR to Access CLK */ 1085 UART_SET_DLAB(uart); 1086 1087 clk = UART_GET_CLK(uart); 1088 1089 /* Clear DLAB in LCR to Access THR RBR IER */ 1090 UART_CLEAR_DLAB(uart); 1091 1092 *baud = get_sclk() / (16*clk); 1093 } 1094 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits); 1095} 1096 1097static struct uart_driver bfin_serial_reg; 1098 1099static void bfin_serial_console_putchar(struct uart_port *port, int ch) 1100{ 1101 struct bfin_serial_port *uart = (struct bfin_serial_port *)port; 1102 while (!(UART_GET_LSR(uart) & THRE)) 1103 barrier(); 1104 UART_PUT_CHAR(uart, ch); 1105} 1106 1107#endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) || 1108 defined (CONFIG_EARLY_PRINTK) */ 1109 1110#ifdef CONFIG_SERIAL_BFIN_CONSOLE 1111#define CLASS_BFIN_CONSOLE "bfin-console" 1112/* 1113 * Interrupts are disabled on entering 1114 */ 1115static void 1116bfin_serial_console_write(struct console *co, const char *s, unsigned int count) 1117{ 1118 struct bfin_serial_port *uart = bfin_serial_ports[co->index]; 1119 unsigned long flags; 1120 1121 spin_lock_irqsave(&uart->port.lock, flags); 1122 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar); 1123 spin_unlock_irqrestore(&uart->port.lock, flags); 1124 1125} 1126 1127static int __init 1128bfin_serial_console_setup(struct console *co, char *options) 1129{ 1130 struct bfin_serial_port *uart; 1131 int baud = 57600; 1132 int bits = 8; 1133 int parity = 'n'; 1134# if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ 1135 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) 1136 int flow = 'r'; 1137# else 1138 int flow = 'n'; 1139# endif 1140 1141 /* 1142 * Check whether an invalid uart number has been specified, and 1143 * if so, search for the first available port that does have 1144 * console support. 1145 */ 1146 if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS) 1147 return -ENODEV; 1148 1149 uart = bfin_serial_ports[co->index]; 1150 if (!uart) 1151 return -ENODEV; 1152 1153 if (options) 1154 uart_parse_options(options, &baud, &parity, &bits, &flow); 1155 else 1156 bfin_serial_console_get_options(uart, &baud, &parity, &bits); 1157 1158 return uart_set_options(&uart->port, co, baud, parity, bits, flow); 1159} 1160 1161static struct console bfin_serial_console = { 1162 .name = BFIN_SERIAL_DEV_NAME, 1163 .write = bfin_serial_console_write, 1164 .device = uart_console_device, 1165 .setup = bfin_serial_console_setup, 1166 .flags = CON_PRINTBUFFER, 1167 .index = -1, 1168 .data = &bfin_serial_reg, 1169}; 1170#define BFIN_SERIAL_CONSOLE (&bfin_serial_console) 1171#else 1172#define BFIN_SERIAL_CONSOLE NULL 1173#endif /* CONFIG_SERIAL_BFIN_CONSOLE */ 1174 1175#ifdef CONFIG_EARLY_PRINTK 1176static struct bfin_serial_port bfin_earlyprintk_port; 1177#define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk" 1178 1179/* 1180 * Interrupts are disabled on entering 1181 */ 1182static void 1183bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count) 1184{ 1185 unsigned long flags; 1186 1187 if (bfin_earlyprintk_port.port.line != co->index) 1188 return; 1189 1190 spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags); 1191 uart_console_write(&bfin_earlyprintk_port.port, s, count, 1192 bfin_serial_console_putchar); 1193 spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags); 1194} 1195 1196/* 1197 * This should have a .setup or .early_setup in it, but then things get called 1198 * without the command line options, and the baud rate gets messed up - so 1199 * don't let the common infrastructure play with things. (see calls to setup 1200 * & earlysetup in ./kernel/printk.c:register_console() 1201 */ 1202static struct __initdata console bfin_early_serial_console = { 1203 .name = "early_BFuart", 1204 .write = bfin_earlyprintk_console_write, 1205 .device = uart_console_device, 1206 .flags = CON_PRINTBUFFER, 1207 .index = -1, 1208 .data = &bfin_serial_reg, 1209}; 1210#endif 1211 1212static struct uart_driver bfin_serial_reg = { 1213 .owner = THIS_MODULE, 1214 .driver_name = DRIVER_NAME, 1215 .dev_name = BFIN_SERIAL_DEV_NAME, 1216 .major = BFIN_SERIAL_MAJOR, 1217 .minor = BFIN_SERIAL_MINOR, 1218 .nr = BFIN_UART_NR_PORTS, 1219 .cons = BFIN_SERIAL_CONSOLE, 1220}; 1221 1222static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state) 1223{ 1224 struct bfin_serial_port *uart = platform_get_drvdata(pdev); 1225 1226 return uart_suspend_port(&bfin_serial_reg, &uart->port); 1227} 1228 1229static int bfin_serial_resume(struct platform_device *pdev) 1230{ 1231 struct bfin_serial_port *uart = platform_get_drvdata(pdev); 1232 1233 return uart_resume_port(&bfin_serial_reg, &uart->port); 1234} 1235 1236static int bfin_serial_probe(struct platform_device *pdev) 1237{ 1238 struct resource *res; 1239 struct bfin_serial_port *uart = NULL; 1240 int ret = 0; 1241 1242 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) { 1243 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n"); 1244 return -ENOENT; 1245 } 1246 1247 if (bfin_serial_ports[pdev->id] == NULL) { 1248 1249 uart = kzalloc(sizeof(*uart), GFP_KERNEL); 1250 if (!uart) { 1251 dev_err(&pdev->dev, 1252 "fail to malloc bfin_serial_port\n"); 1253 return -ENOMEM; 1254 } 1255 bfin_serial_ports[pdev->id] = uart; 1256 1257#ifdef CONFIG_EARLY_PRINTK 1258 if (!(bfin_earlyprintk_port.port.membase 1259 && bfin_earlyprintk_port.port.line == pdev->id)) { 1260 /* 1261 * If the peripheral PINs of current port is allocated 1262 * in earlyprintk probe stage, don't do it again. 1263 */ 1264#endif 1265 ret = peripheral_request_list( 1266 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME); 1267 if (ret) { 1268 dev_err(&pdev->dev, 1269 "fail to request bfin serial peripherals\n"); 1270 goto out_error_free_mem; 1271 } 1272#ifdef CONFIG_EARLY_PRINTK 1273 } 1274#endif 1275 1276 spin_lock_init(&uart->port.lock); 1277 uart->port.uartclk = get_sclk(); 1278 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE; 1279 uart->port.ops = &bfin_serial_pops; 1280 uart->port.line = pdev->id; 1281 uart->port.iotype = UPIO_MEM; 1282 uart->port.flags = UPF_BOOT_AUTOCONF; 1283 1284 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1285 if (res == NULL) { 1286 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n"); 1287 ret = -ENOENT; 1288 goto out_error_free_peripherals; 1289 } 1290 1291 uart->port.membase = ioremap(res->start, resource_size(res)); 1292 if (!uart->port.membase) { 1293 dev_err(&pdev->dev, "Cannot map uart IO\n"); 1294 ret = -ENXIO; 1295 goto out_error_free_peripherals; 1296 } 1297 uart->port.mapbase = res->start; 1298 1299 uart->tx_irq = platform_get_irq(pdev, 0); 1300 if (uart->tx_irq < 0) { 1301 dev_err(&pdev->dev, "No uart TX IRQ specified\n"); 1302 ret = -ENOENT; 1303 goto out_error_unmap; 1304 } 1305 1306 uart->rx_irq = platform_get_irq(pdev, 1); 1307 if (uart->rx_irq < 0) { 1308 dev_err(&pdev->dev, "No uart RX IRQ specified\n"); 1309 ret = -ENOENT; 1310 goto out_error_unmap; 1311 } 1312 uart->port.irq = uart->rx_irq; 1313 1314 uart->status_irq = platform_get_irq(pdev, 2); 1315 if (uart->status_irq < 0) { 1316 dev_err(&pdev->dev, "No uart status IRQ specified\n"); 1317 ret = -ENOENT; 1318 goto out_error_unmap; 1319 } 1320 1321#ifdef CONFIG_SERIAL_BFIN_DMA 1322 spin_lock_init(&uart->rx_lock); 1323 uart->tx_done = 1; 1324 uart->tx_count = 0; 1325 1326 res = platform_get_resource(pdev, IORESOURCE_DMA, 0); 1327 if (res == NULL) { 1328 dev_err(&pdev->dev, "No uart TX DMA channel specified\n"); 1329 ret = -ENOENT; 1330 goto out_error_unmap; 1331 } 1332 uart->tx_dma_channel = res->start; 1333 1334 res = platform_get_resource(pdev, IORESOURCE_DMA, 1); 1335 if (res == NULL) { 1336 dev_err(&pdev->dev, "No uart RX DMA channel specified\n"); 1337 ret = -ENOENT; 1338 goto out_error_unmap; 1339 } 1340 uart->rx_dma_channel = res->start; 1341 1342 init_timer(&(uart->rx_dma_timer)); 1343#endif 1344 1345#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ 1346 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) 1347 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1348 if (res == NULL) 1349 uart->cts_pin = -1; 1350 else { 1351 uart->cts_pin = res->start; 1352#ifdef CONFIG_SERIAL_BFIN_CTSRTS 1353 uart->port.flags |= ASYNC_CTS_FLOW; 1354#endif 1355 } 1356 1357 res = platform_get_resource(pdev, IORESOURCE_IO, 1); 1358 if (res == NULL) 1359 uart->rts_pin = -1; 1360 else 1361 uart->rts_pin = res->start; 1362#endif 1363 } 1364 1365#ifdef CONFIG_SERIAL_BFIN_CONSOLE 1366 if (!is_early_platform_device(pdev)) { 1367#endif 1368 uart = bfin_serial_ports[pdev->id]; 1369 uart->port.dev = &pdev->dev; 1370 dev_set_drvdata(&pdev->dev, uart); 1371 ret = uart_add_one_port(&bfin_serial_reg, &uart->port); 1372#ifdef CONFIG_SERIAL_BFIN_CONSOLE 1373 } 1374#endif 1375 1376 if (!ret) 1377 return 0; 1378 1379 if (uart) { 1380out_error_unmap: 1381 iounmap(uart->port.membase); 1382out_error_free_peripherals: 1383 peripheral_free_list( 1384 (unsigned short *)pdev->dev.platform_data); 1385out_error_free_mem: 1386 kfree(uart); 1387 bfin_serial_ports[pdev->id] = NULL; 1388 } 1389 1390 return ret; 1391} 1392 1393static int __devexit bfin_serial_remove(struct platform_device *pdev) 1394{ 1395 struct bfin_serial_port *uart = platform_get_drvdata(pdev); 1396 1397 dev_set_drvdata(&pdev->dev, NULL); 1398 1399 if (uart) { 1400 uart_remove_one_port(&bfin_serial_reg, &uart->port); 1401 iounmap(uart->port.membase); 1402 peripheral_free_list( 1403 (unsigned short *)pdev->dev.platform_data); 1404 kfree(uart); 1405 bfin_serial_ports[pdev->id] = NULL; 1406 } 1407 1408 return 0; 1409} 1410 1411static struct platform_driver bfin_serial_driver = { 1412 .probe = bfin_serial_probe, 1413 .remove = __devexit_p(bfin_serial_remove), 1414 .suspend = bfin_serial_suspend, 1415 .resume = bfin_serial_resume, 1416 .driver = { 1417 .name = DRIVER_NAME, 1418 .owner = THIS_MODULE, 1419 }, 1420}; 1421 1422#if defined(CONFIG_SERIAL_BFIN_CONSOLE) 1423static __initdata struct early_platform_driver early_bfin_serial_driver = { 1424 .class_str = CLASS_BFIN_CONSOLE, 1425 .pdrv = &bfin_serial_driver, 1426 .requested_id = EARLY_PLATFORM_ID_UNSET, 1427}; 1428 1429static int __init bfin_serial_rs_console_init(void) 1430{ 1431 early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME); 1432 1433 early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0); 1434 1435 register_console(&bfin_serial_console); 1436 1437 return 0; 1438} 1439console_initcall(bfin_serial_rs_console_init); 1440#endif 1441 1442#ifdef CONFIG_EARLY_PRINTK 1443/* 1444 * Memory can't be allocated dynamically during earlyprink init stage. 1445 * So, do individual probe for earlyprink with a static uart port variable. 1446 */ 1447static int bfin_earlyprintk_probe(struct platform_device *pdev) 1448{ 1449 struct resource *res; 1450 int ret; 1451 1452 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) { 1453 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n"); 1454 return -ENOENT; 1455 } 1456 1457 ret = peripheral_request_list( 1458 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME); 1459 if (ret) { 1460 dev_err(&pdev->dev, 1461 "fail to request bfin serial peripherals\n"); 1462 return ret; 1463 } 1464 1465 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1466 if (res == NULL) { 1467 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n"); 1468 ret = -ENOENT; 1469 goto out_error_free_peripherals; 1470 } 1471 1472 bfin_earlyprintk_port.port.membase = ioremap(res->start, 1473 resource_size(res)); 1474 if (!bfin_earlyprintk_port.port.membase) { 1475 dev_err(&pdev->dev, "Cannot map uart IO\n"); 1476 ret = -ENXIO; 1477 goto out_error_free_peripherals; 1478 } 1479 bfin_earlyprintk_port.port.mapbase = res->start; 1480 bfin_earlyprintk_port.port.line = pdev->id; 1481 bfin_earlyprintk_port.port.uartclk = get_sclk(); 1482 bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE; 1483 spin_lock_init(&bfin_earlyprintk_port.port.lock); 1484 1485 return 0; 1486 1487out_error_free_peripherals: 1488 peripheral_free_list( 1489 (unsigned short *)pdev->dev.platform_data); 1490 1491 return ret; 1492} 1493 1494static struct platform_driver bfin_earlyprintk_driver = { 1495 .probe = bfin_earlyprintk_probe, 1496 .driver = { 1497 .name = DRIVER_NAME, 1498 .owner = THIS_MODULE, 1499 }, 1500}; 1501 1502static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = { 1503 .class_str = CLASS_BFIN_EARLYPRINTK, 1504 .pdrv = &bfin_earlyprintk_driver, 1505 .requested_id = EARLY_PLATFORM_ID_UNSET, 1506}; 1507 1508struct console __init *bfin_earlyserial_init(unsigned int port, 1509 unsigned int cflag) 1510{ 1511 struct ktermios t; 1512 char port_name[20]; 1513 1514 if (port < 0 || port >= BFIN_UART_NR_PORTS) 1515 return NULL; 1516 1517 /* 1518 * Only probe resource of the given port in earlyprintk boot arg. 1519 * The expected port id should be indicated in port name string. 1520 */ 1521 snprintf(port_name, 20, DRIVER_NAME ".%d", port); 1522 early_platform_driver_register(&early_bfin_earlyprintk_driver, 1523 port_name); 1524 early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0); 1525 1526 if (!bfin_earlyprintk_port.port.membase) 1527 return NULL; 1528 1529#ifdef CONFIG_SERIAL_BFIN_CONSOLE 1530 /* 1531 * If we are using early serial, don't let the normal console rewind 1532 * log buffer, since that causes things to be printed multiple times 1533 */ 1534 bfin_serial_console.flags &= ~CON_PRINTBUFFER; 1535#endif 1536 1537 bfin_early_serial_console.index = port; 1538 t.c_cflag = cflag; 1539 t.c_iflag = 0; 1540 t.c_oflag = 0; 1541 t.c_lflag = ICANON; 1542 t.c_line = port; 1543 bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t); 1544 1545 return &bfin_early_serial_console; 1546} 1547#endif /* CONFIG_EARLY_PRINTK */ 1548 1549static int __init bfin_serial_init(void) 1550{ 1551 int ret; 1552 1553 pr_info("Blackfin serial driver\n"); 1554 1555 ret = uart_register_driver(&bfin_serial_reg); 1556 if (ret) { 1557 pr_err("failed to register %s:%d\n", 1558 bfin_serial_reg.driver_name, ret); 1559 } 1560 1561 ret = platform_driver_register(&bfin_serial_driver); 1562 if (ret) { 1563 pr_err("fail to register bfin uart\n"); 1564 uart_unregister_driver(&bfin_serial_reg); 1565 } 1566 1567 return ret; 1568} 1569 1570static void __exit bfin_serial_exit(void) 1571{ 1572 platform_driver_unregister(&bfin_serial_driver); 1573 uart_unregister_driver(&bfin_serial_reg); 1574} 1575 1576 1577module_init(bfin_serial_init); 1578module_exit(bfin_serial_exit); 1579 1580MODULE_AUTHOR("Sonic Zhang, Aubrey Li"); 1581MODULE_DESCRIPTION("Blackfin generic serial port driver"); 1582MODULE_LICENSE("GPL"); 1583MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR); 1584MODULE_ALIAS("platform:bfin-uart");