tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#ifndef EFX_NIC_H
12#define EFX_NIC_H
13
14#include <linux/i2c-algo-bit.h>
15#include "net_driver.h"
16#include "efx.h"
17#include "mcdi.h"
18#include "spi.h"
19
20/*
21 * Falcon hardware control
22 */
23
24enum {
25 EFX_REV_FALCON_A0 = 0,
26 EFX_REV_FALCON_A1 = 1,
27 EFX_REV_FALCON_B0 = 2,
28 EFX_REV_SIENA_A0 = 3,
29};
30
31static inline int efx_nic_rev(struct efx_nic *efx)
32{
33 return efx->type->revision;
34}
35
36extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
37
38/* NIC has two interlinked PCI functions for the same port. */
39static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
40{
41 return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
42}
43
44enum {
45 PHY_TYPE_NONE = 0,
46 PHY_TYPE_TXC43128 = 1,
47 PHY_TYPE_88E1111 = 2,
48 PHY_TYPE_SFX7101 = 3,
49 PHY_TYPE_QT2022C2 = 4,
50 PHY_TYPE_PM8358 = 6,
51 PHY_TYPE_SFT9001A = 8,
52 PHY_TYPE_QT2025C = 9,
53 PHY_TYPE_SFT9001B = 10,
54};
55
56#define FALCON_XMAC_LOOPBACKS \
57 ((1 << LOOPBACK_XGMII) | \
58 (1 << LOOPBACK_XGXS) | \
59 (1 << LOOPBACK_XAUI))
60
61#define FALCON_GMAC_LOOPBACKS \
62 (1 << LOOPBACK_GMAC)
63
64/* Alignment of PCIe DMA boundaries (4KB) */
65#define EFX_PAGE_SIZE 4096
66/* Size and alignment of buffer table entries (same) */
67#define EFX_BUF_SIZE EFX_PAGE_SIZE
68
69/**
70 * struct falcon_board_type - board operations and type information
71 * @id: Board type id, as found in NVRAM
72 * @init: Allocate resources and initialise peripheral hardware
73 * @init_phy: Do board-specific PHY initialisation
74 * @fini: Shut down hardware and free resources
75 * @set_id_led: Set state of identifying LED or revert to automatic function
76 * @monitor: Board-specific health check function
77 */
78struct falcon_board_type {
79 u8 id;
80 int (*init) (struct efx_nic *nic);
81 void (*init_phy) (struct efx_nic *efx);
82 void (*fini) (struct efx_nic *nic);
83 void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
84 int (*monitor) (struct efx_nic *nic);
85};
86
87/**
88 * struct falcon_board - board information
89 * @type: Type of board
90 * @major: Major rev. ('A', 'B' ...)
91 * @minor: Minor rev. (0, 1, ...)
92 * @i2c_adap: I2C adapter for on-board peripherals
93 * @i2c_data: Data for bit-banging algorithm
94 * @hwmon_client: I2C client for hardware monitor
95 * @ioexp_client: I2C client for power/port control
96 */
97struct falcon_board {
98 const struct falcon_board_type *type;
99 int major;
100 int minor;
101 struct i2c_adapter i2c_adap;
102 struct i2c_algo_bit_data i2c_data;
103 struct i2c_client *hwmon_client, *ioexp_client;
104};
105
106/**
107 * struct falcon_nic_data - Falcon NIC state
108 * @pci_dev2: Secondary function of Falcon A
109 * @board: Board state and functions
110 * @stats_disable_count: Nest count for disabling statistics fetches
111 * @stats_pending: Is there a pending DMA of MAC statistics.
112 * @stats_timer: A timer for regularly fetching MAC statistics.
113 * @stats_dma_done: Pointer to the flag which indicates DMA completion.
114 * @spi_flash: SPI flash device
115 * @spi_eeprom: SPI EEPROM device
116 * @spi_lock: SPI bus lock
117 * @mdio_lock: MDIO bus lock
118 * @xmac_poll_required: XMAC link state needs polling
119 */
120struct falcon_nic_data {
121 struct pci_dev *pci_dev2;
122 struct falcon_board board;
123 unsigned int stats_disable_count;
124 bool stats_pending;
125 struct timer_list stats_timer;
126 u32 *stats_dma_done;
127 struct efx_spi_device spi_flash;
128 struct efx_spi_device spi_eeprom;
129 struct mutex spi_lock;
130 struct mutex mdio_lock;
131 bool xmac_poll_required;
132};
133
134static inline struct falcon_board *falcon_board(struct efx_nic *efx)
135{
136 struct falcon_nic_data *data = efx->nic_data;
137 return &data->board;
138}
139
140/**
141 * struct siena_nic_data - Siena NIC state
142 * @mcdi: Management-Controller-to-Driver Interface
143 * @wol_filter_id: Wake-on-LAN packet filter id
144 * @hwmon: Hardware monitor state
145 */
146struct siena_nic_data {
147 struct efx_mcdi_iface mcdi;
148 int wol_filter_id;
149#ifdef CONFIG_SFC_MCDI_MON
150 struct efx_mcdi_mon hwmon;
151#endif
152};
153
154#ifdef CONFIG_SFC_MCDI_MON
155static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
156{
157 struct siena_nic_data *nic_data;
158 EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
159 nic_data = efx->nic_data;
160 return &nic_data->hwmon;
161}
162#endif
163
164/*
165 * On the SFC9000 family each port is associated with 1 PCI physical
166 * function (PF) handled by sfc and a configurable number of virtual
167 * functions (VFs) that may be handled by some other driver, often in
168 * a VM guest. The queue pointer registers are mapped in both PF and
169 * VF BARs such that an 8K region provides access to a single RX, TX
170 * and event queue (collectively a Virtual Interface, VI or VNIC).
171 *
172 * The PF has access to all 1024 VIs while VFs are mapped to VIs
173 * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
174 * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
175 * The number of VIs and the VI_SCALE value are configurable but must
176 * be established at boot time by firmware.
177 */
178
179/* Maximum VI_SCALE parameter supported by Siena */
180#define EFX_VI_SCALE_MAX 6
181/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
182 * so this is the smallest allowed value. */
183#define EFX_VI_BASE 128U
184/* Maximum number of VFs allowed */
185#define EFX_VF_COUNT_MAX 127
186/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
187#define EFX_MAX_VF_EVQ_SIZE 8192UL
188/* The number of buffer table entries reserved for each VI on a VF */
189#define EFX_VF_BUFTBL_PER_VI \
190 ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
191 sizeof(efx_qword_t) / EFX_BUF_SIZE)
192
193#ifdef CONFIG_SFC_SRIOV
194
195static inline bool efx_sriov_wanted(struct efx_nic *efx)
196{
197 return efx->vf_count != 0;
198}
199static inline bool efx_sriov_enabled(struct efx_nic *efx)
200{
201 return efx->vf_init_count != 0;
202}
203static inline unsigned int efx_vf_size(struct efx_nic *efx)
204{
205 return 1 << efx->vi_scale;
206}
207
208extern int efx_init_sriov(void);
209extern void efx_sriov_probe(struct efx_nic *efx);
210extern int efx_sriov_init(struct efx_nic *efx);
211extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
212extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
213extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
214extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
215extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
216extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
217extern void efx_sriov_reset(struct efx_nic *efx);
218extern void efx_sriov_fini(struct efx_nic *efx);
219extern void efx_fini_sriov(void);
220
221#else
222
223static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
224static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
225static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
226
227static inline int efx_init_sriov(void) { return 0; }
228static inline void efx_sriov_probe(struct efx_nic *efx) {}
229static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
230static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
231static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
232 efx_qword_t *event) {}
233static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
234 efx_qword_t *event) {}
235static inline void efx_sriov_event(struct efx_channel *channel,
236 efx_qword_t *event) {}
237static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
238static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
239static inline void efx_sriov_reset(struct efx_nic *efx) {}
240static inline void efx_sriov_fini(struct efx_nic *efx) {}
241static inline void efx_fini_sriov(void) {}
242
243#endif
244
245extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
246extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
247 u16 vlan, u8 qos);
248extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
249 struct ifla_vf_info *ivf);
250extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
251 bool spoofchk);
252
253extern const struct efx_nic_type falcon_a1_nic_type;
254extern const struct efx_nic_type falcon_b0_nic_type;
255extern const struct efx_nic_type siena_a0_nic_type;
256
257/**************************************************************************
258 *
259 * Externs
260 *
261 **************************************************************************
262 */
263
264extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
265
266/* TX data path */
267extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
268extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
269extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
270extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
271extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
272
273/* RX data path */
274extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
275extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
276extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
277extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
278extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
279extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
280
281/* Event data path */
282extern int efx_nic_probe_eventq(struct efx_channel *channel);
283extern void efx_nic_init_eventq(struct efx_channel *channel);
284extern void efx_nic_fini_eventq(struct efx_channel *channel);
285extern void efx_nic_remove_eventq(struct efx_channel *channel);
286extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
287extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
288extern bool efx_nic_event_present(struct efx_channel *channel);
289
290/* MAC/PHY */
291extern void falcon_drain_tx_fifo(struct efx_nic *efx);
292extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
293extern bool falcon_xmac_check_fault(struct efx_nic *efx);
294extern int falcon_reconfigure_xmac(struct efx_nic *efx);
295extern void falcon_update_stats_xmac(struct efx_nic *efx);
296
297/* Some statistics are computed as A - B where A and B each increase
298 * linearly with some hardware counter(s) and the counters are read
299 * asynchronously. If the counters contributing to B are always read
300 * after those contributing to A, the computed value may be lower than
301 * the true value by some variable amount, and may decrease between
302 * subsequent computations.
303 *
304 * We should never allow statistics to decrease or to exceed the true
305 * value. Since the computed value will never be greater than the
306 * true value, we can achieve this by only storing the computed value
307 * when it increases.
308 */
309static inline void efx_update_diff_stat(u64 *stat, u64 diff)
310{
311 if ((s64)(diff - *stat) > 0)
312 *stat = diff;
313}
314
315/* Interrupts and test events */
316extern int efx_nic_init_interrupt(struct efx_nic *efx);
317extern void efx_nic_enable_interrupts(struct efx_nic *efx);
318extern void efx_nic_event_test_start(struct efx_channel *channel);
319extern void efx_nic_irq_test_start(struct efx_nic *efx);
320extern void efx_nic_disable_interrupts(struct efx_nic *efx);
321extern void efx_nic_fini_interrupt(struct efx_nic *efx);
322extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
323extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
324extern void falcon_irq_ack_a1(struct efx_nic *efx);
325
326static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
327{
328 return ACCESS_ONCE(channel->event_test_cpu);
329}
330static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
331{
332 return ACCESS_ONCE(efx->last_irq_cpu);
333}
334
335/* Global Resources */
336extern int efx_nic_flush_queues(struct efx_nic *efx);
337extern void falcon_start_nic_stats(struct efx_nic *efx);
338extern void falcon_stop_nic_stats(struct efx_nic *efx);
339extern void falcon_setup_xaui(struct efx_nic *efx);
340extern int falcon_reset_xaui(struct efx_nic *efx);
341extern void
342efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
343extern void efx_nic_init_common(struct efx_nic *efx);
344extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
345
346int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
347 unsigned int len);
348void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
349
350/* Tests */
351struct efx_nic_register_test {
352 unsigned address;
353 efx_oword_t mask;
354};
355extern int efx_nic_test_registers(struct efx_nic *efx,
356 const struct efx_nic_register_test *regs,
357 size_t n_regs);
358
359extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
360extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
361
362/**************************************************************************
363 *
364 * Falcon MAC stats
365 *
366 **************************************************************************
367 */
368
369#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
370#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
371
372/* Retrieve statistic from statistics block */
373#define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
374 if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
375 (efx)->mac_stats.efx_stat += le16_to_cpu( \
376 *((__force __le16 *) \
377 (efx->stats_buffer.addr + \
378 FALCON_STAT_OFFSET(falcon_stat)))); \
379 else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
380 (efx)->mac_stats.efx_stat += le32_to_cpu( \
381 *((__force __le32 *) \
382 (efx->stats_buffer.addr + \
383 FALCON_STAT_OFFSET(falcon_stat)))); \
384 else \
385 (efx)->mac_stats.efx_stat += le64_to_cpu( \
386 *((__force __le64 *) \
387 (efx->stats_buffer.addr + \
388 FALCON_STAT_OFFSET(falcon_stat)))); \
389 } while (0)
390
391#define FALCON_MAC_STATS_SIZE 0x100
392
393#define MAC_DATA_LBN 0
394#define MAC_DATA_WIDTH 32
395
396extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
397 efx_qword_t *event);
398
399extern void falcon_poll_xmac(struct efx_nic *efx);
400
401#endif /* EFX_NIC_H */