tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1#ifndef __KVM_X86_LAPIC_H
2#define __KVM_X86_LAPIC_H
3
4#include "iodev.h"
5#include "kvm_timer.h"
6
7#include <linux/kvm_host.h>
8
9struct kvm_lapic {
10 unsigned long base_address;
11 struct kvm_io_device dev;
12 struct kvm_timer lapic_timer;
13 u32 divide_count;
14 struct kvm_vcpu *vcpu;
15 bool irr_pending;
16 /* Number of bits set in ISR. */
17 s16 isr_count;
18 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
19 int highest_isr_cache;
20 /**
21 * APIC register page. The layout matches the register layout seen by
22 * the guest 1:1, because it is accessed by the vmx microcode.
23 * Note: Only one register, the TPR, is used by the microcode.
24 */
25 void *regs;
26 gpa_t vapic_addr;
27 struct page *vapic_page;
28};
29int kvm_create_lapic(struct kvm_vcpu *vcpu);
30void kvm_free_lapic(struct kvm_vcpu *vcpu);
31
32int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
33int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
34int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
35void kvm_lapic_reset(struct kvm_vcpu *vcpu);
36u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
37void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
38void kvm_lapic_set_eoi(struct kvm_vcpu *vcpu);
39void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
40u64 kvm_lapic_get_base(struct kvm_vcpu *vcpu);
41void kvm_apic_set_version(struct kvm_vcpu *vcpu);
42
43int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
44int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
45int kvm_apic_set_irq(struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq);
46int kvm_apic_local_deliver(struct kvm_lapic *apic, int lvt_type);
47
48u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
49void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
50void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
51int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
52bool kvm_apic_present(struct kvm_vcpu *vcpu);
53int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
54
55u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
56void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data);
57
58void kvm_lapic_set_vapic_addr(struct kvm_vcpu *vcpu, gpa_t vapic_addr);
59void kvm_lapic_sync_from_vapic(struct kvm_vcpu *vcpu);
60void kvm_lapic_sync_to_vapic(struct kvm_vcpu *vcpu);
61
62int kvm_x2apic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
63int kvm_x2apic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
64
65int kvm_hv_vapic_msr_write(struct kvm_vcpu *vcpu, u32 msr, u64 data);
66int kvm_hv_vapic_msr_read(struct kvm_vcpu *vcpu, u32 msr, u64 *data);
67
68static inline bool kvm_hv_vapic_assist_page_enabled(struct kvm_vcpu *vcpu)
69{
70 return vcpu->arch.hv_vapic & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE;
71}
72
73int kvm_lapic_enable_pv_eoi(struct kvm_vcpu *vcpu, u64 data);
74#endif