Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

at v3.6-rc7 1138 lines 30 kB view raw
1/* 2 * linux/drivers/mmc/host/tmio_mmc_pio.c 3 * 4 * Copyright (C) 2011 Guennadi Liakhovetski 5 * Copyright (C) 2007 Ian Molton 6 * Copyright (C) 2004 Ian Molton 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * Driver for the MMC / SD / SDIO IP found in: 13 * 14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 15 * 16 * This driver draws mainly on scattered spec sheets, Reverse engineering 17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 18 * support). (Further 4 bit support from a later datasheet). 19 * 20 * TODO: 21 * Investigate using a workqueue for PIO transfers 22 * Eliminate FIXMEs 23 * SDIO support 24 * Better Power management 25 * Handle MMC errors better 26 * double buffer support 27 * 28 */ 29 30#include <linux/delay.h> 31#include <linux/device.h> 32#include <linux/highmem.h> 33#include <linux/interrupt.h> 34#include <linux/io.h> 35#include <linux/irq.h> 36#include <linux/mfd/tmio.h> 37#include <linux/mmc/host.h> 38#include <linux/mmc/mmc.h> 39#include <linux/mmc/slot-gpio.h> 40#include <linux/mmc/tmio.h> 41#include <linux/module.h> 42#include <linux/pagemap.h> 43#include <linux/platform_device.h> 44#include <linux/pm_qos.h> 45#include <linux/pm_runtime.h> 46#include <linux/scatterlist.h> 47#include <linux/spinlock.h> 48#include <linux/workqueue.h> 49 50#include "tmio_mmc.h" 51 52void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 53{ 54 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 55 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 56} 57 58void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 59{ 60 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 61 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 62} 63 64static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 65{ 66 sd_ctrl_write32(host, CTL_STATUS, ~i); 67} 68 69static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 70{ 71 host->sg_len = data->sg_len; 72 host->sg_ptr = data->sg; 73 host->sg_orig = data->sg; 74 host->sg_off = 0; 75} 76 77static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 78{ 79 host->sg_ptr = sg_next(host->sg_ptr); 80 host->sg_off = 0; 81 return --host->sg_len; 82} 83 84#ifdef CONFIG_MMC_DEBUG 85 86#define STATUS_TO_TEXT(a, status, i) \ 87 do { \ 88 if (status & TMIO_STAT_##a) { \ 89 if (i++) \ 90 printk(" | "); \ 91 printk(#a); \ 92 } \ 93 } while (0) 94 95static void pr_debug_status(u32 status) 96{ 97 int i = 0; 98 pr_debug("status: %08x = ", status); 99 STATUS_TO_TEXT(CARD_REMOVE, status, i); 100 STATUS_TO_TEXT(CARD_INSERT, status, i); 101 STATUS_TO_TEXT(SIGSTATE, status, i); 102 STATUS_TO_TEXT(WRPROTECT, status, i); 103 STATUS_TO_TEXT(CARD_REMOVE_A, status, i); 104 STATUS_TO_TEXT(CARD_INSERT_A, status, i); 105 STATUS_TO_TEXT(SIGSTATE_A, status, i); 106 STATUS_TO_TEXT(CMD_IDX_ERR, status, i); 107 STATUS_TO_TEXT(STOPBIT_ERR, status, i); 108 STATUS_TO_TEXT(ILL_FUNC, status, i); 109 STATUS_TO_TEXT(CMD_BUSY, status, i); 110 STATUS_TO_TEXT(CMDRESPEND, status, i); 111 STATUS_TO_TEXT(DATAEND, status, i); 112 STATUS_TO_TEXT(CRCFAIL, status, i); 113 STATUS_TO_TEXT(DATATIMEOUT, status, i); 114 STATUS_TO_TEXT(CMDTIMEOUT, status, i); 115 STATUS_TO_TEXT(RXOVERFLOW, status, i); 116 STATUS_TO_TEXT(TXUNDERRUN, status, i); 117 STATUS_TO_TEXT(RXRDY, status, i); 118 STATUS_TO_TEXT(TXRQ, status, i); 119 STATUS_TO_TEXT(ILL_ACCESS, status, i); 120 printk("\n"); 121} 122 123#else 124#define pr_debug_status(s) do { } while (0) 125#endif 126 127static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 128{ 129 struct tmio_mmc_host *host = mmc_priv(mmc); 130 131 if (enable) { 132 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & 133 ~TMIO_SDIO_STAT_IOIRQ; 134 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 135 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 136 } else { 137 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 138 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 139 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 140 } 141} 142 143static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock) 144{ 145 u32 clk = 0, clock; 146 147 if (new_clock) { 148 for (clock = host->mmc->f_min, clk = 0x80000080; 149 new_clock >= (clock<<1); clk >>= 1) 150 clock <<= 1; 151 clk |= 0x100; 152 } 153 154 if (host->set_clk_div) 155 host->set_clk_div(host->pdev, (clk>>22) & 1); 156 157 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff); 158} 159 160static void tmio_mmc_clk_stop(struct tmio_mmc_host *host) 161{ 162 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); 163 164 /* implicit BUG_ON(!res) */ 165 if (resource_size(res) > 0x100) { 166 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000); 167 msleep(10); 168 } 169 170 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 & 171 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 172 msleep(10); 173} 174 175static void tmio_mmc_clk_start(struct tmio_mmc_host *host) 176{ 177 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); 178 179 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 | 180 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL)); 181 msleep(10); 182 183 /* implicit BUG_ON(!res) */ 184 if (resource_size(res) > 0x100) { 185 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100); 186 msleep(10); 187 } 188} 189 190static void tmio_mmc_reset(struct tmio_mmc_host *host) 191{ 192 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0); 193 194 /* FIXME - should we set stop clock reg here */ 195 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 196 /* implicit BUG_ON(!res) */ 197 if (resource_size(res) > 0x100) 198 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000); 199 msleep(10); 200 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 201 if (resource_size(res) > 0x100) 202 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001); 203 msleep(10); 204} 205 206static void tmio_mmc_reset_work(struct work_struct *work) 207{ 208 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 209 delayed_reset_work.work); 210 struct mmc_request *mrq; 211 unsigned long flags; 212 213 spin_lock_irqsave(&host->lock, flags); 214 mrq = host->mrq; 215 216 /* 217 * is request already finished? Since we use a non-blocking 218 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 219 * us, so, have to check for IS_ERR(host->mrq) 220 */ 221 if (IS_ERR_OR_NULL(mrq) 222 || time_is_after_jiffies(host->last_req_ts + 223 msecs_to_jiffies(2000))) { 224 spin_unlock_irqrestore(&host->lock, flags); 225 return; 226 } 227 228 dev_warn(&host->pdev->dev, 229 "timeout waiting for hardware interrupt (CMD%u)\n", 230 mrq->cmd->opcode); 231 232 if (host->data) 233 host->data->error = -ETIMEDOUT; 234 else if (host->cmd) 235 host->cmd->error = -ETIMEDOUT; 236 else 237 mrq->cmd->error = -ETIMEDOUT; 238 239 host->cmd = NULL; 240 host->data = NULL; 241 host->force_pio = false; 242 243 spin_unlock_irqrestore(&host->lock, flags); 244 245 tmio_mmc_reset(host); 246 247 /* Ready for new calls */ 248 host->mrq = NULL; 249 250 tmio_mmc_abort_dma(host); 251 mmc_request_done(host->mmc, mrq); 252} 253 254/* called with host->lock held, interrupts disabled */ 255static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 256{ 257 struct mmc_request *mrq; 258 unsigned long flags; 259 260 spin_lock_irqsave(&host->lock, flags); 261 262 mrq = host->mrq; 263 if (IS_ERR_OR_NULL(mrq)) { 264 spin_unlock_irqrestore(&host->lock, flags); 265 return; 266 } 267 268 host->cmd = NULL; 269 host->data = NULL; 270 host->force_pio = false; 271 272 cancel_delayed_work(&host->delayed_reset_work); 273 274 host->mrq = NULL; 275 spin_unlock_irqrestore(&host->lock, flags); 276 277 if (mrq->cmd->error || (mrq->data && mrq->data->error)) 278 tmio_mmc_abort_dma(host); 279 280 mmc_request_done(host->mmc, mrq); 281} 282 283static void tmio_mmc_done_work(struct work_struct *work) 284{ 285 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 286 done); 287 tmio_mmc_finish_request(host); 288} 289 290/* These are the bitmasks the tmio chip requires to implement the MMC response 291 * types. Note that R1 and R6 are the same in this scheme. */ 292#define APP_CMD 0x0040 293#define RESP_NONE 0x0300 294#define RESP_R1 0x0400 295#define RESP_R1B 0x0500 296#define RESP_R2 0x0600 297#define RESP_R3 0x0700 298#define DATA_PRESENT 0x0800 299#define TRANSFER_READ 0x1000 300#define TRANSFER_MULTI 0x2000 301#define SECURITY_CMD 0x4000 302 303static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd) 304{ 305 struct mmc_data *data = host->data; 306 int c = cmd->opcode; 307 u32 irq_mask = TMIO_MASK_CMD; 308 309 /* CMD12 is handled by hardware */ 310 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) { 311 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001); 312 return 0; 313 } 314 315 switch (mmc_resp_type(cmd)) { 316 case MMC_RSP_NONE: c |= RESP_NONE; break; 317 case MMC_RSP_R1: c |= RESP_R1; break; 318 case MMC_RSP_R1B: c |= RESP_R1B; break; 319 case MMC_RSP_R2: c |= RESP_R2; break; 320 case MMC_RSP_R3: c |= RESP_R3; break; 321 default: 322 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 323 return -EINVAL; 324 } 325 326 host->cmd = cmd; 327 328/* FIXME - this seems to be ok commented out but the spec suggest this bit 329 * should be set when issuing app commands. 330 * if(cmd->flags & MMC_FLAG_ACMD) 331 * c |= APP_CMD; 332 */ 333 if (data) { 334 c |= DATA_PRESENT; 335 if (data->blocks > 1) { 336 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100); 337 c |= TRANSFER_MULTI; 338 } 339 if (data->flags & MMC_DATA_READ) 340 c |= TRANSFER_READ; 341 } 342 343 if (!host->native_hotplug) 344 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 345 tmio_mmc_enable_mmc_irqs(host, irq_mask); 346 347 /* Fire off the command */ 348 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg); 349 sd_ctrl_write16(host, CTL_SD_CMD, c); 350 351 return 0; 352} 353 354/* 355 * This chip always returns (at least?) as much data as you ask for. 356 * I'm unsure what happens if you ask for less than a block. This should be 357 * looked into to ensure that a funny length read doesn't hose the controller. 358 */ 359static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 360{ 361 struct mmc_data *data = host->data; 362 void *sg_virt; 363 unsigned short *buf; 364 unsigned int count; 365 unsigned long flags; 366 367 if ((host->chan_tx || host->chan_rx) && !host->force_pio) { 368 pr_err("PIO IRQ in DMA mode!\n"); 369 return; 370 } else if (!data) { 371 pr_debug("Spurious PIO IRQ\n"); 372 return; 373 } 374 375 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags); 376 buf = (unsigned short *)(sg_virt + host->sg_off); 377 378 count = host->sg_ptr->length - host->sg_off; 379 if (count > data->blksz) 380 count = data->blksz; 381 382 pr_debug("count: %08x offset: %08x flags %08x\n", 383 count, host->sg_off, data->flags); 384 385 /* Transfer the data */ 386 if (data->flags & MMC_DATA_READ) 387 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 388 else 389 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 390 391 host->sg_off += count; 392 393 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt); 394 395 if (host->sg_off == host->sg_ptr->length) 396 tmio_mmc_next_sg(host); 397 398 return; 399} 400 401static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 402{ 403 if (host->sg_ptr == &host->bounce_sg) { 404 unsigned long flags; 405 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags); 406 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length); 407 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr); 408 } 409} 410 411/* needs to be called with host->lock held */ 412void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 413{ 414 struct mmc_data *data = host->data; 415 struct mmc_command *stop; 416 417 host->data = NULL; 418 419 if (!data) { 420 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 421 return; 422 } 423 stop = data->stop; 424 425 /* FIXME - return correct transfer count on errors */ 426 if (!data->error) 427 data->bytes_xfered = data->blocks * data->blksz; 428 else 429 data->bytes_xfered = 0; 430 431 pr_debug("Completed data request\n"); 432 433 /* 434 * FIXME: other drivers allow an optional stop command of any given type 435 * which we dont do, as the chip can auto generate them. 436 * Perhaps we can be smarter about when to use auto CMD12 and 437 * only issue the auto request when we know this is the desired 438 * stop command, allowing fallback to the stop command the 439 * upper layers expect. For now, we do what works. 440 */ 441 442 if (data->flags & MMC_DATA_READ) { 443 if (host->chan_rx && !host->force_pio) 444 tmio_mmc_check_bounce_buffer(host); 445 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 446 host->mrq); 447 } else { 448 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 449 host->mrq); 450 } 451 452 if (stop) { 453 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg) 454 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000); 455 else 456 BUG(); 457 } 458 459 schedule_work(&host->done); 460} 461 462static void tmio_mmc_data_irq(struct tmio_mmc_host *host) 463{ 464 struct mmc_data *data; 465 spin_lock(&host->lock); 466 data = host->data; 467 468 if (!data) 469 goto out; 470 471 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) { 472 /* 473 * Has all data been written out yet? Testing on SuperH showed, 474 * that in most cases the first interrupt comes already with the 475 * BUSY status bit clear, but on some operations, like mount or 476 * in the beginning of a write / sync / umount, there is one 477 * DATAEND interrupt with the BUSY bit set, in this cases 478 * waiting for one more interrupt fixes the problem. 479 */ 480 if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) { 481 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 482 tasklet_schedule(&host->dma_complete); 483 } 484 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) { 485 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 486 tasklet_schedule(&host->dma_complete); 487 } else { 488 tmio_mmc_do_data_irq(host); 489 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 490 } 491out: 492 spin_unlock(&host->lock); 493} 494 495static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, 496 unsigned int stat) 497{ 498 struct mmc_command *cmd = host->cmd; 499 int i, addr; 500 501 spin_lock(&host->lock); 502 503 if (!host->cmd) { 504 pr_debug("Spurious CMD irq\n"); 505 goto out; 506 } 507 508 host->cmd = NULL; 509 510 /* This controller is sicker than the PXA one. Not only do we need to 511 * drop the top 8 bits of the first response word, we also need to 512 * modify the order of the response for short response command types. 513 */ 514 515 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 516 cmd->resp[i] = sd_ctrl_read32(host, addr); 517 518 if (cmd->flags & MMC_RSP_136) { 519 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 520 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 521 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 522 cmd->resp[3] <<= 8; 523 } else if (cmd->flags & MMC_RSP_R3) { 524 cmd->resp[0] = cmd->resp[3]; 525 } 526 527 if (stat & TMIO_STAT_CMDTIMEOUT) 528 cmd->error = -ETIMEDOUT; 529 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) 530 cmd->error = -EILSEQ; 531 532 /* If there is data to handle we enable data IRQs here, and 533 * we will ultimatley finish the request in the data_end handler. 534 * If theres no data or we encountered an error, finish now. 535 */ 536 if (host->data && !cmd->error) { 537 if (host->data->flags & MMC_DATA_READ) { 538 if (host->force_pio || !host->chan_rx) 539 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 540 else 541 tasklet_schedule(&host->dma_issue); 542 } else { 543 if (host->force_pio || !host->chan_tx) 544 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 545 else 546 tasklet_schedule(&host->dma_issue); 547 } 548 } else { 549 schedule_work(&host->done); 550 } 551 552out: 553 spin_unlock(&host->lock); 554} 555 556static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host, 557 int *ireg, int *status) 558{ 559 *status = sd_ctrl_read32(host, CTL_STATUS); 560 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 561 562 pr_debug_status(*status); 563 pr_debug_status(*ireg); 564} 565 566static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 567 int ireg, int status) 568{ 569 struct mmc_host *mmc = host->mmc; 570 571 /* Card insert / remove attempts */ 572 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 573 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 574 TMIO_STAT_CARD_REMOVE); 575 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 576 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 577 !work_pending(&mmc->detect.work)) 578 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 579 return true; 580 } 581 582 return false; 583} 584 585irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid) 586{ 587 unsigned int ireg, status; 588 struct tmio_mmc_host *host = devid; 589 590 tmio_mmc_card_irq_status(host, &ireg, &status); 591 __tmio_mmc_card_detect_irq(host, ireg, status); 592 593 return IRQ_HANDLED; 594} 595EXPORT_SYMBOL(tmio_mmc_card_detect_irq); 596 597static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, 598 int ireg, int status) 599{ 600 /* Command completion */ 601 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 602 tmio_mmc_ack_mmc_irqs(host, 603 TMIO_STAT_CMDRESPEND | 604 TMIO_STAT_CMDTIMEOUT); 605 tmio_mmc_cmd_irq(host, status); 606 return true; 607 } 608 609 /* Data transfer */ 610 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 611 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 612 tmio_mmc_pio_irq(host); 613 return true; 614 } 615 616 /* Data transfer completion */ 617 if (ireg & TMIO_STAT_DATAEND) { 618 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 619 tmio_mmc_data_irq(host); 620 return true; 621 } 622 623 return false; 624} 625 626irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid) 627{ 628 unsigned int ireg, status; 629 struct tmio_mmc_host *host = devid; 630 631 tmio_mmc_card_irq_status(host, &ireg, &status); 632 __tmio_mmc_sdcard_irq(host, ireg, status); 633 634 return IRQ_HANDLED; 635} 636EXPORT_SYMBOL(tmio_mmc_sdcard_irq); 637 638irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid) 639{ 640 struct tmio_mmc_host *host = devid; 641 struct mmc_host *mmc = host->mmc; 642 struct tmio_mmc_data *pdata = host->pdata; 643 unsigned int ireg, status; 644 645 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 646 return IRQ_HANDLED; 647 648 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 649 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask; 650 651 sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL); 652 653 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) 654 mmc_signal_sdio_irq(mmc); 655 656 return IRQ_HANDLED; 657} 658EXPORT_SYMBOL(tmio_mmc_sdio_irq); 659 660irqreturn_t tmio_mmc_irq(int irq, void *devid) 661{ 662 struct tmio_mmc_host *host = devid; 663 unsigned int ireg, status; 664 665 pr_debug("MMC IRQ begin\n"); 666 667 tmio_mmc_card_irq_status(host, &ireg, &status); 668 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 669 return IRQ_HANDLED; 670 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 671 return IRQ_HANDLED; 672 673 tmio_mmc_sdio_irq(irq, devid); 674 675 return IRQ_HANDLED; 676} 677EXPORT_SYMBOL(tmio_mmc_irq); 678 679static int tmio_mmc_start_data(struct tmio_mmc_host *host, 680 struct mmc_data *data) 681{ 682 struct tmio_mmc_data *pdata = host->pdata; 683 684 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 685 data->blksz, data->blocks); 686 687 /* Some hardware cannot perform 2 byte requests in 4 bit mode */ 688 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) { 689 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 690 691 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 692 pr_err("%s: %d byte block unsupported in 4 bit mode\n", 693 mmc_hostname(host->mmc), data->blksz); 694 return -EINVAL; 695 } 696 } 697 698 tmio_mmc_init_sg(host, data); 699 host->data = data; 700 701 /* Set transfer length / blocksize */ 702 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 703 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 704 705 tmio_mmc_start_dma(host, data); 706 707 return 0; 708} 709 710/* Process requests from the MMC layer */ 711static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 712{ 713 struct tmio_mmc_host *host = mmc_priv(mmc); 714 unsigned long flags; 715 int ret; 716 717 spin_lock_irqsave(&host->lock, flags); 718 719 if (host->mrq) { 720 pr_debug("request not null\n"); 721 if (IS_ERR(host->mrq)) { 722 spin_unlock_irqrestore(&host->lock, flags); 723 mrq->cmd->error = -EAGAIN; 724 mmc_request_done(mmc, mrq); 725 return; 726 } 727 } 728 729 host->last_req_ts = jiffies; 730 wmb(); 731 host->mrq = mrq; 732 733 spin_unlock_irqrestore(&host->lock, flags); 734 735 if (mrq->data) { 736 ret = tmio_mmc_start_data(host, mrq->data); 737 if (ret) 738 goto fail; 739 } 740 741 ret = tmio_mmc_start_command(host, mrq->cmd); 742 if (!ret) { 743 schedule_delayed_work(&host->delayed_reset_work, 744 msecs_to_jiffies(2000)); 745 return; 746 } 747 748fail: 749 host->force_pio = false; 750 host->mrq = NULL; 751 mrq->cmd->error = ret; 752 mmc_request_done(mmc, mrq); 753} 754 755static int tmio_mmc_clk_update(struct mmc_host *mmc) 756{ 757 struct tmio_mmc_host *host = mmc_priv(mmc); 758 struct tmio_mmc_data *pdata = host->pdata; 759 int ret; 760 761 if (!pdata->clk_enable) 762 return -ENOTSUPP; 763 764 ret = pdata->clk_enable(host->pdev, &mmc->f_max); 765 if (!ret) 766 mmc->f_min = mmc->f_max / 512; 767 768 return ret; 769} 770 771static void tmio_mmc_set_power(struct tmio_mmc_host *host, struct mmc_ios *ios) 772{ 773 struct mmc_host *mmc = host->mmc; 774 775 if (host->set_pwr) 776 host->set_pwr(host->pdev, ios->power_mode != MMC_POWER_OFF); 777 if (!IS_ERR(mmc->supply.vmmc)) 778 /* Errors ignored... */ 779 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 780 ios->power_mode ? ios->vdd : 0); 781} 782 783/* Set MMC clock / power. 784 * Note: This controller uses a simple divider scheme therefore it cannot 785 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 786 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 787 * slowest setting. 788 */ 789static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 790{ 791 struct tmio_mmc_host *host = mmc_priv(mmc); 792 struct device *dev = &host->pdev->dev; 793 unsigned long flags; 794 795 mutex_lock(&host->ios_lock); 796 797 spin_lock_irqsave(&host->lock, flags); 798 if (host->mrq) { 799 if (IS_ERR(host->mrq)) { 800 dev_dbg(dev, 801 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 802 current->comm, task_pid_nr(current), 803 ios->clock, ios->power_mode); 804 host->mrq = ERR_PTR(-EINTR); 805 } else { 806 dev_dbg(dev, 807 "%s.%d: CMD%u active since %lu, now %lu!\n", 808 current->comm, task_pid_nr(current), 809 host->mrq->cmd->opcode, host->last_req_ts, jiffies); 810 } 811 spin_unlock_irqrestore(&host->lock, flags); 812 813 mutex_unlock(&host->ios_lock); 814 return; 815 } 816 817 host->mrq = ERR_PTR(-EBUSY); 818 819 spin_unlock_irqrestore(&host->lock, flags); 820 821 /* 822 * host->power toggles between false and true in both cases - either 823 * or not the controller can be runtime-suspended during inactivity. 824 * But if the controller has to be kept on, the runtime-pm usage_count 825 * is kept positive, so no suspending actually takes place. 826 */ 827 if (ios->power_mode == MMC_POWER_ON && ios->clock) { 828 if (!host->power) { 829 tmio_mmc_clk_update(mmc); 830 pm_runtime_get_sync(dev); 831 host->power = true; 832 } 833 tmio_mmc_set_clock(host, ios->clock); 834 /* power up SD bus */ 835 tmio_mmc_set_power(host, ios); 836 /* start bus clock */ 837 tmio_mmc_clk_start(host); 838 } else if (ios->power_mode != MMC_POWER_UP) { 839 if (ios->power_mode == MMC_POWER_OFF) 840 tmio_mmc_set_power(host, ios); 841 if (host->power) { 842 struct tmio_mmc_data *pdata = host->pdata; 843 tmio_mmc_clk_stop(host); 844 host->power = false; 845 pm_runtime_put(dev); 846 if (pdata->clk_disable) 847 pdata->clk_disable(host->pdev); 848 } 849 } 850 851 if (host->power) { 852 switch (ios->bus_width) { 853 case MMC_BUS_WIDTH_1: 854 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); 855 break; 856 case MMC_BUS_WIDTH_4: 857 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); 858 break; 859 } 860 } 861 862 /* Let things settle. delay taken from winCE driver */ 863 udelay(140); 864 if (PTR_ERR(host->mrq) == -EINTR) 865 dev_dbg(&host->pdev->dev, 866 "%s.%d: IOS interrupted: clk %u, mode %u", 867 current->comm, task_pid_nr(current), 868 ios->clock, ios->power_mode); 869 host->mrq = NULL; 870 871 mutex_unlock(&host->ios_lock); 872} 873 874static int tmio_mmc_get_ro(struct mmc_host *mmc) 875{ 876 struct tmio_mmc_host *host = mmc_priv(mmc); 877 struct tmio_mmc_data *pdata = host->pdata; 878 int ret = mmc_gpio_get_ro(mmc); 879 if (ret >= 0) 880 return ret; 881 882 return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || 883 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); 884} 885 886static int tmio_mmc_get_cd(struct mmc_host *mmc) 887{ 888 struct tmio_mmc_host *host = mmc_priv(mmc); 889 struct tmio_mmc_data *pdata = host->pdata; 890 int ret = mmc_gpio_get_cd(mmc); 891 if (ret >= 0) 892 return ret; 893 894 if (!pdata->get_cd) 895 return -ENOSYS; 896 else 897 return pdata->get_cd(host->pdev); 898} 899 900static const struct mmc_host_ops tmio_mmc_ops = { 901 .request = tmio_mmc_request, 902 .set_ios = tmio_mmc_set_ios, 903 .get_ro = tmio_mmc_get_ro, 904 .get_cd = tmio_mmc_get_cd, 905 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 906}; 907 908static void tmio_mmc_init_ocr(struct tmio_mmc_host *host) 909{ 910 struct tmio_mmc_data *pdata = host->pdata; 911 struct mmc_host *mmc = host->mmc; 912 913 mmc_regulator_get_supply(mmc); 914 915 if (!mmc->ocr_avail) 916 mmc->ocr_avail = pdata->ocr_mask ? : MMC_VDD_32_33 | MMC_VDD_33_34; 917 else if (pdata->ocr_mask) 918 dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n"); 919} 920 921int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host, 922 struct platform_device *pdev, 923 struct tmio_mmc_data *pdata) 924{ 925 struct tmio_mmc_host *_host; 926 struct mmc_host *mmc; 927 struct resource *res_ctl; 928 int ret; 929 u32 irq_mask = TMIO_MASK_CMD; 930 931 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0); 932 if (!res_ctl) 933 return -EINVAL; 934 935 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev); 936 if (!mmc) 937 return -ENOMEM; 938 939 pdata->dev = &pdev->dev; 940 _host = mmc_priv(mmc); 941 _host->pdata = pdata; 942 _host->mmc = mmc; 943 _host->pdev = pdev; 944 platform_set_drvdata(pdev, mmc); 945 946 _host->set_pwr = pdata->set_pwr; 947 _host->set_clk_div = pdata->set_clk_div; 948 949 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */ 950 _host->bus_shift = resource_size(res_ctl) >> 10; 951 952 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl)); 953 if (!_host->ctl) { 954 ret = -ENOMEM; 955 goto host_free; 956 } 957 958 mmc->ops = &tmio_mmc_ops; 959 mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities; 960 mmc->caps2 = pdata->capabilities2; 961 mmc->max_segs = 32; 962 mmc->max_blk_size = 512; 963 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) * 964 mmc->max_segs; 965 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 966 mmc->max_seg_size = mmc->max_req_size; 967 tmio_mmc_init_ocr(_host); 968 969 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD || 970 mmc->caps & MMC_CAP_NEEDS_POLL || 971 mmc->caps & MMC_CAP_NONREMOVABLE); 972 973 _host->power = false; 974 pm_runtime_enable(&pdev->dev); 975 ret = pm_runtime_resume(&pdev->dev); 976 if (ret < 0) 977 goto pm_disable; 978 979 if (tmio_mmc_clk_update(mmc) < 0) { 980 mmc->f_max = pdata->hclk; 981 mmc->f_min = mmc->f_max / 512; 982 } 983 984 /* 985 * There are 4 different scenarios for the card detection: 986 * 1) an external gpio irq handles the cd (best for power savings) 987 * 2) internal sdhi irq handles the cd 988 * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL 989 * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE 990 * 991 * While we increment the runtime PM counter for all scenarios when 992 * the mmc core activates us by calling an appropriate set_ios(), we 993 * must additionally ensure that in case 2) the tmio mmc hardware stays 994 * powered on during runtime for the card detection to work. 995 */ 996 if (_host->native_hotplug) 997 pm_runtime_get_noresume(&pdev->dev); 998 999 tmio_mmc_clk_stop(_host); 1000 tmio_mmc_reset(_host); 1001 1002 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK); 1003 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 1004 1005 /* Unmask the IRQs we want to know about */ 1006 if (!_host->chan_rx) 1007 irq_mask |= TMIO_MASK_READOP; 1008 if (!_host->chan_tx) 1009 irq_mask |= TMIO_MASK_WRITEOP; 1010 if (!_host->native_hotplug) 1011 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1012 1013 _host->sdcard_irq_mask &= ~irq_mask; 1014 1015 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1016 tmio_mmc_enable_sdio_irq(mmc, 0); 1017 1018 spin_lock_init(&_host->lock); 1019 mutex_init(&_host->ios_lock); 1020 1021 /* Init delayed work for request timeouts */ 1022 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1023 INIT_WORK(&_host->done, tmio_mmc_done_work); 1024 1025 /* See if we also get DMA */ 1026 tmio_mmc_request_dma(_host, pdata); 1027 1028 ret = mmc_add_host(mmc); 1029 if (pdata->clk_disable) 1030 pdata->clk_disable(pdev); 1031 if (ret < 0) { 1032 tmio_mmc_host_remove(_host); 1033 return ret; 1034 } 1035 1036 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1037 1038 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) { 1039 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio); 1040 if (ret < 0) { 1041 tmio_mmc_host_remove(_host); 1042 return ret; 1043 } 1044 } 1045 1046 *host = _host; 1047 1048 return 0; 1049 1050pm_disable: 1051 pm_runtime_disable(&pdev->dev); 1052 iounmap(_host->ctl); 1053host_free: 1054 mmc_free_host(mmc); 1055 1056 return ret; 1057} 1058EXPORT_SYMBOL(tmio_mmc_host_probe); 1059 1060void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1061{ 1062 struct platform_device *pdev = host->pdev; 1063 struct tmio_mmc_data *pdata = host->pdata; 1064 struct mmc_host *mmc = host->mmc; 1065 1066 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) 1067 /* 1068 * This means we can miss a card-eject, but this is anyway 1069 * possible, because of delayed processing of hotplug events. 1070 */ 1071 mmc_gpio_free_cd(mmc); 1072 1073 if (!host->native_hotplug) 1074 pm_runtime_get_sync(&pdev->dev); 1075 1076 dev_pm_qos_hide_latency_limit(&pdev->dev); 1077 1078 mmc_remove_host(mmc); 1079 cancel_work_sync(&host->done); 1080 cancel_delayed_work_sync(&host->delayed_reset_work); 1081 tmio_mmc_release_dma(host); 1082 1083 pm_runtime_put_sync(&pdev->dev); 1084 pm_runtime_disable(&pdev->dev); 1085 1086 iounmap(host->ctl); 1087 mmc_free_host(mmc); 1088} 1089EXPORT_SYMBOL(tmio_mmc_host_remove); 1090 1091#ifdef CONFIG_PM 1092int tmio_mmc_host_suspend(struct device *dev) 1093{ 1094 struct mmc_host *mmc = dev_get_drvdata(dev); 1095 struct tmio_mmc_host *host = mmc_priv(mmc); 1096 int ret = mmc_suspend_host(mmc); 1097 1098 if (!ret) 1099 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL); 1100 1101 return ret; 1102} 1103EXPORT_SYMBOL(tmio_mmc_host_suspend); 1104 1105int tmio_mmc_host_resume(struct device *dev) 1106{ 1107 struct mmc_host *mmc = dev_get_drvdata(dev); 1108 struct tmio_mmc_host *host = mmc_priv(mmc); 1109 1110 tmio_mmc_reset(host); 1111 tmio_mmc_enable_dma(host, true); 1112 1113 /* The MMC core will perform the complete set up */ 1114 return mmc_resume_host(mmc); 1115} 1116EXPORT_SYMBOL(tmio_mmc_host_resume); 1117 1118#endif /* CONFIG_PM */ 1119 1120int tmio_mmc_host_runtime_suspend(struct device *dev) 1121{ 1122 return 0; 1123} 1124EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend); 1125 1126int tmio_mmc_host_runtime_resume(struct device *dev) 1127{ 1128 struct mmc_host *mmc = dev_get_drvdata(dev); 1129 struct tmio_mmc_host *host = mmc_priv(mmc); 1130 1131 tmio_mmc_reset(host); 1132 tmio_mmc_enable_dma(host, true); 1133 1134 return 0; 1135} 1136EXPORT_SYMBOL(tmio_mmc_host_runtime_resume); 1137 1138MODULE_LICENSE("GPL v2");