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at v3.6-rc3 526 lines 12 kB view raw
1/* 2 * SuperH Pin Function Controller pinmux support. 3 * 4 * Copyright (C) 2012 Paul Mundt 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file "COPYING" in the main directory of this archive 8 * for more details. 9 */ 10#define DRV_NAME "pinctrl-sh_pfc" 11 12#define pr_fmt(fmt) DRV_NAME " " KBUILD_MODNAME ": " fmt 13 14#include <linux/init.h> 15#include <linux/module.h> 16#include <linux/sh_pfc.h> 17#include <linux/err.h> 18#include <linux/slab.h> 19#include <linux/spinlock.h> 20#include <linux/platform_device.h> 21#include <linux/pinctrl/consumer.h> 22#include <linux/pinctrl/pinctrl.h> 23#include <linux/pinctrl/pinconf.h> 24#include <linux/pinctrl/pinmux.h> 25#include <linux/pinctrl/pinconf-generic.h> 26 27struct sh_pfc_pinctrl { 28 struct pinctrl_dev *pctl; 29 struct sh_pfc *pfc; 30 31 struct pinmux_gpio **functions; 32 unsigned int nr_functions; 33 34 struct pinctrl_pin_desc *pads; 35 unsigned int nr_pads; 36 37 spinlock_t lock; 38}; 39 40static struct sh_pfc_pinctrl *sh_pfc_pmx; 41 42static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev) 43{ 44 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 45 46 return pmx->nr_pads; 47} 48 49static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev, 50 unsigned selector) 51{ 52 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 53 54 return pmx->pads[selector].name; 55} 56 57static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group, 58 const unsigned **pins, unsigned *num_pins) 59{ 60 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 61 62 *pins = &pmx->pads[group].number; 63 *num_pins = 1; 64 65 return 0; 66} 67 68static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, 69 unsigned offset) 70{ 71 seq_printf(s, "%s", DRV_NAME); 72} 73 74static struct pinctrl_ops sh_pfc_pinctrl_ops = { 75 .get_groups_count = sh_pfc_get_groups_count, 76 .get_group_name = sh_pfc_get_group_name, 77 .get_group_pins = sh_pfc_get_group_pins, 78 .pin_dbg_show = sh_pfc_pin_dbg_show, 79}; 80 81static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev) 82{ 83 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 84 85 return pmx->nr_functions; 86} 87 88static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev, 89 unsigned selector) 90{ 91 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 92 93 return pmx->functions[selector]->name; 94} 95 96static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func, 97 const char * const **groups, 98 unsigned * const num_groups) 99{ 100 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 101 102 *groups = &pmx->functions[func]->name; 103 *num_groups = 1; 104 105 return 0; 106} 107 108static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func, 109 unsigned group) 110{ 111 return 0; 112} 113 114static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func, 115 unsigned group) 116{ 117} 118 119static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset) 120{ 121 if (sh_pfc_config_gpio(pfc, offset, 122 PINMUX_TYPE_FUNCTION, 123 GPIO_CFG_DRYRUN) != 0) 124 return -EINVAL; 125 126 if (sh_pfc_config_gpio(pfc, offset, 127 PINMUX_TYPE_FUNCTION, 128 GPIO_CFG_REQ) != 0) 129 return -EINVAL; 130 131 return 0; 132} 133 134static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset, 135 int new_type) 136{ 137 unsigned long flags; 138 int pinmux_type; 139 int ret = -EINVAL; 140 141 spin_lock_irqsave(&pfc->lock, flags); 142 143 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; 144 145 /* 146 * See if the present config needs to first be de-configured. 147 */ 148 switch (pinmux_type) { 149 case PINMUX_TYPE_GPIO: 150 break; 151 case PINMUX_TYPE_OUTPUT: 152 case PINMUX_TYPE_INPUT: 153 case PINMUX_TYPE_INPUT_PULLUP: 154 case PINMUX_TYPE_INPUT_PULLDOWN: 155 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); 156 break; 157 default: 158 goto err; 159 } 160 161 /* 162 * Dry run 163 */ 164 if (sh_pfc_config_gpio(pfc, offset, new_type, 165 GPIO_CFG_DRYRUN) != 0) 166 goto err; 167 168 /* 169 * Request 170 */ 171 if (sh_pfc_config_gpio(pfc, offset, new_type, 172 GPIO_CFG_REQ) != 0) 173 goto err; 174 175 pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE; 176 pfc->gpios[offset].flags |= new_type; 177 178 ret = 0; 179 180err: 181 spin_unlock_irqrestore(&pfc->lock, flags); 182 183 return ret; 184} 185 186 187static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev, 188 struct pinctrl_gpio_range *range, 189 unsigned offset) 190{ 191 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 192 struct sh_pfc *pfc = pmx->pfc; 193 unsigned long flags; 194 int ret, pinmux_type; 195 196 spin_lock_irqsave(&pfc->lock, flags); 197 198 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; 199 200 switch (pinmux_type) { 201 case PINMUX_TYPE_FUNCTION: 202 pr_notice_once("Use of GPIO API for function requests is " 203 "deprecated, convert to pinctrl\n"); 204 /* handle for now */ 205 ret = sh_pfc_config_function(pfc, offset); 206 if (unlikely(ret < 0)) 207 goto err; 208 209 break; 210 case PINMUX_TYPE_GPIO: 211 break; 212 default: 213 pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type); 214 return -ENOTSUPP; 215 } 216 217 ret = 0; 218 219err: 220 spin_unlock_irqrestore(&pfc->lock, flags); 221 222 return ret; 223} 224 225static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev, 226 struct pinctrl_gpio_range *range, 227 unsigned offset) 228{ 229 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 230 struct sh_pfc *pfc = pmx->pfc; 231 unsigned long flags; 232 int pinmux_type; 233 234 spin_lock_irqsave(&pfc->lock, flags); 235 236 pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE; 237 238 sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE); 239 240 spin_unlock_irqrestore(&pfc->lock, flags); 241} 242 243static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev, 244 struct pinctrl_gpio_range *range, 245 unsigned offset, bool input) 246{ 247 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 248 int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT; 249 250 return sh_pfc_reconfig_pin(pmx->pfc, offset, type); 251} 252 253static struct pinmux_ops sh_pfc_pinmux_ops = { 254 .get_functions_count = sh_pfc_get_functions_count, 255 .get_function_name = sh_pfc_get_function_name, 256 .get_function_groups = sh_pfc_get_function_groups, 257 .enable = sh_pfc_noop_enable, 258 .disable = sh_pfc_noop_disable, 259 .gpio_request_enable = sh_pfc_gpio_request_enable, 260 .gpio_disable_free = sh_pfc_gpio_disable_free, 261 .gpio_set_direction = sh_pfc_gpio_set_direction, 262}; 263 264static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, 265 unsigned long *config) 266{ 267 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 268 struct sh_pfc *pfc = pmx->pfc; 269 270 *config = pfc->gpios[pin].flags & PINMUX_FLAG_TYPE; 271 272 return 0; 273} 274 275static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, 276 unsigned long config) 277{ 278 struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev); 279 280 /* Validate the new type */ 281 if (config >= PINMUX_FLAG_TYPE) 282 return -EINVAL; 283 284 return sh_pfc_reconfig_pin(pmx->pfc, pin, config); 285} 286 287static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev, 288 struct seq_file *s, unsigned pin) 289{ 290 const char *pinmux_type_str[] = { 291 [PINMUX_TYPE_NONE] = "none", 292 [PINMUX_TYPE_FUNCTION] = "function", 293 [PINMUX_TYPE_GPIO] = "gpio", 294 [PINMUX_TYPE_OUTPUT] = "output", 295 [PINMUX_TYPE_INPUT] = "input", 296 [PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up", 297 [PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down", 298 }; 299 unsigned long config; 300 int rc; 301 302 rc = sh_pfc_pinconf_get(pctldev, pin, &config); 303 if (unlikely(rc != 0)) 304 return; 305 306 seq_printf(s, " %s", pinmux_type_str[config]); 307} 308 309static struct pinconf_ops sh_pfc_pinconf_ops = { 310 .pin_config_get = sh_pfc_pinconf_get, 311 .pin_config_set = sh_pfc_pinconf_set, 312 .pin_config_dbg_show = sh_pfc_pinconf_dbg_show, 313}; 314 315static struct pinctrl_gpio_range sh_pfc_gpio_range = { 316 .name = DRV_NAME, 317 .id = 0, 318}; 319 320static struct pinctrl_desc sh_pfc_pinctrl_desc = { 321 .name = DRV_NAME, 322 .owner = THIS_MODULE, 323 .pctlops = &sh_pfc_pinctrl_ops, 324 .pmxops = &sh_pfc_pinmux_ops, 325 .confops = &sh_pfc_pinconf_ops, 326}; 327 328static inline void __devinit sh_pfc_map_one_gpio(struct sh_pfc *pfc, 329 struct sh_pfc_pinctrl *pmx, 330 struct pinmux_gpio *gpio, 331 unsigned offset) 332{ 333 struct pinmux_data_reg *dummy; 334 unsigned long flags; 335 int bit; 336 337 gpio->flags &= ~PINMUX_FLAG_TYPE; 338 339 if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0) 340 gpio->flags |= PINMUX_TYPE_GPIO; 341 else { 342 gpio->flags |= PINMUX_TYPE_FUNCTION; 343 344 spin_lock_irqsave(&pmx->lock, flags); 345 pmx->nr_functions++; 346 spin_unlock_irqrestore(&pmx->lock, flags); 347 } 348} 349 350/* pinmux ranges -> pinctrl pin descs */ 351static int __devinit sh_pfc_map_gpios(struct sh_pfc *pfc, 352 struct sh_pfc_pinctrl *pmx) 353{ 354 unsigned long flags; 355 int i; 356 357 pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1; 358 359 pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads, 360 GFP_KERNEL); 361 if (unlikely(!pmx->pads)) { 362 pmx->nr_pads = 0; 363 return -ENOMEM; 364 } 365 366 spin_lock_irqsave(&pfc->lock, flags); 367 368 /* 369 * We don't necessarily have a 1:1 mapping between pin and linux 370 * GPIO number, as the latter maps to the associated enum_id. 371 * Care needs to be taken to translate back to pin space when 372 * dealing with any pin configurations. 373 */ 374 for (i = 0; i < pmx->nr_pads; i++) { 375 struct pinctrl_pin_desc *pin = pmx->pads + i; 376 struct pinmux_gpio *gpio = pfc->gpios + i; 377 378 pin->number = pfc->first_gpio + i; 379 pin->name = gpio->name; 380 381 /* XXX */ 382 if (unlikely(!gpio->enum_id)) 383 continue; 384 385 sh_pfc_map_one_gpio(pfc, pmx, gpio, i); 386 } 387 388 spin_unlock_irqrestore(&pfc->lock, flags); 389 390 sh_pfc_pinctrl_desc.pins = pmx->pads; 391 sh_pfc_pinctrl_desc.npins = pmx->nr_pads; 392 393 return 0; 394} 395 396static int __devinit sh_pfc_map_functions(struct sh_pfc *pfc, 397 struct sh_pfc_pinctrl *pmx) 398{ 399 unsigned long flags; 400 int i, fn; 401 402 pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *), 403 GFP_KERNEL); 404 if (unlikely(!pmx->functions)) 405 return -ENOMEM; 406 407 spin_lock_irqsave(&pmx->lock, flags); 408 409 for (i = fn = 0; i < pmx->nr_pads; i++) { 410 struct pinmux_gpio *gpio = pfc->gpios + i; 411 412 if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION) 413 pmx->functions[fn++] = gpio; 414 } 415 416 spin_unlock_irqrestore(&pmx->lock, flags); 417 418 return 0; 419} 420 421static int __devinit sh_pfc_pinctrl_probe(struct platform_device *pdev) 422{ 423 struct sh_pfc *pfc; 424 int ret; 425 426 if (unlikely(!sh_pfc_pmx)) 427 return -ENODEV; 428 429 pfc = sh_pfc_pmx->pfc; 430 431 ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx); 432 if (unlikely(ret != 0)) 433 return ret; 434 435 ret = sh_pfc_map_functions(pfc, sh_pfc_pmx); 436 if (unlikely(ret != 0)) 437 goto free_pads; 438 439 sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev, 440 sh_pfc_pmx); 441 if (IS_ERR(sh_pfc_pmx->pctl)) { 442 ret = PTR_ERR(sh_pfc_pmx->pctl); 443 goto free_functions; 444 } 445 446 sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1; 447 sh_pfc_gpio_range.base = pfc->first_gpio; 448 sh_pfc_gpio_range.pin_base = pfc->first_gpio; 449 450 pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range); 451 452 platform_set_drvdata(pdev, sh_pfc_pmx); 453 454 return 0; 455 456free_functions: 457 kfree(sh_pfc_pmx->functions); 458free_pads: 459 kfree(sh_pfc_pmx->pads); 460 kfree(sh_pfc_pmx); 461 462 return ret; 463} 464 465static int __devexit sh_pfc_pinctrl_remove(struct platform_device *pdev) 466{ 467 struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev); 468 469 pinctrl_unregister(pmx->pctl); 470 471 platform_set_drvdata(pdev, NULL); 472 473 kfree(sh_pfc_pmx->functions); 474 kfree(sh_pfc_pmx->pads); 475 kfree(sh_pfc_pmx); 476 477 return 0; 478} 479 480static struct platform_driver sh_pfc_pinctrl_driver = { 481 .probe = sh_pfc_pinctrl_probe, 482 .remove = __devexit_p(sh_pfc_pinctrl_remove), 483 .driver = { 484 .name = DRV_NAME, 485 .owner = THIS_MODULE, 486 }, 487}; 488 489static struct platform_device sh_pfc_pinctrl_device = { 490 .name = DRV_NAME, 491 .id = -1, 492}; 493 494static int sh_pfc_pinctrl_init(void) 495{ 496 int rc; 497 498 rc = platform_driver_register(&sh_pfc_pinctrl_driver); 499 if (likely(!rc)) { 500 rc = platform_device_register(&sh_pfc_pinctrl_device); 501 if (unlikely(rc)) 502 platform_driver_unregister(&sh_pfc_pinctrl_driver); 503 } 504 505 return rc; 506} 507 508int sh_pfc_register_pinctrl(struct sh_pfc *pfc) 509{ 510 sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL); 511 if (unlikely(!sh_pfc_pmx)) 512 return -ENOMEM; 513 514 spin_lock_init(&sh_pfc_pmx->lock); 515 516 sh_pfc_pmx->pfc = pfc; 517 518 return sh_pfc_pinctrl_init(); 519} 520EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl); 521 522static void __exit sh_pfc_pinctrl_exit(void) 523{ 524 platform_driver_unregister(&sh_pfc_pinctrl_driver); 525} 526module_exit(sh_pfc_pinctrl_exit);