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1/* 2 * irq_comm.c: Common API for in kernel interrupt controller 3 * Copyright (c) 2007, Intel Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple 16 * Place - Suite 330, Boston, MA 02111-1307 USA. 17 * Authors: 18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com> 19 * 20 * Copyright 2010 Red Hat, Inc. and/or its affiliates. 21 */ 22 23#include <linux/kvm_host.h> 24#include <linux/slab.h> 25#include <trace/events/kvm.h> 26 27#include <asm/msidef.h> 28#ifdef CONFIG_IA64 29#include <asm/iosapic.h> 30#endif 31 32#include "irq.h" 33 34#include "ioapic.h" 35 36static inline int kvm_irq_line_state(unsigned long *irq_state, 37 int irq_source_id, int level) 38{ 39 /* Logical OR for level trig interrupt */ 40 if (level) 41 set_bit(irq_source_id, irq_state); 42 else 43 clear_bit(irq_source_id, irq_state); 44 45 return !!(*irq_state); 46} 47 48static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e, 49 struct kvm *kvm, int irq_source_id, int level) 50{ 51#ifdef CONFIG_X86 52 struct kvm_pic *pic = pic_irqchip(kvm); 53 level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin], 54 irq_source_id, level); 55 return kvm_pic_set_irq(pic, e->irqchip.pin, level); 56#else 57 return -1; 58#endif 59} 60 61static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e, 62 struct kvm *kvm, int irq_source_id, int level) 63{ 64 struct kvm_ioapic *ioapic = kvm->arch.vioapic; 65 level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin], 66 irq_source_id, level); 67 68 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level); 69} 70 71inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq) 72{ 73#ifdef CONFIG_IA64 74 return irq->delivery_mode == 75 (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT); 76#else 77 return irq->delivery_mode == APIC_DM_LOWEST; 78#endif 79} 80 81int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, 82 struct kvm_lapic_irq *irq) 83{ 84 int i, r = -1; 85 struct kvm_vcpu *vcpu, *lowest = NULL; 86 87 if (irq->dest_mode == 0 && irq->dest_id == 0xff && 88 kvm_is_dm_lowest_prio(irq)) 89 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n"); 90 91 kvm_for_each_vcpu(i, vcpu, kvm) { 92 if (!kvm_apic_present(vcpu)) 93 continue; 94 95 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, 96 irq->dest_id, irq->dest_mode)) 97 continue; 98 99 if (!kvm_is_dm_lowest_prio(irq)) { 100 if (r < 0) 101 r = 0; 102 r += kvm_apic_set_irq(vcpu, irq); 103 } else if (kvm_lapic_enabled(vcpu)) { 104 if (!lowest) 105 lowest = vcpu; 106 else if (kvm_apic_compare_prio(vcpu, lowest) < 0) 107 lowest = vcpu; 108 } 109 } 110 111 if (lowest) 112 r = kvm_apic_set_irq(lowest, irq); 113 114 return r; 115} 116 117int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, 118 struct kvm *kvm, int irq_source_id, int level) 119{ 120 struct kvm_lapic_irq irq; 121 122 if (!level) 123 return -1; 124 125 trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data); 126 127 irq.dest_id = (e->msi.address_lo & 128 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; 129 irq.vector = (e->msi.data & 130 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; 131 irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo; 132 irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data; 133 irq.delivery_mode = e->msi.data & 0x700; 134 irq.level = 1; 135 irq.shorthand = 0; 136 137 /* TODO Deal with RH bit of MSI message address */ 138 return kvm_irq_delivery_to_apic(kvm, NULL, &irq); 139} 140 141int kvm_send_userspace_msi(struct kvm *kvm, struct kvm_msi *msi) 142{ 143 struct kvm_kernel_irq_routing_entry route; 144 145 if (!irqchip_in_kernel(kvm) || msi->flags != 0) 146 return -EINVAL; 147 148 route.msi.address_lo = msi->address_lo; 149 route.msi.address_hi = msi->address_hi; 150 route.msi.data = msi->data; 151 152 return kvm_set_msi(&route, kvm, KVM_USERSPACE_IRQ_SOURCE_ID, 1); 153} 154 155/* 156 * Return value: 157 * < 0 Interrupt was ignored (masked or not delivered for other reasons) 158 * = 0 Interrupt was coalesced (previous irq is still pending) 159 * > 0 Number of CPUs interrupt was delivered to 160 */ 161int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level) 162{ 163 struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS]; 164 int ret = -1, i = 0; 165 struct kvm_irq_routing_table *irq_rt; 166 struct hlist_node *n; 167 168 trace_kvm_set_irq(irq, level, irq_source_id); 169 170 /* Not possible to detect if the guest uses the PIC or the 171 * IOAPIC. So set the bit in both. The guest will ignore 172 * writes to the unused one. 173 */ 174 rcu_read_lock(); 175 irq_rt = rcu_dereference(kvm->irq_routing); 176 if (irq < irq_rt->nr_rt_entries) 177 hlist_for_each_entry(e, n, &irq_rt->map[irq], link) 178 irq_set[i++] = *e; 179 rcu_read_unlock(); 180 181 while(i--) { 182 int r; 183 r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level); 184 if (r < 0) 185 continue; 186 187 ret = r + ((ret < 0) ? 0 : ret); 188 } 189 190 return ret; 191} 192 193void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin) 194{ 195 struct kvm_irq_ack_notifier *kian; 196 struct hlist_node *n; 197 int gsi; 198 199 trace_kvm_ack_irq(irqchip, pin); 200 201 rcu_read_lock(); 202 gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin]; 203 if (gsi != -1) 204 hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list, 205 link) 206 if (kian->gsi == gsi) 207 kian->irq_acked(kian); 208 rcu_read_unlock(); 209} 210 211void kvm_register_irq_ack_notifier(struct kvm *kvm, 212 struct kvm_irq_ack_notifier *kian) 213{ 214 mutex_lock(&kvm->irq_lock); 215 hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list); 216 mutex_unlock(&kvm->irq_lock); 217} 218 219void kvm_unregister_irq_ack_notifier(struct kvm *kvm, 220 struct kvm_irq_ack_notifier *kian) 221{ 222 mutex_lock(&kvm->irq_lock); 223 hlist_del_init_rcu(&kian->link); 224 mutex_unlock(&kvm->irq_lock); 225 synchronize_rcu(); 226} 227 228int kvm_request_irq_source_id(struct kvm *kvm) 229{ 230 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap; 231 int irq_source_id; 232 233 mutex_lock(&kvm->irq_lock); 234 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG); 235 236 if (irq_source_id >= BITS_PER_LONG) { 237 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n"); 238 irq_source_id = -EFAULT; 239 goto unlock; 240 } 241 242 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); 243 set_bit(irq_source_id, bitmap); 244unlock: 245 mutex_unlock(&kvm->irq_lock); 246 247 return irq_source_id; 248} 249 250void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id) 251{ 252 int i; 253 254 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID); 255 256 mutex_lock(&kvm->irq_lock); 257 if (irq_source_id < 0 || 258 irq_source_id >= BITS_PER_LONG) { 259 printk(KERN_ERR "kvm: IRQ source ID out of range!\n"); 260 goto unlock; 261 } 262 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap); 263 if (!irqchip_in_kernel(kvm)) 264 goto unlock; 265 266 for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) { 267 clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]); 268 if (i >= 16) 269 continue; 270#ifdef CONFIG_X86 271 clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]); 272#endif 273 } 274unlock: 275 mutex_unlock(&kvm->irq_lock); 276} 277 278void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, 279 struct kvm_irq_mask_notifier *kimn) 280{ 281 mutex_lock(&kvm->irq_lock); 282 kimn->irq = irq; 283 hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list); 284 mutex_unlock(&kvm->irq_lock); 285} 286 287void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, 288 struct kvm_irq_mask_notifier *kimn) 289{ 290 mutex_lock(&kvm->irq_lock); 291 hlist_del_rcu(&kimn->link); 292 mutex_unlock(&kvm->irq_lock); 293 synchronize_rcu(); 294} 295 296void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin, 297 bool mask) 298{ 299 struct kvm_irq_mask_notifier *kimn; 300 struct hlist_node *n; 301 int gsi; 302 303 rcu_read_lock(); 304 gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin]; 305 if (gsi != -1) 306 hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link) 307 if (kimn->irq == gsi) 308 kimn->func(kimn, mask); 309 rcu_read_unlock(); 310} 311 312void kvm_free_irq_routing(struct kvm *kvm) 313{ 314 /* Called only during vm destruction. Nobody can use the pointer 315 at this stage */ 316 kfree(kvm->irq_routing); 317} 318 319static int setup_routing_entry(struct kvm_irq_routing_table *rt, 320 struct kvm_kernel_irq_routing_entry *e, 321 const struct kvm_irq_routing_entry *ue) 322{ 323 int r = -EINVAL; 324 int delta; 325 unsigned max_pin; 326 struct kvm_kernel_irq_routing_entry *ei; 327 struct hlist_node *n; 328 329 /* 330 * Do not allow GSI to be mapped to the same irqchip more than once. 331 * Allow only one to one mapping between GSI and MSI. 332 */ 333 hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link) 334 if (ei->type == KVM_IRQ_ROUTING_MSI || 335 ue->type == KVM_IRQ_ROUTING_MSI || 336 ue->u.irqchip.irqchip == ei->irqchip.irqchip) 337 return r; 338 339 e->gsi = ue->gsi; 340 e->type = ue->type; 341 switch (ue->type) { 342 case KVM_IRQ_ROUTING_IRQCHIP: 343 delta = 0; 344 switch (ue->u.irqchip.irqchip) { 345 case KVM_IRQCHIP_PIC_MASTER: 346 e->set = kvm_set_pic_irq; 347 max_pin = 16; 348 break; 349 case KVM_IRQCHIP_PIC_SLAVE: 350 e->set = kvm_set_pic_irq; 351 max_pin = 16; 352 delta = 8; 353 break; 354 case KVM_IRQCHIP_IOAPIC: 355 max_pin = KVM_IOAPIC_NUM_PINS; 356 e->set = kvm_set_ioapic_irq; 357 break; 358 default: 359 goto out; 360 } 361 e->irqchip.irqchip = ue->u.irqchip.irqchip; 362 e->irqchip.pin = ue->u.irqchip.pin + delta; 363 if (e->irqchip.pin >= max_pin) 364 goto out; 365 rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi; 366 break; 367 case KVM_IRQ_ROUTING_MSI: 368 e->set = kvm_set_msi; 369 e->msi.address_lo = ue->u.msi.address_lo; 370 e->msi.address_hi = ue->u.msi.address_hi; 371 e->msi.data = ue->u.msi.data; 372 break; 373 default: 374 goto out; 375 } 376 377 hlist_add_head(&e->link, &rt->map[e->gsi]); 378 r = 0; 379out: 380 return r; 381} 382 383 384int kvm_set_irq_routing(struct kvm *kvm, 385 const struct kvm_irq_routing_entry *ue, 386 unsigned nr, 387 unsigned flags) 388{ 389 struct kvm_irq_routing_table *new, *old; 390 u32 i, j, nr_rt_entries = 0; 391 int r; 392 393 for (i = 0; i < nr; ++i) { 394 if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES) 395 return -EINVAL; 396 nr_rt_entries = max(nr_rt_entries, ue[i].gsi); 397 } 398 399 nr_rt_entries += 1; 400 401 new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head)) 402 + (nr * sizeof(struct kvm_kernel_irq_routing_entry)), 403 GFP_KERNEL); 404 405 if (!new) 406 return -ENOMEM; 407 408 new->rt_entries = (void *)&new->map[nr_rt_entries]; 409 410 new->nr_rt_entries = nr_rt_entries; 411 for (i = 0; i < 3; i++) 412 for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++) 413 new->chip[i][j] = -1; 414 415 for (i = 0; i < nr; ++i) { 416 r = -EINVAL; 417 if (ue->flags) 418 goto out; 419 r = setup_routing_entry(new, &new->rt_entries[i], ue); 420 if (r) 421 goto out; 422 ++ue; 423 } 424 425 mutex_lock(&kvm->irq_lock); 426 old = kvm->irq_routing; 427 kvm_irq_routing_update(kvm, new); 428 mutex_unlock(&kvm->irq_lock); 429 430 synchronize_rcu(); 431 432 new = old; 433 r = 0; 434 435out: 436 kfree(new); 437 return r; 438} 439 440#define IOAPIC_ROUTING_ENTRY(irq) \ 441 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ 442 .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) } 443#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq) 444 445#ifdef CONFIG_X86 446# define PIC_ROUTING_ENTRY(irq) \ 447 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \ 448 .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 } 449# define ROUTING_ENTRY2(irq) \ 450 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq) 451#else 452# define ROUTING_ENTRY2(irq) \ 453 IOAPIC_ROUTING_ENTRY(irq) 454#endif 455 456static const struct kvm_irq_routing_entry default_routing[] = { 457 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1), 458 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3), 459 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5), 460 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7), 461 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9), 462 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11), 463 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13), 464 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15), 465 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17), 466 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19), 467 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21), 468 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23), 469#ifdef CONFIG_IA64 470 ROUTING_ENTRY1(24), ROUTING_ENTRY1(25), 471 ROUTING_ENTRY1(26), ROUTING_ENTRY1(27), 472 ROUTING_ENTRY1(28), ROUTING_ENTRY1(29), 473 ROUTING_ENTRY1(30), ROUTING_ENTRY1(31), 474 ROUTING_ENTRY1(32), ROUTING_ENTRY1(33), 475 ROUTING_ENTRY1(34), ROUTING_ENTRY1(35), 476 ROUTING_ENTRY1(36), ROUTING_ENTRY1(37), 477 ROUTING_ENTRY1(38), ROUTING_ENTRY1(39), 478 ROUTING_ENTRY1(40), ROUTING_ENTRY1(41), 479 ROUTING_ENTRY1(42), ROUTING_ENTRY1(43), 480 ROUTING_ENTRY1(44), ROUTING_ENTRY1(45), 481 ROUTING_ENTRY1(46), ROUTING_ENTRY1(47), 482#endif 483}; 484 485int kvm_setup_default_irq_routing(struct kvm *kvm) 486{ 487 return kvm_set_irq_routing(kvm, default_routing, 488 ARRAY_SIZE(default_routing), 0); 489}