Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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kernel
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linux
1#ifndef __SH_CLOCK_H
2#define __SH_CLOCK_H
3
4#include <linux/list.h>
5#include <linux/seq_file.h>
6#include <linux/cpufreq.h>
7#include <linux/types.h>
8#include <linux/kref.h>
9#include <linux/clk.h>
10#include <linux/err.h>
11
12struct clk;
13
14struct clk_mapping {
15 phys_addr_t phys;
16 void __iomem *base;
17 unsigned long len;
18 struct kref ref;
19};
20
21
22struct sh_clk_ops {
23#ifdef CONFIG_SH_CLK_CPG_LEGACY
24 void (*init)(struct clk *clk);
25#endif
26 int (*enable)(struct clk *clk);
27 void (*disable)(struct clk *clk);
28 unsigned long (*recalc)(struct clk *clk);
29 int (*set_rate)(struct clk *clk, unsigned long rate);
30 int (*set_parent)(struct clk *clk, struct clk *parent);
31 long (*round_rate)(struct clk *clk, unsigned long rate);
32};
33
34struct clk {
35 struct list_head node;
36 struct clk *parent;
37 struct clk **parent_table; /* list of parents to */
38 unsigned short parent_num; /* choose between */
39 unsigned char src_shift; /* source clock field in the */
40 unsigned char src_width; /* configuration register */
41 struct sh_clk_ops *ops;
42
43 struct list_head children;
44 struct list_head sibling; /* node for children */
45
46 int usecount;
47
48 unsigned long rate;
49 unsigned long flags;
50
51 void __iomem *enable_reg;
52 unsigned int enable_bit;
53 void __iomem *mapped_reg;
54
55 unsigned long arch_flags;
56 void *priv;
57 struct clk_mapping *mapping;
58 struct cpufreq_frequency_table *freq_table;
59 unsigned int nr_freqs;
60};
61
62#define CLK_ENABLE_ON_INIT (1 << 0)
63
64/* drivers/sh/clk.c */
65unsigned long followparent_recalc(struct clk *);
66void recalculate_root_clocks(void);
67void propagate_rate(struct clk *);
68int clk_reparent(struct clk *child, struct clk *parent);
69int clk_register(struct clk *);
70void clk_unregister(struct clk *);
71void clk_enable_init_clocks(void);
72
73struct clk_div_mult_table {
74 unsigned int *divisors;
75 unsigned int nr_divisors;
76 unsigned int *multipliers;
77 unsigned int nr_multipliers;
78};
79
80struct cpufreq_frequency_table;
81void clk_rate_table_build(struct clk *clk,
82 struct cpufreq_frequency_table *freq_table,
83 int nr_freqs,
84 struct clk_div_mult_table *src_table,
85 unsigned long *bitmap);
86
87long clk_rate_table_round(struct clk *clk,
88 struct cpufreq_frequency_table *freq_table,
89 unsigned long rate);
90
91int clk_rate_table_find(struct clk *clk,
92 struct cpufreq_frequency_table *freq_table,
93 unsigned long rate);
94
95long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,
96 unsigned int div_max, unsigned long rate);
97
98long clk_rate_mult_range_round(struct clk *clk, unsigned int mult_min,
99 unsigned int mult_max, unsigned long rate);
100
101long clk_round_parent(struct clk *clk, unsigned long target,
102 unsigned long *best_freq, unsigned long *parent_freq,
103 unsigned int div_min, unsigned int div_max);
104
105#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
106{ \
107 .parent = _parent, \
108 .enable_reg = (void __iomem *)_enable_reg, \
109 .enable_bit = _enable_bit, \
110 .flags = _flags, \
111}
112
113int sh_clk_mstp32_register(struct clk *clks, int nr);
114
115#define SH_CLK_DIV4(_parent, _reg, _shift, _div_bitmap, _flags) \
116{ \
117 .parent = _parent, \
118 .enable_reg = (void __iomem *)_reg, \
119 .enable_bit = _shift, \
120 .arch_flags = _div_bitmap, \
121 .flags = _flags, \
122}
123
124struct clk_div4_table {
125 struct clk_div_mult_table *div_mult_table;
126 void (*kick)(struct clk *clk);
127};
128
129int sh_clk_div4_register(struct clk *clks, int nr,
130 struct clk_div4_table *table);
131int sh_clk_div4_enable_register(struct clk *clks, int nr,
132 struct clk_div4_table *table);
133int sh_clk_div4_reparent_register(struct clk *clks, int nr,
134 struct clk_div4_table *table);
135
136#define SH_CLK_DIV6_EXT(_reg, _flags, _parents, \
137 _num_parents, _src_shift, _src_width) \
138{ \
139 .enable_reg = (void __iomem *)_reg, \
140 .flags = _flags, \
141 .parent_table = _parents, \
142 .parent_num = _num_parents, \
143 .src_shift = _src_shift, \
144 .src_width = _src_width, \
145}
146
147#define SH_CLK_DIV6(_parent, _reg, _flags) \
148{ \
149 .parent = _parent, \
150 .enable_reg = (void __iomem *)_reg, \
151 .flags = _flags, \
152}
153
154int sh_clk_div6_register(struct clk *clks, int nr);
155int sh_clk_div6_reparent_register(struct clk *clks, int nr);
156
157#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
158#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
159#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
160
161#endif /* __SH_CLOCK_H */