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Linux kernel mirror (for testing)
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linux
1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
32#include "drmP.h"
33#include "drm.h"
34#include "radeon_drm.h"
35#include "radeon_drv.h"
36
37#include "drm_pciids.h"
38#include <linux/console.h>
39#include <linux/module.h>
40
41
42/*
43 * KMS wrapper.
44 * - 2.0.0 - initial interface
45 * - 2.1.0 - add square tiling interface
46 * - 2.2.0 - add r6xx/r7xx const buffer support
47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
48 * - 2.4.0 - add crtc id query
49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
54 * 2.10.0 - fusion 2D tiling
55 * 2.11.0 - backend map, initial compute support for the CS checker
56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
57 * 2.13.0 - virtual memory support
58 */
59#define KMS_DRIVER_MAJOR 2
60#define KMS_DRIVER_MINOR 13
61#define KMS_DRIVER_PATCHLEVEL 0
62int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
63int radeon_driver_unload_kms(struct drm_device *dev);
64int radeon_driver_firstopen_kms(struct drm_device *dev);
65void radeon_driver_lastclose_kms(struct drm_device *dev);
66int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
67void radeon_driver_postclose_kms(struct drm_device *dev,
68 struct drm_file *file_priv);
69void radeon_driver_preclose_kms(struct drm_device *dev,
70 struct drm_file *file_priv);
71int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
72int radeon_resume_kms(struct drm_device *dev);
73u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
74int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
75void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
76int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
77 int *max_error,
78 struct timeval *vblank_time,
79 unsigned flags);
80void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
81int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
82void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
83irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
84int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
85 struct drm_file *file_priv);
86int radeon_gem_object_init(struct drm_gem_object *obj);
87void radeon_gem_object_free(struct drm_gem_object *obj);
88int radeon_gem_object_open(struct drm_gem_object *obj,
89 struct drm_file *file_priv);
90void radeon_gem_object_close(struct drm_gem_object *obj,
91 struct drm_file *file_priv);
92extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
93 int *vpos, int *hpos);
94extern struct drm_ioctl_desc radeon_ioctls_kms[];
95extern int radeon_max_kms_ioctl;
96int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
97int radeon_mode_dumb_mmap(struct drm_file *filp,
98 struct drm_device *dev,
99 uint32_t handle, uint64_t *offset_p);
100int radeon_mode_dumb_create(struct drm_file *file_priv,
101 struct drm_device *dev,
102 struct drm_mode_create_dumb *args);
103int radeon_mode_dumb_destroy(struct drm_file *file_priv,
104 struct drm_device *dev,
105 uint32_t handle);
106
107#if defined(CONFIG_DEBUG_FS)
108int radeon_debugfs_init(struct drm_minor *minor);
109void radeon_debugfs_cleanup(struct drm_minor *minor);
110#endif
111
112
113int radeon_no_wb;
114int radeon_modeset = -1;
115int radeon_dynclks = -1;
116int radeon_r4xx_atom = 0;
117int radeon_agpmode = 0;
118int radeon_vram_limit = 0;
119int radeon_gart_size = 512; /* default gart size */
120int radeon_benchmarking = 0;
121int radeon_testing = 0;
122int radeon_connector_table = 0;
123int radeon_tv = 1;
124int radeon_audio = 0;
125int radeon_disp_priority = 0;
126int radeon_hw_i2c = 0;
127int radeon_pcie_gen2 = 0;
128int radeon_msi = -1;
129
130MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
131module_param_named(no_wb, radeon_no_wb, int, 0444);
132
133MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
134module_param_named(modeset, radeon_modeset, int, 0400);
135
136MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
137module_param_named(dynclks, radeon_dynclks, int, 0444);
138
139MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
140module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
141
142MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
143module_param_named(vramlimit, radeon_vram_limit, int, 0600);
144
145MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
146module_param_named(agpmode, radeon_agpmode, int, 0444);
147
148MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
149module_param_named(gartsize, radeon_gart_size, int, 0600);
150
151MODULE_PARM_DESC(benchmark, "Run benchmark");
152module_param_named(benchmark, radeon_benchmarking, int, 0444);
153
154MODULE_PARM_DESC(test, "Run tests");
155module_param_named(test, radeon_testing, int, 0444);
156
157MODULE_PARM_DESC(connector_table, "Force connector table");
158module_param_named(connector_table, radeon_connector_table, int, 0444);
159
160MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
161module_param_named(tv, radeon_tv, int, 0444);
162
163MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
164module_param_named(audio, radeon_audio, int, 0444);
165
166MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
167module_param_named(disp_priority, radeon_disp_priority, int, 0444);
168
169MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
170module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
171
172MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (1 = enable)");
173module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
174
175MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
176module_param_named(msi, radeon_msi, int, 0444);
177
178static int radeon_suspend(struct drm_device *dev, pm_message_t state)
179{
180 drm_radeon_private_t *dev_priv = dev->dev_private;
181
182 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
183 return 0;
184
185 /* Disable *all* interrupts */
186 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
187 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
188 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
189 return 0;
190}
191
192static int radeon_resume(struct drm_device *dev)
193{
194 drm_radeon_private_t *dev_priv = dev->dev_private;
195
196 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
197 return 0;
198
199 /* Restore interrupt registers */
200 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
201 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
202 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
203 return 0;
204}
205
206static struct pci_device_id pciidlist[] = {
207 radeon_PCI_IDS
208};
209
210#if defined(CONFIG_DRM_RADEON_KMS)
211MODULE_DEVICE_TABLE(pci, pciidlist);
212#endif
213
214static const struct file_operations radeon_driver_old_fops = {
215 .owner = THIS_MODULE,
216 .open = drm_open,
217 .release = drm_release,
218 .unlocked_ioctl = drm_ioctl,
219 .mmap = drm_mmap,
220 .poll = drm_poll,
221 .fasync = drm_fasync,
222 .read = drm_read,
223#ifdef CONFIG_COMPAT
224 .compat_ioctl = radeon_compat_ioctl,
225#endif
226 .llseek = noop_llseek,
227};
228
229static struct drm_driver driver_old = {
230 .driver_features =
231 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
232 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
233 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
234 .load = radeon_driver_load,
235 .firstopen = radeon_driver_firstopen,
236 .open = radeon_driver_open,
237 .preclose = radeon_driver_preclose,
238 .postclose = radeon_driver_postclose,
239 .lastclose = radeon_driver_lastclose,
240 .unload = radeon_driver_unload,
241 .suspend = radeon_suspend,
242 .resume = radeon_resume,
243 .get_vblank_counter = radeon_get_vblank_counter,
244 .enable_vblank = radeon_enable_vblank,
245 .disable_vblank = radeon_disable_vblank,
246 .master_create = radeon_master_create,
247 .master_destroy = radeon_master_destroy,
248 .irq_preinstall = radeon_driver_irq_preinstall,
249 .irq_postinstall = radeon_driver_irq_postinstall,
250 .irq_uninstall = radeon_driver_irq_uninstall,
251 .irq_handler = radeon_driver_irq_handler,
252 .reclaim_buffers = drm_core_reclaim_buffers,
253 .ioctls = radeon_ioctls,
254 .dma_ioctl = radeon_cp_buffers,
255 .fops = &radeon_driver_old_fops,
256 .name = DRIVER_NAME,
257 .desc = DRIVER_DESC,
258 .date = DRIVER_DATE,
259 .major = DRIVER_MAJOR,
260 .minor = DRIVER_MINOR,
261 .patchlevel = DRIVER_PATCHLEVEL,
262};
263
264static struct drm_driver kms_driver;
265
266static void radeon_kick_out_firmware_fb(struct pci_dev *pdev)
267{
268 struct apertures_struct *ap;
269 bool primary = false;
270
271 ap = alloc_apertures(1);
272 ap->ranges[0].base = pci_resource_start(pdev, 0);
273 ap->ranges[0].size = pci_resource_len(pdev, 0);
274
275#ifdef CONFIG_X86
276 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
277#endif
278 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
279 kfree(ap);
280}
281
282static int __devinit
283radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
284{
285 /* Get rid of things like offb */
286 radeon_kick_out_firmware_fb(pdev);
287
288 return drm_get_pci_dev(pdev, ent, &kms_driver);
289}
290
291static void
292radeon_pci_remove(struct pci_dev *pdev)
293{
294 struct drm_device *dev = pci_get_drvdata(pdev);
295
296 drm_put_dev(dev);
297}
298
299static int
300radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
301{
302 struct drm_device *dev = pci_get_drvdata(pdev);
303 return radeon_suspend_kms(dev, state);
304}
305
306static int
307radeon_pci_resume(struct pci_dev *pdev)
308{
309 struct drm_device *dev = pci_get_drvdata(pdev);
310 return radeon_resume_kms(dev);
311}
312
313static const struct file_operations radeon_driver_kms_fops = {
314 .owner = THIS_MODULE,
315 .open = drm_open,
316 .release = drm_release,
317 .unlocked_ioctl = drm_ioctl,
318 .mmap = radeon_mmap,
319 .poll = drm_poll,
320 .fasync = drm_fasync,
321 .read = drm_read,
322#ifdef CONFIG_COMPAT
323 .compat_ioctl = radeon_kms_compat_ioctl,
324#endif
325};
326
327static struct drm_driver kms_driver = {
328 .driver_features =
329 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
330 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
331 .dev_priv_size = 0,
332 .load = radeon_driver_load_kms,
333 .firstopen = radeon_driver_firstopen_kms,
334 .open = radeon_driver_open_kms,
335 .preclose = radeon_driver_preclose_kms,
336 .postclose = radeon_driver_postclose_kms,
337 .lastclose = radeon_driver_lastclose_kms,
338 .unload = radeon_driver_unload_kms,
339 .suspend = radeon_suspend_kms,
340 .resume = radeon_resume_kms,
341 .get_vblank_counter = radeon_get_vblank_counter_kms,
342 .enable_vblank = radeon_enable_vblank_kms,
343 .disable_vblank = radeon_disable_vblank_kms,
344 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
345 .get_scanout_position = radeon_get_crtc_scanoutpos,
346#if defined(CONFIG_DEBUG_FS)
347 .debugfs_init = radeon_debugfs_init,
348 .debugfs_cleanup = radeon_debugfs_cleanup,
349#endif
350 .irq_preinstall = radeon_driver_irq_preinstall_kms,
351 .irq_postinstall = radeon_driver_irq_postinstall_kms,
352 .irq_uninstall = radeon_driver_irq_uninstall_kms,
353 .irq_handler = radeon_driver_irq_handler_kms,
354 .reclaim_buffers = drm_core_reclaim_buffers,
355 .ioctls = radeon_ioctls_kms,
356 .gem_init_object = radeon_gem_object_init,
357 .gem_free_object = radeon_gem_object_free,
358 .gem_open_object = radeon_gem_object_open,
359 .gem_close_object = radeon_gem_object_close,
360 .dma_ioctl = radeon_dma_ioctl_kms,
361 .dumb_create = radeon_mode_dumb_create,
362 .dumb_map_offset = radeon_mode_dumb_mmap,
363 .dumb_destroy = radeon_mode_dumb_destroy,
364 .fops = &radeon_driver_kms_fops,
365 .name = DRIVER_NAME,
366 .desc = DRIVER_DESC,
367 .date = DRIVER_DATE,
368 .major = KMS_DRIVER_MAJOR,
369 .minor = KMS_DRIVER_MINOR,
370 .patchlevel = KMS_DRIVER_PATCHLEVEL,
371};
372
373static struct drm_driver *driver;
374static struct pci_driver *pdriver;
375
376static struct pci_driver radeon_pci_driver = {
377 .name = DRIVER_NAME,
378 .id_table = pciidlist,
379};
380
381static struct pci_driver radeon_kms_pci_driver = {
382 .name = DRIVER_NAME,
383 .id_table = pciidlist,
384 .probe = radeon_pci_probe,
385 .remove = radeon_pci_remove,
386 .suspend = radeon_pci_suspend,
387 .resume = radeon_pci_resume,
388};
389
390static int __init radeon_init(void)
391{
392 driver = &driver_old;
393 pdriver = &radeon_pci_driver;
394 driver->num_ioctls = radeon_max_ioctl;
395#ifdef CONFIG_VGA_CONSOLE
396 if (vgacon_text_force() && radeon_modeset == -1) {
397 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
398 driver = &driver_old;
399 pdriver = &radeon_pci_driver;
400 driver->driver_features &= ~DRIVER_MODESET;
401 radeon_modeset = 0;
402 }
403#endif
404 /* if enabled by default */
405 if (radeon_modeset == -1) {
406#ifdef CONFIG_DRM_RADEON_KMS
407 DRM_INFO("radeon defaulting to kernel modesetting.\n");
408 radeon_modeset = 1;
409#else
410 DRM_INFO("radeon defaulting to userspace modesetting.\n");
411 radeon_modeset = 0;
412#endif
413 }
414 if (radeon_modeset == 1) {
415 DRM_INFO("radeon kernel modesetting enabled.\n");
416 driver = &kms_driver;
417 pdriver = &radeon_kms_pci_driver;
418 driver->driver_features |= DRIVER_MODESET;
419 driver->num_ioctls = radeon_max_kms_ioctl;
420 radeon_register_atpx_handler();
421 }
422 /* if the vga console setting is enabled still
423 * let modprobe override it */
424 return drm_pci_init(driver, pdriver);
425}
426
427static void __exit radeon_exit(void)
428{
429 drm_pci_exit(driver, pdriver);
430 radeon_unregister_atpx_handler();
431}
432
433module_init(radeon_init);
434module_exit(radeon_exit);
435
436MODULE_AUTHOR(DRIVER_AUTHOR);
437MODULE_DESCRIPTION(DRIVER_DESC);
438MODULE_LICENSE("GPL and additional rights");