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1/* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Christian König. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Christian König 25 */ 26#include "drmP.h" 27#include "radeon.h" 28#include "radeon_reg.h" 29#include "radeon_asic.h" 30#include "atom.h" 31 32#define AUDIO_TIMER_INTERVALL 100 /* 1/10 sekund should be enough */ 33 34/* 35 * check if the chipset is supported 36 */ 37static int r600_audio_chipset_supported(struct radeon_device *rdev) 38{ 39 return (rdev->family >= CHIP_R600 && !ASIC_IS_DCE5(rdev)) 40 || rdev->family == CHIP_RS600 41 || rdev->family == CHIP_RS690 42 || rdev->family == CHIP_RS740; 43} 44 45/* 46 * current number of channels 47 */ 48int r600_audio_channels(struct radeon_device *rdev) 49{ 50 return (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0x7) + 1; 51} 52 53/* 54 * current bits per sample 55 */ 56int r600_audio_bits_per_sample(struct radeon_device *rdev) 57{ 58 uint32_t value = (RREG32(R600_AUDIO_RATE_BPS_CHANNEL) & 0xF0) >> 4; 59 switch (value) { 60 case 0x0: return 8; 61 case 0x1: return 16; 62 case 0x2: return 20; 63 case 0x3: return 24; 64 case 0x4: return 32; 65 } 66 67 dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n", 68 (int)value); 69 70 return 16; 71} 72 73/* 74 * current sampling rate in HZ 75 */ 76int r600_audio_rate(struct radeon_device *rdev) 77{ 78 uint32_t value = RREG32(R600_AUDIO_RATE_BPS_CHANNEL); 79 uint32_t result; 80 81 if (value & 0x4000) 82 result = 44100; 83 else 84 result = 48000; 85 86 result *= ((value >> 11) & 0x7) + 1; 87 result /= ((value >> 8) & 0x7) + 1; 88 89 return result; 90} 91 92/* 93 * iec 60958 status bits 94 */ 95uint8_t r600_audio_status_bits(struct radeon_device *rdev) 96{ 97 return RREG32(R600_AUDIO_STATUS_BITS) & 0xff; 98} 99 100/* 101 * iec 60958 category code 102 */ 103uint8_t r600_audio_category_code(struct radeon_device *rdev) 104{ 105 return (RREG32(R600_AUDIO_STATUS_BITS) >> 8) & 0xff; 106} 107 108/* 109 * schedule next audio update event 110 */ 111void r600_audio_schedule_polling(struct radeon_device *rdev) 112{ 113 mod_timer(&rdev->audio_timer, 114 jiffies + msecs_to_jiffies(AUDIO_TIMER_INTERVALL)); 115} 116 117/* 118 * update all hdmi interfaces with current audio parameters 119 */ 120static void r600_audio_update_hdmi(unsigned long param) 121{ 122 struct radeon_device *rdev = (struct radeon_device *)param; 123 struct drm_device *dev = rdev->ddev; 124 125 int channels = r600_audio_channels(rdev); 126 int rate = r600_audio_rate(rdev); 127 int bps = r600_audio_bits_per_sample(rdev); 128 uint8_t status_bits = r600_audio_status_bits(rdev); 129 uint8_t category_code = r600_audio_category_code(rdev); 130 131 struct drm_encoder *encoder; 132 int changes = 0, still_going = 0; 133 134 changes |= channels != rdev->audio_channels; 135 changes |= rate != rdev->audio_rate; 136 changes |= bps != rdev->audio_bits_per_sample; 137 changes |= status_bits != rdev->audio_status_bits; 138 changes |= category_code != rdev->audio_category_code; 139 140 if (changes) { 141 rdev->audio_channels = channels; 142 rdev->audio_rate = rate; 143 rdev->audio_bits_per_sample = bps; 144 rdev->audio_status_bits = status_bits; 145 rdev->audio_category_code = category_code; 146 } 147 148 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 149 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 150 still_going |= radeon_encoder->audio_polling_active; 151 if (changes || r600_hdmi_buffer_status_changed(encoder)) 152 r600_hdmi_update_audio_settings(encoder); 153 } 154 155 if (still_going) 156 r600_audio_schedule_polling(rdev); 157} 158 159/* 160 * turn on/off audio engine 161 */ 162static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable) 163{ 164 u32 value = 0; 165 DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling"); 166 if (ASIC_IS_DCE4(rdev)) { 167 if (enable) { 168 value |= 0x81000000; /* Required to enable audio */ 169 value |= 0x0e1000f0; /* fglrx sets that too */ 170 } 171 WREG32(EVERGREEN_AUDIO_ENABLE, value); 172 } else { 173 WREG32_P(R600_AUDIO_ENABLE, 174 enable ? 0x81000000 : 0x0, ~0x81000000); 175 } 176 rdev->audio_enabled = enable; 177} 178 179/* 180 * initialize the audio vars and register the update timer 181 */ 182int r600_audio_init(struct radeon_device *rdev) 183{ 184 if (!radeon_audio || !r600_audio_chipset_supported(rdev)) 185 return 0; 186 187 r600_audio_engine_enable(rdev, true); 188 189 rdev->audio_channels = -1; 190 rdev->audio_rate = -1; 191 rdev->audio_bits_per_sample = -1; 192 rdev->audio_status_bits = 0; 193 rdev->audio_category_code = 0; 194 195 setup_timer( 196 &rdev->audio_timer, 197 r600_audio_update_hdmi, 198 (unsigned long)rdev); 199 200 return 0; 201} 202 203/* 204 * enable the polling timer, to check for status changes 205 */ 206void r600_audio_enable_polling(struct drm_encoder *encoder) 207{ 208 struct drm_device *dev = encoder->dev; 209 struct radeon_device *rdev = dev->dev_private; 210 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 211 212 DRM_DEBUG("r600_audio_enable_polling: %d\n", 213 radeon_encoder->audio_polling_active); 214 if (radeon_encoder->audio_polling_active) 215 return; 216 217 radeon_encoder->audio_polling_active = 1; 218 if (rdev->audio_enabled) 219 mod_timer(&rdev->audio_timer, jiffies + 1); 220} 221 222/* 223 * disable the polling timer, so we get no more status updates 224 */ 225void r600_audio_disable_polling(struct drm_encoder *encoder) 226{ 227 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 228 DRM_DEBUG("r600_audio_disable_polling: %d\n", 229 radeon_encoder->audio_polling_active); 230 radeon_encoder->audio_polling_active = 0; 231} 232 233/* 234 * atach the audio codec to the clock source of the encoder 235 */ 236void r600_audio_set_clock(struct drm_encoder *encoder, int clock) 237{ 238 struct drm_device *dev = encoder->dev; 239 struct radeon_device *rdev = dev->dev_private; 240 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 241 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 242 int base_rate = 48000; 243 244 switch (radeon_encoder->encoder_id) { 245 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: 246 case ENCODER_OBJECT_ID_INTERNAL_LVTM1: 247 WREG32_P(R600_AUDIO_TIMING, 0, ~0x301); 248 break; 249 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 250 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: 251 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: 252 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 253 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301); 254 break; 255 default: 256 dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n", 257 radeon_encoder->encoder_id); 258 return; 259 } 260 261 if (ASIC_IS_DCE4(rdev)) { 262 /* TODO: other PLLs? */ 263 WREG32(EVERGREEN_AUDIO_PLL1_MUL, base_rate * 10); 264 WREG32(EVERGREEN_AUDIO_PLL1_DIV, clock * 10); 265 WREG32(EVERGREEN_AUDIO_PLL1_UNK, 0x00000071); 266 267 /* Some magic trigger or src sel? */ 268 WREG32_P(0x5ac, 0x01, ~0x77); 269 } else { 270 switch (dig->dig_encoder) { 271 case 0: 272 WREG32(R600_AUDIO_PLL1_MUL, base_rate * 50); 273 WREG32(R600_AUDIO_PLL1_DIV, clock * 100); 274 WREG32(R600_AUDIO_CLK_SRCSEL, 0); 275 break; 276 277 case 1: 278 WREG32(R600_AUDIO_PLL2_MUL, base_rate * 50); 279 WREG32(R600_AUDIO_PLL2_DIV, clock * 100); 280 WREG32(R600_AUDIO_CLK_SRCSEL, 1); 281 break; 282 default: 283 dev_err(rdev->dev, 284 "Unsupported DIG on encoder 0x%02X\n", 285 radeon_encoder->encoder_id); 286 return; 287 } 288 } 289} 290 291/* 292 * release the audio timer 293 * TODO: How to do this correctly on SMP systems? 294 */ 295void r600_audio_fini(struct radeon_device *rdev) 296{ 297 if (!rdev->audio_enabled) 298 return; 299 300 del_timer(&rdev->audio_timer); 301 302 r600_audio_engine_enable(rdev, false); 303}