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linux
1/*
2 * linux/include/linux/mmc/host.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Host driver specific definitions.
9 */
10#ifndef LINUX_MMC_HOST_H
11#define LINUX_MMC_HOST_H
12
13#include <linux/leds.h>
14#include <linux/mutex.h>
15#include <linux/sched.h>
16#include <linux/device.h>
17#include <linux/fault-inject.h>
18
19#include <linux/mmc/core.h>
20#include <linux/mmc/card.h>
21#include <linux/mmc/pm.h>
22
23struct mmc_ios {
24 unsigned int clock; /* clock rate */
25 unsigned short vdd;
26
27/* vdd stores the bit number of the selected voltage range from below. */
28
29 unsigned char bus_mode; /* command output mode */
30
31#define MMC_BUSMODE_OPENDRAIN 1
32#define MMC_BUSMODE_PUSHPULL 2
33
34 unsigned char chip_select; /* SPI chip select */
35
36#define MMC_CS_DONTCARE 0
37#define MMC_CS_HIGH 1
38#define MMC_CS_LOW 2
39
40 unsigned char power_mode; /* power supply mode */
41
42#define MMC_POWER_OFF 0
43#define MMC_POWER_UP 1
44#define MMC_POWER_ON 2
45#define MMC_POWER_UNDEFINED 3
46
47 unsigned char bus_width; /* data bus width */
48
49#define MMC_BUS_WIDTH_1 0
50#define MMC_BUS_WIDTH_4 2
51#define MMC_BUS_WIDTH_8 3
52
53 unsigned char timing; /* timing specification used */
54
55#define MMC_TIMING_LEGACY 0
56#define MMC_TIMING_MMC_HS 1
57#define MMC_TIMING_SD_HS 2
58#define MMC_TIMING_UHS_SDR12 3
59#define MMC_TIMING_UHS_SDR25 4
60#define MMC_TIMING_UHS_SDR50 5
61#define MMC_TIMING_UHS_SDR104 6
62#define MMC_TIMING_UHS_DDR50 7
63#define MMC_TIMING_MMC_DDR52 8
64#define MMC_TIMING_MMC_HS200 9
65#define MMC_TIMING_MMC_HS400 10
66
67 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
68
69#define MMC_SIGNAL_VOLTAGE_330 0
70#define MMC_SIGNAL_VOLTAGE_180 1
71#define MMC_SIGNAL_VOLTAGE_120 2
72
73 unsigned char drv_type; /* driver type (A, B, C, D) */
74
75#define MMC_SET_DRIVER_TYPE_B 0
76#define MMC_SET_DRIVER_TYPE_A 1
77#define MMC_SET_DRIVER_TYPE_C 2
78#define MMC_SET_DRIVER_TYPE_D 3
79};
80
81struct mmc_host_ops {
82 /*
83 * 'enable' is called when the host is claimed and 'disable' is called
84 * when the host is released. 'enable' and 'disable' are deprecated.
85 */
86 int (*enable)(struct mmc_host *host);
87 int (*disable)(struct mmc_host *host);
88 /*
89 * It is optional for the host to implement pre_req and post_req in
90 * order to support double buffering of requests (prepare one
91 * request while another request is active).
92 * pre_req() must always be followed by a post_req().
93 * To undo a call made to pre_req(), call post_req() with
94 * a nonzero err condition.
95 */
96 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
97 int err);
98 void (*pre_req)(struct mmc_host *host, struct mmc_request *req,
99 bool is_first_req);
100 void (*request)(struct mmc_host *host, struct mmc_request *req);
101 /*
102 * Avoid calling these three functions too often or in a "fast path",
103 * since underlaying controller might implement them in an expensive
104 * and/or slow way.
105 *
106 * Also note that these functions might sleep, so don't call them
107 * in the atomic contexts!
108 *
109 * Return values for the get_ro callback should be:
110 * 0 for a read/write card
111 * 1 for a read-only card
112 * -ENOSYS when not supported (equal to NULL callback)
113 * or a negative errno value when something bad happened
114 *
115 * Return values for the get_cd callback should be:
116 * 0 for a absent card
117 * 1 for a present card
118 * -ENOSYS when not supported (equal to NULL callback)
119 * or a negative errno value when something bad happened
120 */
121 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
122 int (*get_ro)(struct mmc_host *host);
123 int (*get_cd)(struct mmc_host *host);
124
125 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
126
127 /* optional callback for HC quirks */
128 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
129
130 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
131
132 /* Check if the card is pulling dat[0:3] low */
133 int (*card_busy)(struct mmc_host *host);
134
135 /* The tuning command opcode value is different for SD and eMMC cards */
136 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
137
138 /* Prepare HS400 target operating frequency depending host driver */
139 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
140 int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
141 void (*hw_reset)(struct mmc_host *host);
142 void (*card_event)(struct mmc_host *host);
143
144 /*
145 * Optional callback to support controllers with HW issues for multiple
146 * I/O. Returns the number of supported blocks for the request.
147 */
148 int (*multi_io_quirk)(struct mmc_card *card,
149 unsigned int direction, int blk_size);
150};
151
152struct mmc_card;
153struct device;
154
155struct mmc_async_req {
156 /* active mmc request */
157 struct mmc_request *mrq;
158 /*
159 * Check error status of completed mmc request.
160 * Returns 0 if success otherwise non zero.
161 */
162 int (*err_check) (struct mmc_card *, struct mmc_async_req *);
163};
164
165/**
166 * struct mmc_slot - MMC slot functions
167 *
168 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
169 * @lock: protect the @handler_priv pointer
170 * @handler_priv: MMC/SD-card slot context
171 *
172 * Some MMC/SD host controllers implement slot-functions like card and
173 * write-protect detection natively. However, a large number of controllers
174 * leave these functions to the CPU. This struct provides a hook to attach
175 * such slot-function drivers.
176 */
177struct mmc_slot {
178 int cd_irq;
179 struct mutex lock;
180 void *handler_priv;
181};
182
183/**
184 * mmc_context_info - synchronization details for mmc context
185 * @is_done_rcv wake up reason was done request
186 * @is_new_req wake up reason was new request
187 * @is_waiting_last_req mmc context waiting for single running request
188 * @wait wait queue
189 * @lock lock to protect data fields
190 */
191struct mmc_context_info {
192 bool is_done_rcv;
193 bool is_new_req;
194 bool is_waiting_last_req;
195 wait_queue_head_t wait;
196 spinlock_t lock;
197};
198
199struct regulator;
200
201struct mmc_supply {
202 struct regulator *vmmc; /* Card power supply */
203 struct regulator *vqmmc; /* Optional Vccq supply */
204};
205
206struct mmc_host {
207 struct device *parent;
208 struct device class_dev;
209 int index;
210 const struct mmc_host_ops *ops;
211 unsigned int f_min;
212 unsigned int f_max;
213 unsigned int f_init;
214 u32 ocr_avail;
215 u32 ocr_avail_sdio; /* SDIO-specific OCR */
216 u32 ocr_avail_sd; /* SD-specific OCR */
217 u32 ocr_avail_mmc; /* MMC-specific OCR */
218 struct notifier_block pm_notify;
219 u32 max_current_330;
220 u32 max_current_300;
221 u32 max_current_180;
222
223#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
224#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
225#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
226#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
227#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
228#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
229#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
230#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
231#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
232#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
233#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
234#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
235#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
236#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
237#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
238#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
239#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
240
241 u32 caps; /* Host capabilities */
242
243#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
244#define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
245#define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
246#define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
247#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
248#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
249#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
250#define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
251#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
252#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
253#define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
254#define MMC_CAP_1_8V_DDR (1 << 11) /* can support */
255 /* DDR mode at 1.8V */
256#define MMC_CAP_1_2V_DDR (1 << 12) /* can support */
257 /* DDR mode at 1.2V */
258#define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */
259#define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */
260#define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */
261#define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */
262#define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
263#define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
264#define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
265#define MMC_CAP_RUNTIME_RESUME (1 << 20) /* Resume at runtime_resume. */
266#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
267#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
268#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
269#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
270#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
271
272 u32 caps2; /* More host capabilities */
273
274#define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
275#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
276#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
277#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
278#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
279 MMC_CAP2_HS200_1_2V_SDR)
280#define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */
281#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
282#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
283#define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */
284#define MMC_CAP2_PACKED_WR (1 << 13) /* Allow packed write */
285#define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \
286 MMC_CAP2_PACKED_WR)
287#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
288#define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
289#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
290#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
291 MMC_CAP2_HS400_1_2V)
292#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
293#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
294
295 mmc_pm_flag_t pm_caps; /* supported pm features */
296
297#ifdef CONFIG_MMC_CLKGATE
298 int clk_requests; /* internal reference counter */
299 unsigned int clk_delay; /* number of MCI clk hold cycles */
300 bool clk_gated; /* clock gated */
301 struct delayed_work clk_gate_work; /* delayed clock gate */
302 unsigned int clk_old; /* old clock value cache */
303 spinlock_t clk_lock; /* lock for clk fields */
304 struct mutex clk_gate_mutex; /* mutex for clock gating */
305 struct device_attribute clkgate_delay_attr;
306 unsigned long clkgate_delay;
307#endif
308
309 /* host specific block data */
310 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
311 unsigned short max_segs; /* see blk_queue_max_segments */
312 unsigned short unused;
313 unsigned int max_req_size; /* maximum number of bytes in one req */
314 unsigned int max_blk_size; /* maximum size of one mmc block */
315 unsigned int max_blk_count; /* maximum number of blocks in one req */
316 unsigned int max_busy_timeout; /* max busy timeout in ms */
317
318 /* private data */
319 spinlock_t lock; /* lock for claim and bus ops */
320
321 struct mmc_ios ios; /* current io bus settings */
322
323 /* group bitfields together to minimize padding */
324 unsigned int use_spi_crc:1;
325 unsigned int claimed:1; /* host exclusively claimed */
326 unsigned int bus_dead:1; /* bus has been released */
327#ifdef CONFIG_MMC_DEBUG
328 unsigned int removed:1; /* host is being removed */
329#endif
330
331 int rescan_disable; /* disable card detection */
332 int rescan_entered; /* used with nonremovable devices */
333
334 bool trigger_card_event; /* card_event necessary */
335
336 struct mmc_card *card; /* device attached to this host */
337
338 wait_queue_head_t wq;
339 struct task_struct *claimer; /* task that has host claimed */
340 int claim_cnt; /* "claim" nesting count */
341
342 struct delayed_work detect;
343 int detect_change; /* card detect flag */
344 struct mmc_slot slot;
345
346 const struct mmc_bus_ops *bus_ops; /* current bus driver */
347 unsigned int bus_refs; /* reference counter */
348
349 unsigned int sdio_irqs;
350 struct task_struct *sdio_irq_thread;
351 bool sdio_irq_pending;
352 atomic_t sdio_irq_thread_abort;
353
354 mmc_pm_flag_t pm_flags; /* requested pm features */
355
356 struct led_trigger *led; /* activity led */
357
358#ifdef CONFIG_REGULATOR
359 bool regulator_enabled; /* regulator state */
360#endif
361 struct mmc_supply supply;
362
363 struct dentry *debugfs_root;
364
365 struct mmc_async_req *areq; /* active async req */
366 struct mmc_context_info context_info; /* async synchronization info */
367
368#ifdef CONFIG_FAIL_MMC_REQUEST
369 struct fault_attr fail_mmc_request;
370#endif
371
372 unsigned int actual_clock; /* Actual HC clock rate */
373
374 unsigned int slotno; /* used for sdio acpi binding */
375
376 int dsr_req; /* DSR value is valid */
377 u32 dsr; /* optional driver stage (DSR) value */
378
379 unsigned long private[0] ____cacheline_aligned;
380};
381
382struct mmc_host *mmc_alloc_host(int extra, struct device *);
383int mmc_add_host(struct mmc_host *);
384void mmc_remove_host(struct mmc_host *);
385void mmc_free_host(struct mmc_host *);
386int mmc_of_parse(struct mmc_host *host);
387
388static inline void *mmc_priv(struct mmc_host *host)
389{
390 return (void *)host->private;
391}
392
393#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
394
395#define mmc_dev(x) ((x)->parent)
396#define mmc_classdev(x) (&(x)->class_dev)
397#define mmc_hostname(x) (dev_name(&(x)->class_dev))
398
399int mmc_power_save_host(struct mmc_host *host);
400int mmc_power_restore_host(struct mmc_host *host);
401
402void mmc_detect_change(struct mmc_host *, unsigned long delay);
403void mmc_request_done(struct mmc_host *, struct mmc_request *);
404
405static inline void mmc_signal_sdio_irq(struct mmc_host *host)
406{
407 host->ops->enable_sdio_irq(host, 0);
408 host->sdio_irq_pending = true;
409 wake_up_process(host->sdio_irq_thread);
410}
411
412void sdio_run_irqs(struct mmc_host *host);
413
414#ifdef CONFIG_REGULATOR
415int mmc_regulator_get_ocrmask(struct regulator *supply);
416int mmc_regulator_set_ocr(struct mmc_host *mmc,
417 struct regulator *supply,
418 unsigned short vdd_bit);
419#else
420static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
421{
422 return 0;
423}
424
425static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
426 struct regulator *supply,
427 unsigned short vdd_bit)
428{
429 return 0;
430}
431#endif
432
433int mmc_regulator_get_supply(struct mmc_host *mmc);
434
435int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);
436
437static inline int mmc_card_is_removable(struct mmc_host *host)
438{
439 return !(host->caps & MMC_CAP_NONREMOVABLE);
440}
441
442static inline int mmc_card_keep_power(struct mmc_host *host)
443{
444 return host->pm_flags & MMC_PM_KEEP_POWER;
445}
446
447static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
448{
449 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
450}
451
452static inline int mmc_host_cmd23(struct mmc_host *host)
453{
454 return host->caps & MMC_CAP_CMD23;
455}
456
457static inline int mmc_boot_partition_access(struct mmc_host *host)
458{
459 return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
460}
461
462static inline int mmc_host_uhs(struct mmc_host *host)
463{
464 return host->caps &
465 (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
466 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 |
467 MMC_CAP_UHS_DDR50);
468}
469
470static inline int mmc_host_packed_wr(struct mmc_host *host)
471{
472 return host->caps2 & MMC_CAP2_PACKED_WR;
473}
474
475#ifdef CONFIG_MMC_CLKGATE
476void mmc_host_clk_hold(struct mmc_host *host);
477void mmc_host_clk_release(struct mmc_host *host);
478unsigned int mmc_host_clk_rate(struct mmc_host *host);
479
480#else
481static inline void mmc_host_clk_hold(struct mmc_host *host)
482{
483}
484
485static inline void mmc_host_clk_release(struct mmc_host *host)
486{
487}
488
489static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
490{
491 return host->ios.clock;
492}
493#endif
494
495static inline int mmc_card_hs(struct mmc_card *card)
496{
497 return card->host->ios.timing == MMC_TIMING_SD_HS ||
498 card->host->ios.timing == MMC_TIMING_MMC_HS;
499}
500
501static inline int mmc_card_uhs(struct mmc_card *card)
502{
503 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
504 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
505}
506
507static inline bool mmc_card_hs200(struct mmc_card *card)
508{
509 return card->host->ios.timing == MMC_TIMING_MMC_HS200;
510}
511
512static inline bool mmc_card_ddr52(struct mmc_card *card)
513{
514 return card->host->ios.timing == MMC_TIMING_MMC_DDR52;
515}
516
517static inline bool mmc_card_hs400(struct mmc_card *card)
518{
519 return card->host->ios.timing == MMC_TIMING_MMC_HS400;
520}
521
522#endif /* LINUX_MMC_HOST_H */