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1/************************************************************************** 2 * 3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above 12 * copyright notice, this list of conditions and the following 13 * disclaimer in the documentation and/or other materials provided 14 * with the distribution. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") version 2 as published by the Free 18 * Software Foundation. 19 * 20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * The views and conclusions contained in the software and documentation 34 * are those of the authors and should not be interpreted as representing 35 * official policies, either expressed or implied, of Alacritech, Inc. 36 * 37 **************************************************************************/ 38 39/* 40 * FILENAME: slicoss.c 41 * 42 * The SLICOSS driver for Alacritech's IS-NIC products. 43 * 44 * This driver is supposed to support: 45 * 46 * Mojave cards (single port PCI Gigabit) both copper and fiber 47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber 48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber 49 * 50 * The driver was actually tested on Oasis and Kalahari cards. 51 * 52 * 53 * NOTE: This is the standard, non-accelerated version of Alacritech's 54 * IS-NIC driver. 55 */ 56 57 58#define KLUDGE_FOR_4GB_BOUNDARY 1 59#define DEBUG_MICROCODE 1 60#define DBG 1 61#define SLIC_INTERRUPT_PROCESS_LIMIT 1 62#define SLIC_OFFLOAD_IP_CHECKSUM 1 63#define STATS_TIMER_INTERVAL 2 64#define PING_TIMER_INTERVAL 1 65#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 66 67#include <linux/kernel.h> 68#include <linux/string.h> 69#include <linux/errno.h> 70#include <linux/ioport.h> 71#include <linux/slab.h> 72#include <linux/interrupt.h> 73#include <linux/timer.h> 74#include <linux/pci.h> 75#include <linux/spinlock.h> 76#include <linux/init.h> 77#include <linux/bitops.h> 78#include <linux/io.h> 79#include <linux/netdevice.h> 80#include <linux/crc32.h> 81#include <linux/etherdevice.h> 82#include <linux/skbuff.h> 83#include <linux/delay.h> 84#include <linux/seq_file.h> 85#include <linux/kthread.h> 86#include <linux/module.h> 87#include <linux/moduleparam.h> 88 89#include <linux/firmware.h> 90#include <linux/types.h> 91#include <linux/dma-mapping.h> 92#include <linux/mii.h> 93#include <linux/if_vlan.h> 94#include <asm/unaligned.h> 95 96#include <linux/ethtool.h> 97#include <linux/uaccess.h> 98#include "slichw.h" 99#include "slic.h" 100 101static uint slic_first_init = 1; 102static char *slic_banner = "Alacritech SLIC Technology(tm) Server " 103 "and Storage Accelerator (Non-Accelerated)"; 104 105static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00"; 106 107static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL }; 108static int intagg_delay = 100; 109static u32 dynamic_intagg; 110static unsigned int rcv_count; 111 112#define DRV_NAME "slicoss" 113#define DRV_VERSION "2.0.1" 114#define DRV_AUTHOR "Alacritech, Inc. Engineering" 115#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\ 116 "Non-Accelerated Driver" 117#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\ 118 "All rights reserved." 119#define PFX DRV_NAME " " 120 121MODULE_AUTHOR(DRV_AUTHOR); 122MODULE_DESCRIPTION(DRV_DESCRIPTION); 123MODULE_LICENSE("Dual BSD/GPL"); 124 125module_param(dynamic_intagg, int, 0); 126MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); 127module_param(intagg_delay, int, 0); 128MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); 129 130static const struct pci_device_id slic_pci_tbl[] = { 131 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) }, 132 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) }, 133 { 0 } 134}; 135 136MODULE_DEVICE_TABLE(pci, slic_pci_tbl); 137 138static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush) 139{ 140 writel(value, reg); 141 if (flush) 142 mb(); 143} 144 145static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg, 146 u32 value, void __iomem *regh, u32 paddrh, 147 bool flush) 148{ 149 spin_lock_irqsave(&adapter->bit64reglock.lock, 150 adapter->bit64reglock.flags); 151 if (paddrh != adapter->curaddrupper) { 152 adapter->curaddrupper = paddrh; 153 writel(paddrh, regh); 154 } 155 writel(value, reg); 156 if (flush) 157 mb(); 158 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 159 adapter->bit64reglock.flags); 160} 161 162static void slic_mcast_set_bit(struct adapter *adapter, char *address) 163{ 164 unsigned char crcpoly; 165 166 /* Get the CRC polynomial for the mac address */ 167 /* we use bits 1-8 (lsb), bitwise reversed, 168 * msb (= lsb bit 0 before bitrev) is automatically discarded */ 169 crcpoly = (ether_crc(ETH_ALEN, address)>>23); 170 171 /* We only have space on the SLIC for 64 entries. Lop 172 * off the top two bits. (2^6 = 64) 173 */ 174 crcpoly &= 0x3F; 175 176 /* OR in the new bit into our 64 bit mask. */ 177 adapter->mcastmask |= (u64) 1 << crcpoly; 178} 179 180static void slic_mcast_set_mask(struct adapter *adapter) 181{ 182 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 183 184 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) { 185 /* Turn on all multicast addresses. We have to do this for 186 * promiscuous mode as well as ALLMCAST mode. It saves the 187 * Microcode from having to keep state about the MAC 188 * configuration. 189 */ 190 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH); 191 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF, 192 FLUSH); 193 } else { 194 /* Commit our multicast mast to the SLIC by writing to the 195 * multicast address mask registers 196 */ 197 slic_reg32_write(&slic_regs->slic_mcastlow, 198 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH); 199 slic_reg32_write(&slic_regs->slic_mcasthigh, 200 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH); 201 } 202} 203 204static void slic_timer_ping(ulong dev) 205{ 206 struct adapter *adapter; 207 struct sliccard *card; 208 209 adapter = netdev_priv((struct net_device *)dev); 210 card = adapter->card; 211 212 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ); 213 add_timer(&adapter->pingtimer); 214} 215 216static void slic_unmap_mmio_space(struct adapter *adapter) 217{ 218 if (adapter->slic_regs) 219 iounmap(adapter->slic_regs); 220 adapter->slic_regs = NULL; 221} 222 223/* 224 * slic_link_config 225 * 226 * Write phy control to configure link duplex/speed 227 * 228 */ 229static void slic_link_config(struct adapter *adapter, 230 u32 linkspeed, u32 linkduplex) 231{ 232 u32 __iomem *wphy; 233 u32 speed; 234 u32 duplex; 235 u32 phy_config; 236 u32 phy_advreg; 237 u32 phy_gctlreg; 238 239 if (adapter->state != ADAPT_UP) 240 return; 241 242 if (linkspeed > LINK_1000MB) 243 linkspeed = LINK_AUTOSPEED; 244 if (linkduplex > LINK_AUTOD) 245 linkduplex = LINK_AUTOD; 246 247 wphy = &adapter->slic_regs->slic_wphy; 248 249 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) { 250 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) { 251 /* We've got a fiber gigabit interface, and register 252 * 4 is different in fiber mode than in copper mode 253 */ 254 255 /* advertise FD only @1000 Mb */ 256 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD)); 257 /* enable PAUSE frames */ 258 phy_advreg |= PAR_ASYMPAUSE_FIBER; 259 slic_reg32_write(wphy, phy_advreg, FLUSH); 260 261 if (linkspeed == LINK_AUTOSPEED) { 262 /* reset phy, enable auto-neg */ 263 phy_config = 264 (MIICR_REG_PCR | 265 (PCR_RESET | PCR_AUTONEG | 266 PCR_AUTONEG_RST)); 267 slic_reg32_write(wphy, phy_config, FLUSH); 268 } else { /* forced 1000 Mb FD*/ 269 /* power down phy to break link 270 this may not work) */ 271 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN); 272 slic_reg32_write(wphy, phy_config, FLUSH); 273 /* wait, Marvell says 1 sec, 274 try to get away with 10 ms */ 275 mdelay(10); 276 277 /* disable auto-neg, set speed/duplex, 278 soft reset phy, powerup */ 279 phy_config = 280 (MIICR_REG_PCR | 281 (PCR_RESET | PCR_SPEED_1000 | 282 PCR_DUPLEX_FULL)); 283 slic_reg32_write(wphy, phy_config, FLUSH); 284 } 285 } else { /* copper gigabit */ 286 287 /* Auto-Negotiate or 1000 Mb must be auto negotiated 288 * We've got a copper gigabit interface, and 289 * register 4 is different in copper mode than 290 * in fiber mode 291 */ 292 if (linkspeed == LINK_AUTOSPEED) { 293 /* advertise 10/100 Mb modes */ 294 phy_advreg = 295 (MIICR_REG_4 | 296 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD 297 | PAR_ADV10HD)); 298 } else { 299 /* linkspeed == LINK_1000MB - 300 don't advertise 10/100 Mb modes */ 301 phy_advreg = MIICR_REG_4; 302 } 303 /* enable PAUSE frames */ 304 phy_advreg |= PAR_ASYMPAUSE; 305 /* required by the Cicada PHY */ 306 phy_advreg |= PAR_802_3; 307 slic_reg32_write(wphy, phy_advreg, FLUSH); 308 /* advertise FD only @1000 Mb */ 309 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD)); 310 slic_reg32_write(wphy, phy_gctlreg, FLUSH); 311 312 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 313 /* if a Marvell PHY 314 enable auto crossover */ 315 phy_config = 316 (MIICR_REG_16 | (MRV_REG16_XOVERON)); 317 slic_reg32_write(wphy, phy_config, FLUSH); 318 319 /* reset phy, enable auto-neg */ 320 phy_config = 321 (MIICR_REG_PCR | 322 (PCR_RESET | PCR_AUTONEG | 323 PCR_AUTONEG_RST)); 324 slic_reg32_write(wphy, phy_config, FLUSH); 325 } else { /* it's a Cicada PHY */ 326 /* enable and restart auto-neg (don't reset) */ 327 phy_config = 328 (MIICR_REG_PCR | 329 (PCR_AUTONEG | PCR_AUTONEG_RST)); 330 slic_reg32_write(wphy, phy_config, FLUSH); 331 } 332 } 333 } else { 334 /* Forced 10/100 */ 335 if (linkspeed == LINK_10MB) 336 speed = 0; 337 else 338 speed = PCR_SPEED_100; 339 if (linkduplex == LINK_HALFD) 340 duplex = 0; 341 else 342 duplex = PCR_DUPLEX_FULL; 343 344 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 345 /* if a Marvell PHY 346 disable auto crossover */ 347 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF)); 348 slic_reg32_write(wphy, phy_config, FLUSH); 349 } 350 351 /* power down phy to break link (this may not work) */ 352 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex)); 353 slic_reg32_write(wphy, phy_config, FLUSH); 354 355 /* wait, Marvell says 1 sec, try to get away with 10 ms */ 356 mdelay(10); 357 358 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 359 /* if a Marvell PHY 360 disable auto-neg, set speed, 361 soft reset phy, powerup */ 362 phy_config = 363 (MIICR_REG_PCR | (PCR_RESET | speed | duplex)); 364 slic_reg32_write(wphy, phy_config, FLUSH); 365 } else { /* it's a Cicada PHY */ 366 /* disable auto-neg, set speed, powerup */ 367 phy_config = (MIICR_REG_PCR | (speed | duplex)); 368 slic_reg32_write(wphy, phy_config, FLUSH); 369 } 370 } 371} 372 373static int slic_card_download_gbrcv(struct adapter *adapter) 374{ 375 const struct firmware *fw; 376 const char *file = ""; 377 int ret; 378 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 379 u32 codeaddr; 380 u32 instruction; 381 int index = 0; 382 u32 rcvucodelen = 0; 383 384 switch (adapter->devid) { 385 case SLIC_2GB_DEVICE_ID: 386 file = "slicoss/oasisrcvucode.sys"; 387 break; 388 case SLIC_1GB_DEVICE_ID: 389 file = "slicoss/gbrcvucode.sys"; 390 break; 391 default: 392 return -ENOENT; 393 } 394 395 ret = request_firmware(&fw, file, &adapter->pcidev->dev); 396 if (ret) { 397 dev_err(&adapter->pcidev->dev, 398 "Failed to load firmware %s\n", file); 399 return ret; 400 } 401 402 rcvucodelen = *(u32 *)(fw->data + index); 403 index += 4; 404 switch (adapter->devid) { 405 case SLIC_2GB_DEVICE_ID: 406 if (rcvucodelen != OasisRcvUCodeLen) { 407 release_firmware(fw); 408 return -EINVAL; 409 } 410 break; 411 case SLIC_1GB_DEVICE_ID: 412 if (rcvucodelen != GBRcvUCodeLen) { 413 release_firmware(fw); 414 return -EINVAL; 415 } 416 break; 417 } 418 /* start download */ 419 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH); 420 /* download the rcv sequencer ucode */ 421 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) { 422 /* write out instruction address */ 423 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH); 424 425 instruction = *(u32 *)(fw->data + index); 426 index += 4; 427 /* write out the instruction data low addr */ 428 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH); 429 430 instruction = *(u8 *)(fw->data + index); 431 index++; 432 /* write out the instruction data high addr */ 433 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction, 434 FLUSH); 435 } 436 437 /* download finished */ 438 release_firmware(fw); 439 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH); 440 return 0; 441} 442 443MODULE_FIRMWARE("slicoss/oasisrcvucode.sys"); 444MODULE_FIRMWARE("slicoss/gbrcvucode.sys"); 445 446static int slic_card_download(struct adapter *adapter) 447{ 448 const struct firmware *fw; 449 const char *file = ""; 450 int ret; 451 u32 section; 452 int thissectionsize; 453 int codeaddr; 454 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 455 u32 instruction; 456 u32 baseaddress; 457 u32 i; 458 u32 numsects = 0; 459 u32 sectsize[3]; 460 u32 sectstart[3]; 461 int ucode_start, index = 0; 462 463 switch (adapter->devid) { 464 case SLIC_2GB_DEVICE_ID: 465 file = "slicoss/oasisdownload.sys"; 466 break; 467 case SLIC_1GB_DEVICE_ID: 468 file = "slicoss/gbdownload.sys"; 469 break; 470 default: 471 return -ENOENT; 472 } 473 ret = request_firmware(&fw, file, &adapter->pcidev->dev); 474 if (ret) { 475 dev_err(&adapter->pcidev->dev, 476 "Failed to load firmware %s\n", file); 477 return ret; 478 } 479 numsects = *(u32 *)(fw->data + index); 480 index += 4; 481 for (i = 0; i < numsects; i++) { 482 sectsize[i] = *(u32 *)(fw->data + index); 483 index += 4; 484 } 485 for (i = 0; i < numsects; i++) { 486 sectstart[i] = *(u32 *)(fw->data + index); 487 index += 4; 488 } 489 ucode_start = index; 490 instruction = *(u32 *)(fw->data + index); 491 index += 4; 492 for (section = 0; section < numsects; section++) { 493 baseaddress = sectstart[section]; 494 thissectionsize = sectsize[section] >> 3; 495 496 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { 497 /* Write out instruction address */ 498 slic_reg32_write(&slic_regs->slic_wcs, 499 baseaddress + codeaddr, FLUSH); 500 /* Write out instruction to low addr */ 501 slic_reg32_write(&slic_regs->slic_wcs, 502 instruction, FLUSH); 503 instruction = *(u32 *)(fw->data + index); 504 index += 4; 505 506 /* Write out instruction to high addr */ 507 slic_reg32_write(&slic_regs->slic_wcs, 508 instruction, FLUSH); 509 instruction = *(u32 *)(fw->data + index); 510 index += 4; 511 } 512 } 513 index = ucode_start; 514 for (section = 0; section < numsects; section++) { 515 instruction = *(u32 *)(fw->data + index); 516 baseaddress = sectstart[section]; 517 if (baseaddress < 0x8000) 518 continue; 519 thissectionsize = sectsize[section] >> 3; 520 521 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { 522 /* Write out instruction address */ 523 slic_reg32_write(&slic_regs->slic_wcs, 524 SLIC_WCS_COMPARE | (baseaddress + codeaddr), 525 FLUSH); 526 /* Write out instruction to low addr */ 527 slic_reg32_write(&slic_regs->slic_wcs, instruction, 528 FLUSH); 529 instruction = *(u32 *)(fw->data + index); 530 index += 4; 531 /* Write out instruction to high addr */ 532 slic_reg32_write(&slic_regs->slic_wcs, instruction, 533 FLUSH); 534 instruction = *(u32 *)(fw->data + index); 535 index += 4; 536 537 /* Check SRAM location zero. If it is non-zero. Abort.*/ 538/* failure = readl((u32 __iomem *)&slic_regs->slic_reset); 539 if (failure) { 540 release_firmware(fw); 541 return -EIO; 542 }*/ 543 } 544 } 545 release_firmware(fw); 546 /* Everything OK, kick off the card */ 547 mdelay(10); 548 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH); 549 550 /* stall for 20 ms, long enough for ucode to init card 551 and reach mainloop */ 552 mdelay(20); 553 554 return 0; 555} 556 557MODULE_FIRMWARE("slicoss/oasisdownload.sys"); 558MODULE_FIRMWARE("slicoss/gbdownload.sys"); 559 560static void slic_adapter_set_hwaddr(struct adapter *adapter) 561{ 562 struct sliccard *card = adapter->card; 563 564 if ((adapter->card) && (card->config_set)) { 565 memcpy(adapter->macaddr, 566 card->config.MacInfo[adapter->functionnumber].macaddrA, 567 sizeof(struct slic_config_mac)); 568 if (is_zero_ether_addr(adapter->currmacaddr)) 569 memcpy(adapter->currmacaddr, adapter->macaddr, 570 ETH_ALEN); 571 if (adapter->netdev) 572 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 573 ETH_ALEN); 574 } 575} 576 577static void slic_intagg_set(struct adapter *adapter, u32 value) 578{ 579 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH); 580 adapter->card->loadlevel_current = value; 581} 582 583static void slic_soft_reset(struct adapter *adapter) 584{ 585 if (adapter->card->state == CARD_UP) { 586 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH); 587 mdelay(1); 588 } 589 590 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, 591 FLUSH); 592 mdelay(1); 593} 594 595static void slic_mac_address_config(struct adapter *adapter) 596{ 597 u32 value; 598 u32 value2; 599 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 600 601 value = ntohl(*(__be32 *) &adapter->currmacaddr[2]); 602 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH); 603 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH); 604 605 value2 = (u32) ((adapter->currmacaddr[0] << 8 | 606 adapter->currmacaddr[1]) & 0xFFFF); 607 608 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH); 609 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH); 610 611 /* Write our multicast mask out to the card. This is done */ 612 /* here in addition to the slic_mcast_addr_set routine */ 613 /* because ALL_MCAST may have been enabled or disabled */ 614 slic_mcast_set_mask(adapter); 615} 616 617static void slic_mac_config(struct adapter *adapter) 618{ 619 u32 value; 620 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 621 622 /* Setup GMAC gaps */ 623 if (adapter->linkspeed == LINK_1000MB) { 624 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) | 625 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) | 626 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT)); 627 } else { 628 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) | 629 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) | 630 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT)); 631 } 632 633 /* enable GMII */ 634 if (adapter->linkspeed == LINK_1000MB) 635 value |= GMCR_GBIT; 636 637 /* enable fullduplex */ 638 if ((adapter->linkduplex == LINK_FULLD) 639 || (adapter->macopts & MAC_LOOPBACK)) { 640 value |= GMCR_FULLD; 641 } 642 643 /* write mac config */ 644 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH); 645 646 /* setup mac addresses */ 647 slic_mac_address_config(adapter); 648} 649 650static void slic_config_set(struct adapter *adapter, bool linkchange) 651{ 652 u32 value; 653 u32 RcrReset; 654 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 655 656 if (linkchange) { 657 /* Setup MAC */ 658 slic_mac_config(adapter); 659 RcrReset = GRCR_RESET; 660 } else { 661 slic_mac_address_config(adapter); 662 RcrReset = 0; 663 } 664 665 if (adapter->linkduplex == LINK_FULLD) { 666 /* setup xmtcfg */ 667 value = (GXCR_RESET | /* Always reset */ 668 GXCR_XMTEN | /* Enable transmit */ 669 GXCR_PAUSEEN); /* Enable pause */ 670 671 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 672 673 /* Setup rcvcfg last */ 674 value = (RcrReset | /* Reset, if linkchange */ 675 GRCR_CTLEN | /* Enable CTL frames */ 676 GRCR_ADDRAEN | /* Address A enable */ 677 GRCR_RCVBAD | /* Rcv bad frames */ 678 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 679 } else { 680 /* setup xmtcfg */ 681 value = (GXCR_RESET | /* Always reset */ 682 GXCR_XMTEN); /* Enable transmit */ 683 684 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 685 686 /* Setup rcvcfg last */ 687 value = (RcrReset | /* Reset, if linkchange */ 688 GRCR_ADDRAEN | /* Address A enable */ 689 GRCR_RCVBAD | /* Rcv bad frames */ 690 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 691 } 692 693 if (adapter->state != ADAPT_DOWN) { 694 /* Only enable receive if we are restarting or running */ 695 value |= GRCR_RCVEN; 696 } 697 698 if (adapter->macopts & MAC_PROMISC) 699 value |= GRCR_RCVALL; 700 701 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); 702} 703 704/* 705 * Turn off RCV and XMT, power down PHY 706 */ 707static void slic_config_clear(struct adapter *adapter) 708{ 709 u32 value; 710 u32 phy_config; 711 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 712 713 /* Setup xmtcfg */ 714 value = (GXCR_RESET | /* Always reset */ 715 GXCR_PAUSEEN); /* Enable pause */ 716 717 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 718 719 value = (GRCR_RESET | /* Always reset */ 720 GRCR_CTLEN | /* Enable CTL frames */ 721 GRCR_ADDRAEN | /* Address A enable */ 722 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 723 724 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); 725 726 /* power down phy */ 727 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN)); 728 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH); 729} 730 731static bool slic_mac_filter(struct adapter *adapter, 732 struct ether_header *ether_frame) 733{ 734 struct net_device *netdev = adapter->netdev; 735 u32 opts = adapter->macopts; 736 737 if (opts & MAC_PROMISC) 738 return true; 739 740 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) { 741 if (opts & MAC_BCAST) { 742 adapter->rcv_broadcasts++; 743 return true; 744 } 745 746 return false; 747 } 748 749 if (is_multicast_ether_addr(ether_frame->ether_dhost)) { 750 if (opts & MAC_ALLMCAST) { 751 adapter->rcv_multicasts++; 752 netdev->stats.multicast++; 753 return true; 754 } 755 if (opts & MAC_MCAST) { 756 struct mcast_address *mcaddr = adapter->mcastaddrs; 757 758 while (mcaddr) { 759 if (ether_addr_equal(mcaddr->address, 760 ether_frame->ether_dhost)) { 761 adapter->rcv_multicasts++; 762 netdev->stats.multicast++; 763 return true; 764 } 765 mcaddr = mcaddr->next; 766 } 767 768 return false; 769 } 770 771 return false; 772 } 773 if (opts & MAC_DIRECTED) { 774 adapter->rcv_unicasts++; 775 return true; 776 } 777 return false; 778 779} 780 781static int slic_mac_set_address(struct net_device *dev, void *ptr) 782{ 783 struct adapter *adapter = netdev_priv(dev); 784 struct sockaddr *addr = ptr; 785 786 if (netif_running(dev)) 787 return -EBUSY; 788 if (!adapter) 789 return -EBUSY; 790 791 if (!is_valid_ether_addr(addr->sa_data)) 792 return -EINVAL; 793 794 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 795 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); 796 797 slic_config_set(adapter, true); 798 return 0; 799} 800 801static void slic_timer_load_check(ulong cardaddr) 802{ 803 struct sliccard *card = (struct sliccard *)cardaddr; 804 struct adapter *adapter = card->master; 805 u32 __iomem *intagg; 806 u32 load = card->events; 807 u32 level = 0; 808 809 if ((adapter) && (adapter->state == ADAPT_UP) && 810 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) { 811 intagg = &adapter->slic_regs->slic_intagg; 812 if (adapter->devid == SLIC_1GB_DEVICE_ID) { 813 if (adapter->linkspeed == LINK_1000MB) 814 level = 100; 815 else { 816 if (load > SLIC_LOAD_5) 817 level = SLIC_INTAGG_5; 818 else if (load > SLIC_LOAD_4) 819 level = SLIC_INTAGG_4; 820 else if (load > SLIC_LOAD_3) 821 level = SLIC_INTAGG_3; 822 else if (load > SLIC_LOAD_2) 823 level = SLIC_INTAGG_2; 824 else if (load > SLIC_LOAD_1) 825 level = SLIC_INTAGG_1; 826 else 827 level = SLIC_INTAGG_0; 828 } 829 if (card->loadlevel_current != level) { 830 card->loadlevel_current = level; 831 slic_reg32_write(intagg, level, FLUSH); 832 } 833 } else { 834 if (load > SLIC_LOAD_5) 835 level = SLIC_INTAGG_5; 836 else if (load > SLIC_LOAD_4) 837 level = SLIC_INTAGG_4; 838 else if (load > SLIC_LOAD_3) 839 level = SLIC_INTAGG_3; 840 else if (load > SLIC_LOAD_2) 841 level = SLIC_INTAGG_2; 842 else if (load > SLIC_LOAD_1) 843 level = SLIC_INTAGG_1; 844 else 845 level = SLIC_INTAGG_0; 846 if (card->loadlevel_current != level) { 847 card->loadlevel_current = level; 848 slic_reg32_write(intagg, level, FLUSH); 849 } 850 } 851 } 852 card->events = 0; 853 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ); 854 add_timer(&card->loadtimer); 855} 856 857static int slic_upr_queue_request(struct adapter *adapter, 858 u32 upr_request, 859 u32 upr_data, 860 u32 upr_data_h, 861 u32 upr_buffer, u32 upr_buffer_h) 862{ 863 struct slic_upr *upr; 864 struct slic_upr *uprqueue; 865 866 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC); 867 if (!upr) 868 return -ENOMEM; 869 870 upr->adapter = adapter->port; 871 upr->upr_request = upr_request; 872 upr->upr_data = upr_data; 873 upr->upr_buffer = upr_buffer; 874 upr->upr_data_h = upr_data_h; 875 upr->upr_buffer_h = upr_buffer_h; 876 upr->next = NULL; 877 if (adapter->upr_list) { 878 uprqueue = adapter->upr_list; 879 880 while (uprqueue->next) 881 uprqueue = uprqueue->next; 882 uprqueue->next = upr; 883 } else { 884 adapter->upr_list = upr; 885 } 886 return 0; 887} 888 889static void slic_upr_start(struct adapter *adapter) 890{ 891 struct slic_upr *upr; 892 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 893/* 894 char * ptr1; 895 char * ptr2; 896 uint cmdoffset; 897*/ 898 upr = adapter->upr_list; 899 if (!upr) 900 return; 901 if (adapter->upr_busy) 902 return; 903 adapter->upr_busy = 1; 904 905 switch (upr->upr_request) { 906 case SLIC_UPR_STATS: 907 if (upr->upr_data_h == 0) { 908 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data, 909 FLUSH); 910 } else { 911 slic_reg64_write(adapter, &slic_regs->slic_stats64, 912 upr->upr_data, 913 &slic_regs->slic_addr_upper, 914 upr->upr_data_h, FLUSH); 915 } 916 break; 917 918 case SLIC_UPR_RLSR: 919 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data, 920 &slic_regs->slic_addr_upper, upr->upr_data_h, 921 FLUSH); 922 break; 923 924 case SLIC_UPR_RCONFIG: 925 slic_reg64_write(adapter, &slic_regs->slic_rconfig, 926 upr->upr_data, &slic_regs->slic_addr_upper, 927 upr->upr_data_h, FLUSH); 928 break; 929 case SLIC_UPR_PING: 930 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH); 931 break; 932 } 933} 934 935static int slic_upr_request(struct adapter *adapter, 936 u32 upr_request, 937 u32 upr_data, 938 u32 upr_data_h, 939 u32 upr_buffer, u32 upr_buffer_h) 940{ 941 int rc; 942 943 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); 944 rc = slic_upr_queue_request(adapter, 945 upr_request, 946 upr_data, 947 upr_data_h, upr_buffer, upr_buffer_h); 948 if (rc) 949 goto err_unlock_irq; 950 951 slic_upr_start(adapter); 952err_unlock_irq: 953 spin_unlock_irqrestore(&adapter->upr_lock.lock, 954 adapter->upr_lock.flags); 955 return rc; 956} 957 958static void slic_link_upr_complete(struct adapter *adapter, u32 isr) 959{ 960 u32 linkstatus = adapter->pshmem->linkstatus; 961 uint linkup; 962 unsigned char linkspeed; 963 unsigned char linkduplex; 964 965 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { 966 struct slic_shmem *pshmem; 967 968 pshmem = (struct slic_shmem *)(unsigned long) 969 adapter->phys_shmem; 970#if BITS_PER_LONG == 64 971 slic_upr_queue_request(adapter, 972 SLIC_UPR_RLSR, 973 SLIC_GET_ADDR_LOW(&pshmem->linkstatus), 974 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus), 975 0, 0); 976#else 977 slic_upr_queue_request(adapter, 978 SLIC_UPR_RLSR, 979 (u32) &pshmem->linkstatus, 980 SLIC_GET_ADDR_HIGH(pshmem), 0, 0); 981#endif 982 return; 983 } 984 if (adapter->state != ADAPT_UP) 985 return; 986 987 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN; 988 if (linkstatus & GIG_SPEED_1000) 989 linkspeed = LINK_1000MB; 990 else if (linkstatus & GIG_SPEED_100) 991 linkspeed = LINK_100MB; 992 else 993 linkspeed = LINK_10MB; 994 995 if (linkstatus & GIG_FULLDUPLEX) 996 linkduplex = LINK_FULLD; 997 else 998 linkduplex = LINK_HALFD; 999 1000 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) 1001 return; 1002 1003 /* link up event, but nothing has changed */ 1004 if ((adapter->linkstate == LINK_UP) && 1005 (linkup == LINK_UP) && 1006 (adapter->linkspeed == linkspeed) && 1007 (adapter->linkduplex == linkduplex)) 1008 return; 1009 1010 /* link has changed at this point */ 1011 1012 /* link has gone from up to down */ 1013 if (linkup == LINK_DOWN) { 1014 adapter->linkstate = LINK_DOWN; 1015 return; 1016 } 1017 1018 /* link has gone from down to up */ 1019 adapter->linkspeed = linkspeed; 1020 adapter->linkduplex = linkduplex; 1021 1022 if (adapter->linkstate != LINK_UP) { 1023 /* setup the mac */ 1024 slic_config_set(adapter, true); 1025 adapter->linkstate = LINK_UP; 1026 netif_start_queue(adapter->netdev); 1027 } 1028} 1029 1030static void slic_upr_request_complete(struct adapter *adapter, u32 isr) 1031{ 1032 struct sliccard *card = adapter->card; 1033 struct slic_upr *upr; 1034 1035 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); 1036 upr = adapter->upr_list; 1037 if (!upr) { 1038 spin_unlock_irqrestore(&adapter->upr_lock.lock, 1039 adapter->upr_lock.flags); 1040 return; 1041 } 1042 adapter->upr_list = upr->next; 1043 upr->next = NULL; 1044 adapter->upr_busy = 0; 1045 switch (upr->upr_request) { 1046 case SLIC_UPR_STATS: 1047 { 1048 struct slic_stats *slicstats = 1049 (struct slic_stats *) &adapter->pshmem->inicstats; 1050 struct slic_stats *newstats = slicstats; 1051 struct slic_stats *old = &adapter->inicstats_prev; 1052 struct slicnet_stats *stst = &adapter->slic_stats; 1053 1054 if (isr & ISR_UPCERR) { 1055 dev_err(&adapter->netdev->dev, 1056 "SLIC_UPR_STATS command failed isr[%x]\n", 1057 isr); 1058 1059 break; 1060 } 1061 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs, 1062 newstats->xmit_tcp_segs_gb, 1063 old->xmit_tcp_segs_gb); 1064 1065 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes, 1066 newstats->xmit_tcp_bytes_gb, 1067 old->xmit_tcp_bytes_gb); 1068 1069 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs, 1070 newstats->rcv_tcp_segs_gb, 1071 old->rcv_tcp_segs_gb); 1072 1073 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes, 1074 newstats->rcv_tcp_bytes_gb, 1075 old->rcv_tcp_bytes_gb); 1076 1077 UPDATE_STATS_GB(stst->iface.xmt_bytes, 1078 newstats->xmit_bytes_gb, 1079 old->xmit_bytes_gb); 1080 1081 UPDATE_STATS_GB(stst->iface.xmt_ucast, 1082 newstats->xmit_unicasts_gb, 1083 old->xmit_unicasts_gb); 1084 1085 UPDATE_STATS_GB(stst->iface.rcv_bytes, 1086 newstats->rcv_bytes_gb, 1087 old->rcv_bytes_gb); 1088 1089 UPDATE_STATS_GB(stst->iface.rcv_ucast, 1090 newstats->rcv_unicasts_gb, 1091 old->rcv_unicasts_gb); 1092 1093 UPDATE_STATS_GB(stst->iface.xmt_errors, 1094 newstats->xmit_collisions_gb, 1095 old->xmit_collisions_gb); 1096 1097 UPDATE_STATS_GB(stst->iface.xmt_errors, 1098 newstats->xmit_excess_collisions_gb, 1099 old->xmit_excess_collisions_gb); 1100 1101 UPDATE_STATS_GB(stst->iface.xmt_errors, 1102 newstats->xmit_other_error_gb, 1103 old->xmit_other_error_gb); 1104 1105 UPDATE_STATS_GB(stst->iface.rcv_errors, 1106 newstats->rcv_other_error_gb, 1107 old->rcv_other_error_gb); 1108 1109 UPDATE_STATS_GB(stst->iface.rcv_discards, 1110 newstats->rcv_drops_gb, 1111 old->rcv_drops_gb); 1112 1113 if (newstats->rcv_drops_gb > old->rcv_drops_gb) { 1114 adapter->rcv_drops += 1115 (newstats->rcv_drops_gb - 1116 old->rcv_drops_gb); 1117 } 1118 memcpy(old, newstats, sizeof(struct slic_stats)); 1119 break; 1120 } 1121 case SLIC_UPR_RLSR: 1122 slic_link_upr_complete(adapter, isr); 1123 break; 1124 case SLIC_UPR_RCONFIG: 1125 break; 1126 case SLIC_UPR_PING: 1127 card->pingstatus |= (isr & ISR_PINGDSMASK); 1128 break; 1129 } 1130 kfree(upr); 1131 slic_upr_start(adapter); 1132 spin_unlock_irqrestore(&adapter->upr_lock.lock, 1133 adapter->upr_lock.flags); 1134} 1135 1136static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h) 1137{ 1138 return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h, 1139 0, 0); 1140} 1141 1142/* 1143 * Compute a checksum of the EEPROM according to RFC 1071. 1144 */ 1145static u16 slic_eeprom_cksum(void *eeprom, unsigned len) 1146{ 1147 u16 *wp = eeprom; 1148 u32 checksum = 0; 1149 1150 while (len > 1) { 1151 checksum += *(wp++); 1152 len -= 2; 1153 } 1154 1155 if (len > 0) 1156 checksum += *(u8 *) wp; 1157 1158 1159 while (checksum >> 16) 1160 checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF); 1161 1162 return ~checksum; 1163} 1164 1165static void slic_rspqueue_free(struct adapter *adapter) 1166{ 1167 int i; 1168 struct slic_rspqueue *rspq = &adapter->rspqueue; 1169 1170 for (i = 0; i < rspq->num_pages; i++) { 1171 if (rspq->vaddr[i]) { 1172 pci_free_consistent(adapter->pcidev, PAGE_SIZE, 1173 rspq->vaddr[i], rspq->paddr[i]); 1174 } 1175 rspq->vaddr[i] = NULL; 1176 rspq->paddr[i] = 0; 1177 } 1178 rspq->offset = 0; 1179 rspq->pageindex = 0; 1180 rspq->rspbuf = NULL; 1181} 1182 1183static int slic_rspqueue_init(struct adapter *adapter) 1184{ 1185 int i; 1186 struct slic_rspqueue *rspq = &adapter->rspqueue; 1187 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 1188 u32 paddrh = 0; 1189 1190 memset(rspq, 0, sizeof(struct slic_rspqueue)); 1191 1192 rspq->num_pages = SLIC_RSPQ_PAGES_GB; 1193 1194 for (i = 0; i < rspq->num_pages; i++) { 1195 rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev, 1196 PAGE_SIZE, 1197 &rspq->paddr[i]); 1198 if (!rspq->vaddr[i]) { 1199 dev_err(&adapter->pcidev->dev, 1200 "pci_alloc_consistent failed\n"); 1201 slic_rspqueue_free(adapter); 1202 return -ENOMEM; 1203 } 1204 1205 if (paddrh == 0) { 1206 slic_reg32_write(&slic_regs->slic_rbar, 1207 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE), 1208 DONT_FLUSH); 1209 } else { 1210 slic_reg64_write(adapter, &slic_regs->slic_rbar64, 1211 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE), 1212 &slic_regs->slic_addr_upper, 1213 paddrh, DONT_FLUSH); 1214 } 1215 } 1216 rspq->offset = 0; 1217 rspq->pageindex = 0; 1218 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0]; 1219 return 0; 1220} 1221 1222static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter) 1223{ 1224 struct slic_rspqueue *rspq = &adapter->rspqueue; 1225 struct slic_rspbuf *buf; 1226 1227 if (!(rspq->rspbuf->status)) 1228 return NULL; 1229 1230 buf = rspq->rspbuf; 1231 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) { 1232 rspq->rspbuf++; 1233 } else { 1234 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64, 1235 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE), 1236 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH); 1237 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages; 1238 rspq->offset = 0; 1239 rspq->rspbuf = (struct slic_rspbuf *) 1240 rspq->vaddr[rspq->pageindex]; 1241 } 1242 1243 return buf; 1244} 1245 1246static void slic_cmdqmem_free(struct adapter *adapter) 1247{ 1248 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; 1249 int i; 1250 1251 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) { 1252 if (cmdqmem->pages[i]) { 1253 pci_free_consistent(adapter->pcidev, 1254 PAGE_SIZE, 1255 (void *) cmdqmem->pages[i], 1256 cmdqmem->dma_pages[i]); 1257 } 1258 } 1259 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem)); 1260} 1261 1262static u32 *slic_cmdqmem_addpage(struct adapter *adapter) 1263{ 1264 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; 1265 u32 *pageaddr; 1266 1267 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES) 1268 return NULL; 1269 pageaddr = pci_alloc_consistent(adapter->pcidev, 1270 PAGE_SIZE, 1271 &cmdqmem->dma_pages[cmdqmem->pagecnt]); 1272 if (!pageaddr) 1273 return NULL; 1274 1275 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr; 1276 cmdqmem->pagecnt++; 1277 return pageaddr; 1278} 1279 1280static void slic_cmdq_free(struct adapter *adapter) 1281{ 1282 struct slic_hostcmd *cmd; 1283 1284 cmd = adapter->cmdq_all.head; 1285 while (cmd) { 1286 if (cmd->busy) { 1287 struct sk_buff *tempskb; 1288 1289 tempskb = cmd->skb; 1290 if (tempskb) { 1291 cmd->skb = NULL; 1292 dev_kfree_skb_irq(tempskb); 1293 } 1294 } 1295 cmd = cmd->next_all; 1296 } 1297 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); 1298 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); 1299 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); 1300 slic_cmdqmem_free(adapter); 1301} 1302 1303static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page) 1304{ 1305 struct slic_hostcmd *cmd; 1306 struct slic_hostcmd *prev; 1307 struct slic_hostcmd *tail; 1308 struct slic_cmdqueue *cmdq; 1309 int cmdcnt; 1310 void *cmdaddr; 1311 ulong phys_addr; 1312 u32 phys_addrl; 1313 u32 phys_addrh; 1314 struct slic_handle *pslic_handle; 1315 1316 cmdaddr = page; 1317 cmd = (struct slic_hostcmd *)cmdaddr; 1318 cmdcnt = 0; 1319 1320 phys_addr = virt_to_bus((void *)page); 1321 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr); 1322 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr); 1323 1324 prev = NULL; 1325 tail = cmd; 1326 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) && 1327 (adapter->slic_handle_ix < 256)) { 1328 /* Allocate and initialize a SLIC_HANDLE for this command */ 1329 spin_lock_irqsave(&adapter->handle_lock.lock, 1330 adapter->handle_lock.flags); 1331 pslic_handle = adapter->pfree_slic_handles; 1332 adapter->pfree_slic_handles = pslic_handle->next; 1333 spin_unlock_irqrestore(&adapter->handle_lock.lock, 1334 adapter->handle_lock.flags); 1335 pslic_handle->type = SLIC_HANDLE_CMD; 1336 pslic_handle->address = (void *) cmd; 1337 pslic_handle->offset = (ushort) adapter->slic_handle_ix++; 1338 pslic_handle->other_handle = NULL; 1339 pslic_handle->next = NULL; 1340 1341 cmd->pslic_handle = pslic_handle; 1342 cmd->cmd64.hosthandle = pslic_handle->token.handle_token; 1343 cmd->busy = false; 1344 cmd->paddrl = phys_addrl; 1345 cmd->paddrh = phys_addrh; 1346 cmd->next_all = prev; 1347 cmd->next = prev; 1348 prev = cmd; 1349 phys_addrl += SLIC_HOSTCMD_SIZE; 1350 cmdaddr += SLIC_HOSTCMD_SIZE; 1351 1352 cmd = (struct slic_hostcmd *)cmdaddr; 1353 cmdcnt++; 1354 } 1355 1356 cmdq = &adapter->cmdq_all; 1357 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ 1358 tail->next_all = cmdq->head; 1359 cmdq->head = prev; 1360 cmdq = &adapter->cmdq_free; 1361 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags); 1362 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ 1363 tail->next = cmdq->head; 1364 cmdq->head = prev; 1365 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags); 1366} 1367 1368static int slic_cmdq_init(struct adapter *adapter) 1369{ 1370 int i; 1371 u32 *pageaddr; 1372 1373 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); 1374 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); 1375 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); 1376 spin_lock_init(&adapter->cmdq_all.lock.lock); 1377 spin_lock_init(&adapter->cmdq_free.lock.lock); 1378 spin_lock_init(&adapter->cmdq_done.lock.lock); 1379 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem)); 1380 adapter->slic_handle_ix = 1; 1381 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) { 1382 pageaddr = slic_cmdqmem_addpage(adapter); 1383 if (!pageaddr) { 1384 slic_cmdq_free(adapter); 1385 return -ENOMEM; 1386 } 1387 slic_cmdq_addcmdpage(adapter, pageaddr); 1388 } 1389 adapter->slic_handle_ix = 1; 1390 1391 return 0; 1392} 1393 1394static void slic_cmdq_reset(struct adapter *adapter) 1395{ 1396 struct slic_hostcmd *hcmd; 1397 struct sk_buff *skb; 1398 u32 outstanding; 1399 1400 spin_lock_irqsave(&adapter->cmdq_free.lock.lock, 1401 adapter->cmdq_free.lock.flags); 1402 spin_lock_irqsave(&adapter->cmdq_done.lock.lock, 1403 adapter->cmdq_done.lock.flags); 1404 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count; 1405 outstanding -= adapter->cmdq_free.count; 1406 hcmd = adapter->cmdq_all.head; 1407 while (hcmd) { 1408 if (hcmd->busy) { 1409 skb = hcmd->skb; 1410 hcmd->busy = 0; 1411 hcmd->skb = NULL; 1412 dev_kfree_skb_irq(skb); 1413 } 1414 hcmd = hcmd->next_all; 1415 } 1416 adapter->cmdq_free.count = 0; 1417 adapter->cmdq_free.head = NULL; 1418 adapter->cmdq_free.tail = NULL; 1419 adapter->cmdq_done.count = 0; 1420 adapter->cmdq_done.head = NULL; 1421 adapter->cmdq_done.tail = NULL; 1422 adapter->cmdq_free.head = adapter->cmdq_all.head; 1423 hcmd = adapter->cmdq_all.head; 1424 while (hcmd) { 1425 adapter->cmdq_free.count++; 1426 hcmd->next = hcmd->next_all; 1427 hcmd = hcmd->next_all; 1428 } 1429 if (adapter->cmdq_free.count != adapter->cmdq_all.count) { 1430 dev_err(&adapter->netdev->dev, 1431 "free_count %d != all count %d\n", 1432 adapter->cmdq_free.count, adapter->cmdq_all.count); 1433 } 1434 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock, 1435 adapter->cmdq_done.lock.flags); 1436 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock, 1437 adapter->cmdq_free.lock.flags); 1438} 1439 1440static void slic_cmdq_getdone(struct adapter *adapter) 1441{ 1442 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done; 1443 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free; 1444 1445 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags); 1446 1447 free_cmdq->head = done_cmdq->head; 1448 free_cmdq->count = done_cmdq->count; 1449 done_cmdq->head = NULL; 1450 done_cmdq->tail = NULL; 1451 done_cmdq->count = 0; 1452 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags); 1453} 1454 1455static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter) 1456{ 1457 struct slic_cmdqueue *cmdq = &adapter->cmdq_free; 1458 struct slic_hostcmd *cmd = NULL; 1459 1460lock_and_retry: 1461 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags); 1462retry: 1463 cmd = cmdq->head; 1464 if (cmd) { 1465 cmdq->head = cmd->next; 1466 cmdq->count--; 1467 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags); 1468 } else { 1469 slic_cmdq_getdone(adapter); 1470 cmd = cmdq->head; 1471 if (cmd) { 1472 goto retry; 1473 } else { 1474 u32 *pageaddr; 1475 1476 spin_unlock_irqrestore(&cmdq->lock.lock, 1477 cmdq->lock.flags); 1478 pageaddr = slic_cmdqmem_addpage(adapter); 1479 if (pageaddr) { 1480 slic_cmdq_addcmdpage(adapter, pageaddr); 1481 goto lock_and_retry; 1482 } 1483 } 1484 } 1485 return cmd; 1486} 1487 1488static void slic_cmdq_putdone_irq(struct adapter *adapter, 1489 struct slic_hostcmd *cmd) 1490{ 1491 struct slic_cmdqueue *cmdq = &adapter->cmdq_done; 1492 1493 spin_lock(&cmdq->lock.lock); 1494 cmd->busy = 0; 1495 cmd->next = cmdq->head; 1496 cmdq->head = cmd; 1497 cmdq->count++; 1498 if ((adapter->xmitq_full) && (cmdq->count > 10)) 1499 netif_wake_queue(adapter->netdev); 1500 spin_unlock(&cmdq->lock.lock); 1501} 1502 1503static int slic_rcvqueue_fill(struct adapter *adapter) 1504{ 1505 void *paddr; 1506 u32 paddrl; 1507 u32 paddrh; 1508 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1509 int i = 0; 1510 struct device *dev = &adapter->netdev->dev; 1511 1512 while (i < SLIC_RCVQ_FILLENTRIES) { 1513 struct slic_rcvbuf *rcvbuf; 1514 struct sk_buff *skb; 1515#ifdef KLUDGE_FOR_4GB_BOUNDARY 1516retry_rcvqfill: 1517#endif 1518 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC); 1519 if (skb) { 1520 paddr = (void *)(unsigned long) 1521 pci_map_single(adapter->pcidev, 1522 skb->data, 1523 SLIC_RCVQ_RCVBUFSIZE, 1524 PCI_DMA_FROMDEVICE); 1525 paddrl = SLIC_GET_ADDR_LOW(paddr); 1526 paddrh = SLIC_GET_ADDR_HIGH(paddr); 1527 1528 skb->len = SLIC_RCVBUF_HEADSIZE; 1529 rcvbuf = (struct slic_rcvbuf *)skb->head; 1530 rcvbuf->status = 0; 1531 skb->next = NULL; 1532#ifdef KLUDGE_FOR_4GB_BOUNDARY 1533 if (paddrl == 0) { 1534 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1535 __func__); 1536 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1537 dev_err(dev, " skbdata[%p]\n", 1538 skb->data); 1539 dev_err(dev, " skblen[%x]\n", skb->len); 1540 dev_err(dev, " paddr[%p]\n", paddr); 1541 dev_err(dev, " paddrl[%x]\n", paddrl); 1542 dev_err(dev, " paddrh[%x]\n", paddrh); 1543 dev_err(dev, " rcvq->head[%p]\n", 1544 rcvq->head); 1545 dev_err(dev, " rcvq->tail[%p]\n", 1546 rcvq->tail); 1547 dev_err(dev, " rcvq->count[%x]\n", 1548 rcvq->count); 1549 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n"); 1550 goto retry_rcvqfill; 1551 } 1552#else 1553 if (paddrl == 0) { 1554 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1555 __func__); 1556 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1557 dev_err(dev, " skbdata[%p]\n", 1558 skb->data); 1559 dev_err(dev, " skblen[%x]\n", skb->len); 1560 dev_err(dev, " paddr[%p]\n", paddr); 1561 dev_err(dev, " paddrl[%x]\n", paddrl); 1562 dev_err(dev, " paddrh[%x]\n", paddrh); 1563 dev_err(dev, " rcvq->head[%p]\n", 1564 rcvq->head); 1565 dev_err(dev, " rcvq->tail[%p]\n", 1566 rcvq->tail); 1567 dev_err(dev, " rcvq->count[%x]\n", 1568 rcvq->count); 1569 dev_err(dev, "GIVE TO CARD ANYWAY\n"); 1570 } 1571#endif 1572 if (paddrh == 0) { 1573 slic_reg32_write(&adapter->slic_regs->slic_hbar, 1574 (u32)paddrl, DONT_FLUSH); 1575 } else { 1576 slic_reg64_write(adapter, 1577 &adapter->slic_regs->slic_hbar64, 1578 paddrl, 1579 &adapter->slic_regs->slic_addr_upper, 1580 paddrh, DONT_FLUSH); 1581 } 1582 if (rcvq->head) 1583 rcvq->tail->next = skb; 1584 else 1585 rcvq->head = skb; 1586 rcvq->tail = skb; 1587 rcvq->count++; 1588 i++; 1589 } else { 1590 dev_err(&adapter->netdev->dev, 1591 "slic_rcvqueue_fill could only get [%d] skbuffs\n", 1592 i); 1593 break; 1594 } 1595 } 1596 return i; 1597} 1598 1599static void slic_rcvqueue_free(struct adapter *adapter) 1600{ 1601 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1602 struct sk_buff *skb; 1603 1604 while (rcvq->head) { 1605 skb = rcvq->head; 1606 rcvq->head = rcvq->head->next; 1607 dev_kfree_skb(skb); 1608 } 1609 rcvq->tail = NULL; 1610 rcvq->head = NULL; 1611 rcvq->count = 0; 1612} 1613 1614static int slic_rcvqueue_init(struct adapter *adapter) 1615{ 1616 int i, count; 1617 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1618 1619 rcvq->tail = NULL; 1620 rcvq->head = NULL; 1621 rcvq->size = SLIC_RCVQ_ENTRIES; 1622 rcvq->errors = 0; 1623 rcvq->count = 0; 1624 i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES; 1625 count = 0; 1626 while (i) { 1627 count += slic_rcvqueue_fill(adapter); 1628 i--; 1629 } 1630 if (rcvq->count < SLIC_RCVQ_MINENTRIES) { 1631 slic_rcvqueue_free(adapter); 1632 return -ENOMEM; 1633 } 1634 return 0; 1635} 1636 1637static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter) 1638{ 1639 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1640 struct sk_buff *skb; 1641 struct slic_rcvbuf *rcvbuf; 1642 int count; 1643 1644 if (rcvq->count) { 1645 skb = rcvq->head; 1646 rcvbuf = (struct slic_rcvbuf *)skb->head; 1647 1648 if (rcvbuf->status & IRHDDR_SVALID) { 1649 rcvq->head = rcvq->head->next; 1650 skb->next = NULL; 1651 rcvq->count--; 1652 } else { 1653 skb = NULL; 1654 } 1655 } else { 1656 dev_err(&adapter->netdev->dev, 1657 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count); 1658 skb = NULL; 1659 } 1660 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) { 1661 count = slic_rcvqueue_fill(adapter); 1662 if (!count) 1663 break; 1664 } 1665 if (skb) 1666 rcvq->errors = 0; 1667 return skb; 1668} 1669 1670static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb) 1671{ 1672 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1673 void *paddr; 1674 u32 paddrl; 1675 u32 paddrh; 1676 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head; 1677 struct device *dev; 1678 1679 paddr = (void *)(unsigned long) 1680 pci_map_single(adapter->pcidev, skb->head, 1681 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE); 1682 rcvbuf->status = 0; 1683 skb->next = NULL; 1684 1685 paddrl = SLIC_GET_ADDR_LOW(paddr); 1686 paddrh = SLIC_GET_ADDR_HIGH(paddr); 1687 1688 if (paddrl == 0) { 1689 dev = &adapter->netdev->dev; 1690 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1691 __func__); 1692 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1693 dev_err(dev, " skbdata[%p]\n", skb->data); 1694 dev_err(dev, " skblen[%x]\n", skb->len); 1695 dev_err(dev, " paddr[%p]\n", paddr); 1696 dev_err(dev, " paddrl[%x]\n", paddrl); 1697 dev_err(dev, " paddrh[%x]\n", paddrh); 1698 dev_err(dev, " rcvq->head[%p]\n", rcvq->head); 1699 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); 1700 dev_err(dev, " rcvq->count[%x]\n", rcvq->count); 1701 } 1702 if (paddrh == 0) { 1703 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl, 1704 DONT_FLUSH); 1705 } else { 1706 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64, 1707 paddrl, &adapter->slic_regs->slic_addr_upper, 1708 paddrh, DONT_FLUSH); 1709 } 1710 if (rcvq->head) 1711 rcvq->tail->next = skb; 1712 else 1713 rcvq->head = skb; 1714 rcvq->tail = skb; 1715 rcvq->count++; 1716 return rcvq->count; 1717} 1718 1719/* 1720 * slic_link_event_handler - 1721 * 1722 * Initiate a link configuration sequence. The link configuration begins 1723 * by issuing a READ_LINK_STATUS command to the Utility Processor on the 1724 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete 1725 * routine will follow it up witha UP configuration write command, which 1726 * will also complete asynchronously. 1727 * 1728 */ 1729static void slic_link_event_handler(struct adapter *adapter) 1730{ 1731 int status; 1732 struct slic_shmem *pshmem; 1733 1734 if (adapter->state != ADAPT_UP) { 1735 /* Adapter is not operational. Ignore. */ 1736 return; 1737 } 1738 1739 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem; 1740 1741#if BITS_PER_LONG == 64 1742 status = slic_upr_request(adapter, 1743 SLIC_UPR_RLSR, 1744 SLIC_GET_ADDR_LOW(&pshmem->linkstatus), 1745 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus), 1746 0, 0); 1747#else 1748 status = slic_upr_request(adapter, SLIC_UPR_RLSR, 1749 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */ 1750 0, 0, 0); 1751#endif 1752} 1753 1754static void slic_init_cleanup(struct adapter *adapter) 1755{ 1756 if (adapter->intrregistered) { 1757 adapter->intrregistered = 0; 1758 free_irq(adapter->netdev->irq, adapter->netdev); 1759 1760 } 1761 if (adapter->pshmem) { 1762 pci_free_consistent(adapter->pcidev, 1763 sizeof(struct slic_shmem), 1764 adapter->pshmem, adapter->phys_shmem); 1765 adapter->pshmem = NULL; 1766 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL; 1767 } 1768 1769 if (adapter->pingtimerset) { 1770 adapter->pingtimerset = 0; 1771 del_timer(&adapter->pingtimer); 1772 } 1773 1774 slic_rspqueue_free(adapter); 1775 slic_cmdq_free(adapter); 1776 slic_rcvqueue_free(adapter); 1777} 1778 1779/* 1780 * Allocate a mcast_address structure to hold the multicast address. 1781 * Link it in. 1782 */ 1783static int slic_mcast_add_list(struct adapter *adapter, char *address) 1784{ 1785 struct mcast_address *mcaddr, *mlist; 1786 1787 /* Check to see if it already exists */ 1788 mlist = adapter->mcastaddrs; 1789 while (mlist) { 1790 if (ether_addr_equal(mlist->address, address)) 1791 return 0; 1792 mlist = mlist->next; 1793 } 1794 1795 /* Doesn't already exist. Allocate a structure to hold it */ 1796 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC); 1797 if (mcaddr == NULL) 1798 return 1; 1799 1800 ether_addr_copy(mcaddr->address, address); 1801 1802 mcaddr->next = adapter->mcastaddrs; 1803 adapter->mcastaddrs = mcaddr; 1804 1805 return 0; 1806} 1807 1808static void slic_mcast_set_list(struct net_device *dev) 1809{ 1810 struct adapter *adapter = netdev_priv(dev); 1811 int status = 0; 1812 char *addresses; 1813 struct netdev_hw_addr *ha; 1814 1815 netdev_for_each_mc_addr(ha, dev) { 1816 addresses = (char *) &ha->addr; 1817 status = slic_mcast_add_list(adapter, addresses); 1818 if (status != 0) 1819 break; 1820 slic_mcast_set_bit(adapter, addresses); 1821 } 1822 1823 if (adapter->devflags_prev != dev->flags) { 1824 adapter->macopts = MAC_DIRECTED; 1825 if (dev->flags) { 1826 if (dev->flags & IFF_BROADCAST) 1827 adapter->macopts |= MAC_BCAST; 1828 if (dev->flags & IFF_PROMISC) 1829 adapter->macopts |= MAC_PROMISC; 1830 if (dev->flags & IFF_ALLMULTI) 1831 adapter->macopts |= MAC_ALLMCAST; 1832 if (dev->flags & IFF_MULTICAST) 1833 adapter->macopts |= MAC_MCAST; 1834 } 1835 adapter->devflags_prev = dev->flags; 1836 slic_config_set(adapter, true); 1837 } else { 1838 if (status == 0) 1839 slic_mcast_set_mask(adapter); 1840 } 1841} 1842 1843#define XMIT_FAIL_LINK_STATE 1 1844#define XMIT_FAIL_ZERO_LENGTH 2 1845#define XMIT_FAIL_HOSTCMD_FAIL 3 1846 1847static void slic_xmit_build_request(struct adapter *adapter, 1848 struct slic_hostcmd *hcmd, struct sk_buff *skb) 1849{ 1850 struct slic_host64_cmd *ihcmd; 1851 ulong phys_addr; 1852 1853 ihcmd = &hcmd->cmd64; 1854 1855 ihcmd->flags = (adapter->port << IHFLG_IFSHFT); 1856 ihcmd->command = IHCMD_XMT_REQ; 1857 ihcmd->u.slic_buffers.totlen = skb->len; 1858 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, 1859 PCI_DMA_TODEVICE); 1860 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr); 1861 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr); 1862 ihcmd->u.slic_buffers.bufs[0].length = skb->len; 1863#if BITS_PER_LONG == 64 1864 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] - 1865 (u64) hcmd) + 31) >> 5); 1866#else 1867 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] - 1868 (u32) hcmd) + 31) >> 5); 1869#endif 1870} 1871 1872static void slic_xmit_fail(struct adapter *adapter, 1873 struct sk_buff *skb, 1874 void *cmd, u32 skbtype, u32 status) 1875{ 1876 if (adapter->xmitq_full) 1877 netif_stop_queue(adapter->netdev); 1878 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) { 1879 switch (status) { 1880 case XMIT_FAIL_LINK_STATE: 1881 dev_err(&adapter->netdev->dev, 1882 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n", 1883 skb, skb->pkt_type, 1884 SLIC_LINKSTATE(adapter->linkstate), 1885 SLIC_ADAPTER_STATE(adapter->state), 1886 adapter->state, 1887 SLIC_CARD_STATE(adapter->card->state), 1888 adapter->card->state); 1889 break; 1890 case XMIT_FAIL_ZERO_LENGTH: 1891 dev_err(&adapter->netdev->dev, 1892 "xmit_start skb->len == 0 skb[%p] type[%x]\n", 1893 skb, skb->pkt_type); 1894 break; 1895 case XMIT_FAIL_HOSTCMD_FAIL: 1896 dev_err(&adapter->netdev->dev, 1897 "xmit_start skb[%p] type[%x] No host commands available\n", 1898 skb, skb->pkt_type); 1899 break; 1900 } 1901 } 1902 dev_kfree_skb(skb); 1903 adapter->netdev->stats.tx_dropped++; 1904} 1905 1906static void slic_rcv_handle_error(struct adapter *adapter, 1907 struct slic_rcvbuf *rcvbuf) 1908{ 1909 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data; 1910 struct net_device *netdev = adapter->netdev; 1911 1912 if (adapter->devid != SLIC_1GB_DEVICE_ID) { 1913 if (hdr->frame_status14 & VRHSTAT_802OE) 1914 adapter->if_events.oflow802++; 1915 if (hdr->frame_status14 & VRHSTAT_TPOFLO) 1916 adapter->if_events.Tprtoflow++; 1917 if (hdr->frame_status_b14 & VRHSTATB_802UE) 1918 adapter->if_events.uflow802++; 1919 if (hdr->frame_status_b14 & VRHSTATB_RCVE) { 1920 adapter->if_events.rcvearly++; 1921 netdev->stats.rx_fifo_errors++; 1922 } 1923 if (hdr->frame_status_b14 & VRHSTATB_BUFF) { 1924 adapter->if_events.Bufov++; 1925 netdev->stats.rx_over_errors++; 1926 } 1927 if (hdr->frame_status_b14 & VRHSTATB_CARRE) { 1928 adapter->if_events.Carre++; 1929 netdev->stats.tx_carrier_errors++; 1930 } 1931 if (hdr->frame_status_b14 & VRHSTATB_LONGE) 1932 adapter->if_events.Longe++; 1933 if (hdr->frame_status_b14 & VRHSTATB_PREA) 1934 adapter->if_events.Invp++; 1935 if (hdr->frame_status_b14 & VRHSTATB_CRC) { 1936 adapter->if_events.Crc++; 1937 netdev->stats.rx_crc_errors++; 1938 } 1939 if (hdr->frame_status_b14 & VRHSTATB_DRBL) 1940 adapter->if_events.Drbl++; 1941 if (hdr->frame_status_b14 & VRHSTATB_CODE) 1942 adapter->if_events.Code++; 1943 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM) 1944 adapter->if_events.TpCsum++; 1945 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN) 1946 adapter->if_events.TpHlen++; 1947 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM) 1948 adapter->if_events.IpCsum++; 1949 if (hdr->frame_status_b14 & VRHSTATB_IPLERR) 1950 adapter->if_events.IpLen++; 1951 if (hdr->frame_status_b14 & VRHSTATB_IPHERR) 1952 adapter->if_events.IpHlen++; 1953 } else { 1954 if (hdr->frame_statusGB & VGBSTAT_XPERR) { 1955 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT; 1956 1957 if (xerr == VGBSTAT_XCSERR) 1958 adapter->if_events.TpCsum++; 1959 if (xerr == VGBSTAT_XUFLOW) 1960 adapter->if_events.Tprtoflow++; 1961 if (xerr == VGBSTAT_XHLEN) 1962 adapter->if_events.TpHlen++; 1963 } 1964 if (hdr->frame_statusGB & VGBSTAT_NETERR) { 1965 u32 nerr = 1966 (hdr-> 1967 frame_statusGB >> VGBSTAT_NERRSHFT) & 1968 VGBSTAT_NERRMSK; 1969 if (nerr == VGBSTAT_NCSERR) 1970 adapter->if_events.IpCsum++; 1971 if (nerr == VGBSTAT_NUFLOW) 1972 adapter->if_events.IpLen++; 1973 if (nerr == VGBSTAT_NHLEN) 1974 adapter->if_events.IpHlen++; 1975 } 1976 if (hdr->frame_statusGB & VGBSTAT_LNKERR) { 1977 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK; 1978 1979 if (lerr == VGBSTAT_LDEARLY) 1980 adapter->if_events.rcvearly++; 1981 if (lerr == VGBSTAT_LBOFLO) 1982 adapter->if_events.Bufov++; 1983 if (lerr == VGBSTAT_LCODERR) 1984 adapter->if_events.Code++; 1985 if (lerr == VGBSTAT_LDBLNBL) 1986 adapter->if_events.Drbl++; 1987 if (lerr == VGBSTAT_LCRCERR) 1988 adapter->if_events.Crc++; 1989 if (lerr == VGBSTAT_LOFLO) 1990 adapter->if_events.oflow802++; 1991 if (lerr == VGBSTAT_LUFLO) 1992 adapter->if_events.uflow802++; 1993 } 1994 } 1995} 1996 1997#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000 1998#define M_FAST_PATH 0x0040 1999 2000static void slic_rcv_handler(struct adapter *adapter) 2001{ 2002 struct net_device *netdev = adapter->netdev; 2003 struct sk_buff *skb; 2004 struct slic_rcvbuf *rcvbuf; 2005 u32 frames = 0; 2006 2007 while ((skb = slic_rcvqueue_getnext(adapter))) { 2008 u32 rx_bytes; 2009 2010 rcvbuf = (struct slic_rcvbuf *)skb->head; 2011 adapter->card->events++; 2012 if (rcvbuf->status & IRHDDR_ERR) { 2013 adapter->rx_errors++; 2014 slic_rcv_handle_error(adapter, rcvbuf); 2015 slic_rcvqueue_reinsert(adapter, skb); 2016 continue; 2017 } 2018 2019 if (!slic_mac_filter(adapter, (struct ether_header *) 2020 rcvbuf->data)) { 2021 slic_rcvqueue_reinsert(adapter, skb); 2022 continue; 2023 } 2024 skb_pull(skb, SLIC_RCVBUF_HEADSIZE); 2025 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK); 2026 skb_put(skb, rx_bytes); 2027 netdev->stats.rx_packets++; 2028 netdev->stats.rx_bytes += rx_bytes; 2029#if SLIC_OFFLOAD_IP_CHECKSUM 2030 skb->ip_summed = CHECKSUM_UNNECESSARY; 2031#endif 2032 2033 skb->dev = adapter->netdev; 2034 skb->protocol = eth_type_trans(skb, skb->dev); 2035 netif_rx(skb); 2036 2037 ++frames; 2038#if SLIC_INTERRUPT_PROCESS_LIMIT 2039 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) { 2040 adapter->rcv_interrupt_yields++; 2041 break; 2042 } 2043#endif 2044 } 2045 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames); 2046} 2047 2048static void slic_xmit_complete(struct adapter *adapter) 2049{ 2050 struct slic_hostcmd *hcmd; 2051 struct slic_rspbuf *rspbuf; 2052 u32 frames = 0; 2053 struct slic_handle_word slic_handle_word; 2054 2055 do { 2056 rspbuf = slic_rspqueue_getnext(adapter); 2057 if (!rspbuf) 2058 break; 2059 adapter->xmit_completes++; 2060 adapter->card->events++; 2061 /* 2062 Get the complete host command buffer 2063 */ 2064 slic_handle_word.handle_token = rspbuf->hosthandle; 2065 hcmd = 2066 (struct slic_hostcmd *) 2067 adapter->slic_handles[slic_handle_word.handle_index]. 2068 address; 2069/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */ 2070 if (hcmd->type == SLIC_CMD_DUMB) { 2071 if (hcmd->skb) 2072 dev_kfree_skb_irq(hcmd->skb); 2073 slic_cmdq_putdone_irq(adapter, hcmd); 2074 } 2075 rspbuf->status = 0; 2076 rspbuf->hosthandle = 0; 2077 frames++; 2078 } while (1); 2079 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames); 2080} 2081 2082static void slic_interrupt_card_up(u32 isr, struct adapter *adapter, 2083 struct net_device *dev) 2084{ 2085 if (isr & ~ISR_IO) { 2086 if (isr & ISR_ERR) { 2087 adapter->error_interrupts++; 2088 if (isr & ISR_RMISS) { 2089 int count; 2090 int pre_count; 2091 int errors; 2092 2093 struct slic_rcvqueue *rcvq = 2094 &adapter->rcvqueue; 2095 2096 adapter->error_rmiss_interrupts++; 2097 2098 if (!rcvq->errors) 2099 rcv_count = rcvq->count; 2100 pre_count = rcvq->count; 2101 errors = rcvq->errors; 2102 2103 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) { 2104 count = slic_rcvqueue_fill(adapter); 2105 if (!count) 2106 break; 2107 } 2108 } else if (isr & ISR_XDROP) { 2109 dev_err(&dev->dev, 2110 "isr & ISR_ERR [%x] ISR_XDROP\n", 2111 isr); 2112 } else { 2113 dev_err(&dev->dev, 2114 "isr & ISR_ERR [%x]\n", 2115 isr); 2116 } 2117 } 2118 2119 if (isr & ISR_LEVENT) { 2120 adapter->linkevent_interrupts++; 2121 slic_link_event_handler(adapter); 2122 } 2123 2124 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) || 2125 (isr & ISR_UPCBSY)) { 2126 adapter->upr_interrupts++; 2127 slic_upr_request_complete(adapter, isr); 2128 } 2129 } 2130 2131 if (isr & ISR_RCV) { 2132 adapter->rcv_interrupts++; 2133 slic_rcv_handler(adapter); 2134 } 2135 2136 if (isr & ISR_CMD) { 2137 adapter->xmit_interrupts++; 2138 slic_xmit_complete(adapter); 2139 } 2140} 2141 2142 2143static irqreturn_t slic_interrupt(int irq, void *dev_id) 2144{ 2145 struct net_device *dev = (struct net_device *)dev_id; 2146 struct adapter *adapter = netdev_priv(dev); 2147 u32 isr; 2148 2149 if ((adapter->pshmem) && (adapter->pshmem->isr)) { 2150 slic_reg32_write(&adapter->slic_regs->slic_icr, 2151 ICR_INT_MASK, FLUSH); 2152 isr = adapter->isrcopy = adapter->pshmem->isr; 2153 adapter->pshmem->isr = 0; 2154 adapter->num_isrs++; 2155 switch (adapter->card->state) { 2156 case CARD_UP: 2157 slic_interrupt_card_up(isr, adapter, dev); 2158 break; 2159 2160 case CARD_DOWN: 2161 if ((isr & ISR_UPC) || 2162 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { 2163 adapter->upr_interrupts++; 2164 slic_upr_request_complete(adapter, isr); 2165 } 2166 break; 2167 } 2168 2169 adapter->isrcopy = 0; 2170 adapter->all_reg_writes += 2; 2171 adapter->isr_reg_writes++; 2172 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH); 2173 } else { 2174 adapter->false_interrupts++; 2175 } 2176 return IRQ_HANDLED; 2177} 2178 2179#define NORMAL_ETHFRAME 0 2180 2181static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev) 2182{ 2183 struct sliccard *card; 2184 struct adapter *adapter = netdev_priv(dev); 2185 struct slic_hostcmd *hcmd = NULL; 2186 u32 status = 0; 2187 void *offloadcmd = NULL; 2188 2189 card = adapter->card; 2190 if ((adapter->linkstate != LINK_UP) || 2191 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) { 2192 status = XMIT_FAIL_LINK_STATE; 2193 goto xmit_fail; 2194 2195 } else if (skb->len == 0) { 2196 status = XMIT_FAIL_ZERO_LENGTH; 2197 goto xmit_fail; 2198 } 2199 2200 hcmd = slic_cmdq_getfree(adapter); 2201 if (!hcmd) { 2202 adapter->xmitq_full = 1; 2203 status = XMIT_FAIL_HOSTCMD_FAIL; 2204 goto xmit_fail; 2205 } 2206 hcmd->skb = skb; 2207 hcmd->busy = 1; 2208 hcmd->type = SLIC_CMD_DUMB; 2209 slic_xmit_build_request(adapter, hcmd, skb); 2210 dev->stats.tx_packets++; 2211 dev->stats.tx_bytes += skb->len; 2212 2213#ifdef DEBUG_DUMP 2214 if (adapter->kill_card) { 2215 struct slic_host64_cmd ihcmd; 2216 2217 ihcmd = &hcmd->cmd64; 2218 2219 ihcmd->flags |= 0x40; 2220 adapter->kill_card = 0; /* only do this once */ 2221 } 2222#endif 2223 if (hcmd->paddrh == 0) { 2224 slic_reg32_write(&adapter->slic_regs->slic_cbar, 2225 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH); 2226 } else { 2227 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64, 2228 (hcmd->paddrl | hcmd->cmdsize), 2229 &adapter->slic_regs->slic_addr_upper, 2230 hcmd->paddrh, DONT_FLUSH); 2231 } 2232xmit_done: 2233 return NETDEV_TX_OK; 2234xmit_fail: 2235 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status); 2236 goto xmit_done; 2237} 2238 2239 2240static void slic_adapter_freeresources(struct adapter *adapter) 2241{ 2242 slic_init_cleanup(adapter); 2243 adapter->error_interrupts = 0; 2244 adapter->rcv_interrupts = 0; 2245 adapter->xmit_interrupts = 0; 2246 adapter->linkevent_interrupts = 0; 2247 adapter->upr_interrupts = 0; 2248 adapter->num_isrs = 0; 2249 adapter->xmit_completes = 0; 2250 adapter->rcv_broadcasts = 0; 2251 adapter->rcv_multicasts = 0; 2252 adapter->rcv_unicasts = 0; 2253} 2254 2255static int slic_adapter_allocresources(struct adapter *adapter) 2256{ 2257 if (!adapter->intrregistered) { 2258 int retval; 2259 2260 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 2261 slic_global.driver_lock.flags); 2262 2263 retval = request_irq(adapter->netdev->irq, 2264 &slic_interrupt, 2265 IRQF_SHARED, 2266 adapter->netdev->name, adapter->netdev); 2267 2268 spin_lock_irqsave(&slic_global.driver_lock.lock, 2269 slic_global.driver_lock.flags); 2270 2271 if (retval) { 2272 dev_err(&adapter->netdev->dev, 2273 "request_irq (%s) FAILED [%x]\n", 2274 adapter->netdev->name, retval); 2275 return retval; 2276 } 2277 adapter->intrregistered = 1; 2278 } 2279 return 0; 2280} 2281 2282/* 2283 * slic_if_init 2284 * 2285 * Perform initialization of our slic interface. 2286 * 2287 */ 2288static int slic_if_init(struct adapter *adapter) 2289{ 2290 struct sliccard *card = adapter->card; 2291 struct net_device *dev = adapter->netdev; 2292 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 2293 struct slic_shmem *pshmem; 2294 int rc; 2295 2296 /* adapter should be down at this point */ 2297 if (adapter->state != ADAPT_DOWN) { 2298 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n", 2299 __func__); 2300 rc = -EIO; 2301 goto err; 2302 } 2303 2304 adapter->devflags_prev = dev->flags; 2305 adapter->macopts = MAC_DIRECTED; 2306 if (dev->flags) { 2307 if (dev->flags & IFF_BROADCAST) 2308 adapter->macopts |= MAC_BCAST; 2309 if (dev->flags & IFF_PROMISC) 2310 adapter->macopts |= MAC_PROMISC; 2311 if (dev->flags & IFF_ALLMULTI) 2312 adapter->macopts |= MAC_ALLMCAST; 2313 if (dev->flags & IFF_MULTICAST) 2314 adapter->macopts |= MAC_MCAST; 2315 } 2316 rc = slic_adapter_allocresources(adapter); 2317 if (rc) { 2318 dev_err(&dev->dev, 2319 "%s: slic_adapter_allocresources FAILED %x\n", 2320 __func__, rc); 2321 slic_adapter_freeresources(adapter); 2322 goto err; 2323 } 2324 2325 if (!adapter->queues_initialized) { 2326 rc = slic_rspqueue_init(adapter); 2327 if (rc) 2328 goto err; 2329 rc = slic_cmdq_init(adapter); 2330 if (rc) 2331 goto err; 2332 rc = slic_rcvqueue_init(adapter); 2333 if (rc) 2334 goto err; 2335 adapter->queues_initialized = 1; 2336 } 2337 2338 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 2339 mdelay(1); 2340 2341 if (!adapter->isp_initialized) { 2342 pshmem = (struct slic_shmem *)(unsigned long) 2343 adapter->phys_shmem; 2344 2345 spin_lock_irqsave(&adapter->bit64reglock.lock, 2346 adapter->bit64reglock.flags); 2347 2348#if BITS_PER_LONG == 64 2349 slic_reg32_write(&slic_regs->slic_addr_upper, 2350 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH); 2351 slic_reg32_write(&slic_regs->slic_isp, 2352 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); 2353#else 2354 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH); 2355 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, 2356 FLUSH); 2357#endif 2358 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 2359 adapter->bit64reglock.flags); 2360 adapter->isp_initialized = 1; 2361 } 2362 2363 adapter->state = ADAPT_UP; 2364 if (!card->loadtimerset) { 2365 init_timer(&card->loadtimer); 2366 card->loadtimer.expires = 2367 jiffies + (SLIC_LOADTIMER_PERIOD * HZ); 2368 card->loadtimer.data = (ulong) card; 2369 card->loadtimer.function = &slic_timer_load_check; 2370 add_timer(&card->loadtimer); 2371 2372 card->loadtimerset = 1; 2373 } 2374 2375 if (!adapter->pingtimerset) { 2376 init_timer(&adapter->pingtimer); 2377 adapter->pingtimer.expires = 2378 jiffies + (PING_TIMER_INTERVAL * HZ); 2379 adapter->pingtimer.data = (ulong) dev; 2380 adapter->pingtimer.function = &slic_timer_ping; 2381 add_timer(&adapter->pingtimer); 2382 adapter->pingtimerset = 1; 2383 adapter->card->pingstatus = ISR_PINGMASK; 2384 } 2385 2386 /* 2387 * clear any pending events, then enable interrupts 2388 */ 2389 adapter->isrcopy = 0; 2390 adapter->pshmem->isr = 0; 2391 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH); 2392 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH); 2393 2394 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD); 2395 slic_link_event_handler(adapter); 2396 2397err: 2398 return rc; 2399} 2400 2401static int slic_entry_open(struct net_device *dev) 2402{ 2403 struct adapter *adapter = netdev_priv(dev); 2404 struct sliccard *card = adapter->card; 2405 int status; 2406 2407 netif_stop_queue(adapter->netdev); 2408 2409 spin_lock_irqsave(&slic_global.driver_lock.lock, 2410 slic_global.driver_lock.flags); 2411 if (!adapter->activated) { 2412 card->adapters_activated++; 2413 slic_global.num_slic_ports_active++; 2414 adapter->activated = 1; 2415 } 2416 status = slic_if_init(adapter); 2417 2418 if (status != 0) { 2419 if (adapter->activated) { 2420 card->adapters_activated--; 2421 slic_global.num_slic_ports_active--; 2422 adapter->activated = 0; 2423 } 2424 goto spin_unlock; 2425 } 2426 if (!card->master) 2427 card->master = adapter; 2428 2429spin_unlock: 2430 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 2431 slic_global.driver_lock.flags); 2432 return status; 2433} 2434 2435static void slic_card_cleanup(struct sliccard *card) 2436{ 2437 if (card->loadtimerset) { 2438 card->loadtimerset = 0; 2439 del_timer_sync(&card->loadtimer); 2440 } 2441 2442 kfree(card); 2443} 2444 2445static void slic_entry_remove(struct pci_dev *pcidev) 2446{ 2447 struct net_device *dev = pci_get_drvdata(pcidev); 2448 struct adapter *adapter = netdev_priv(dev); 2449 struct sliccard *card; 2450 struct mcast_address *mcaddr, *mlist; 2451 2452 unregister_netdev(dev); 2453 2454 slic_adapter_freeresources(adapter); 2455 slic_unmap_mmio_space(adapter); 2456 2457 /* free multicast addresses */ 2458 mlist = adapter->mcastaddrs; 2459 while (mlist) { 2460 mcaddr = mlist; 2461 mlist = mlist->next; 2462 kfree(mcaddr); 2463 } 2464 card = adapter->card; 2465 card->adapters_allocated--; 2466 adapter->allocated = 0; 2467 if (!card->adapters_allocated) { 2468 struct sliccard *curr_card = slic_global.slic_card; 2469 2470 if (curr_card == card) { 2471 slic_global.slic_card = card->next; 2472 } else { 2473 while (curr_card->next != card) 2474 curr_card = curr_card->next; 2475 curr_card->next = card->next; 2476 } 2477 slic_global.num_slic_cards--; 2478 slic_card_cleanup(card); 2479 } 2480 free_netdev(dev); 2481 pci_release_regions(pcidev); 2482 pci_disable_device(pcidev); 2483} 2484 2485static int slic_entry_halt(struct net_device *dev) 2486{ 2487 struct adapter *adapter = netdev_priv(dev); 2488 struct sliccard *card = adapter->card; 2489 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 2490 2491 spin_lock_irqsave(&slic_global.driver_lock.lock, 2492 slic_global.driver_lock.flags); 2493 netif_stop_queue(adapter->netdev); 2494 adapter->state = ADAPT_DOWN; 2495 adapter->linkstate = LINK_DOWN; 2496 adapter->upr_list = NULL; 2497 adapter->upr_busy = 0; 2498 adapter->devflags_prev = 0; 2499 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 2500 adapter->all_reg_writes++; 2501 adapter->icr_reg_writes++; 2502 slic_config_clear(adapter); 2503 if (adapter->activated) { 2504 card->adapters_activated--; 2505 slic_global.num_slic_ports_active--; 2506 adapter->activated = 0; 2507 } 2508#ifdef AUTOMATIC_RESET 2509 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH); 2510#endif 2511 /* 2512 * Reset the adapter's cmd queues 2513 */ 2514 slic_cmdq_reset(adapter); 2515 2516#ifdef AUTOMATIC_RESET 2517 if (!card->adapters_activated) 2518 slic_card_init(card, adapter); 2519#endif 2520 2521 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 2522 slic_global.driver_lock.flags); 2523 return 0; 2524} 2525 2526static struct net_device_stats *slic_get_stats(struct net_device *dev) 2527{ 2528 struct adapter *adapter = netdev_priv(dev); 2529 2530 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions; 2531 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors; 2532 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors; 2533 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards; 2534 dev->stats.tx_heartbeat_errors = 0; 2535 dev->stats.tx_aborted_errors = 0; 2536 dev->stats.tx_window_errors = 0; 2537 dev->stats.tx_fifo_errors = 0; 2538 dev->stats.rx_frame_errors = 0; 2539 dev->stats.rx_length_errors = 0; 2540 2541 return &dev->stats; 2542} 2543 2544static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2545{ 2546 struct adapter *adapter = netdev_priv(dev); 2547 struct ethtool_cmd edata; 2548 struct ethtool_cmd ecmd; 2549 u32 data[7]; 2550 u32 intagg; 2551 2552 switch (cmd) { 2553 case SIOCSLICSETINTAGG: 2554 if (copy_from_user(data, rq->ifr_data, 28)) 2555 return -EFAULT; 2556 intagg = data[0]; 2557 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n", 2558 __func__, intagg); 2559 slic_intagg_set(adapter, intagg); 2560 return 0; 2561 2562#ifdef SLIC_TRACE_DUMP_ENABLED 2563 case SIOCSLICTRACEDUMP: 2564 { 2565 u32 value; 2566 2567 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n"); 2568 2569 if (copy_from_user(data, rq->ifr_data, 28)) { 2570 PRINT_ERROR 2571 ("slic: copy_from_user FAILED getting initial simba param\n"); 2572 return -EFAULT; 2573 } 2574 2575 value = data[0]; 2576 if (tracemon_request == SLIC_DUMP_DONE) { 2577 PRINT_ERROR 2578 ("ATK Diagnostic Trace Dump Requested\n"); 2579 tracemon_request = SLIC_DUMP_REQUESTED; 2580 tracemon_request_type = value; 2581 tracemon_timestamp = jiffies; 2582 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) || 2583 (tracemon_request == 2584 SLIC_DUMP_IN_PROGRESS)) { 2585 PRINT_ERROR 2586 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n"); 2587 } else { 2588 PRINT_ERROR 2589 ("ATK Diagnostic Trace Dump Requested\n"); 2590 tracemon_request = SLIC_DUMP_REQUESTED; 2591 tracemon_request_type = value; 2592 tracemon_timestamp = jiffies; 2593 } 2594 return 0; 2595 } 2596#endif 2597 case SIOCETHTOOL: 2598 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd))) 2599 return -EFAULT; 2600 2601 if (ecmd.cmd == ETHTOOL_GSET) { 2602 memset(&edata, 0, sizeof(edata)); 2603 edata.supported = (SUPPORTED_10baseT_Half | 2604 SUPPORTED_10baseT_Full | 2605 SUPPORTED_100baseT_Half | 2606 SUPPORTED_100baseT_Full | 2607 SUPPORTED_Autoneg | SUPPORTED_MII); 2608 edata.port = PORT_MII; 2609 edata.transceiver = XCVR_INTERNAL; 2610 edata.phy_address = 0; 2611 if (adapter->linkspeed == LINK_100MB) 2612 edata.speed = SPEED_100; 2613 else if (adapter->linkspeed == LINK_10MB) 2614 edata.speed = SPEED_10; 2615 else 2616 edata.speed = 0; 2617 2618 if (adapter->linkduplex == LINK_FULLD) 2619 edata.duplex = DUPLEX_FULL; 2620 else 2621 edata.duplex = DUPLEX_HALF; 2622 2623 edata.autoneg = AUTONEG_ENABLE; 2624 edata.maxtxpkt = 1; 2625 edata.maxrxpkt = 1; 2626 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata))) 2627 return -EFAULT; 2628 2629 } else if (ecmd.cmd == ETHTOOL_SSET) { 2630 if (!capable(CAP_NET_ADMIN)) 2631 return -EPERM; 2632 2633 if (adapter->linkspeed == LINK_100MB) 2634 edata.speed = SPEED_100; 2635 else if (adapter->linkspeed == LINK_10MB) 2636 edata.speed = SPEED_10; 2637 else 2638 edata.speed = 0; 2639 2640 if (adapter->linkduplex == LINK_FULLD) 2641 edata.duplex = DUPLEX_FULL; 2642 else 2643 edata.duplex = DUPLEX_HALF; 2644 2645 edata.autoneg = AUTONEG_ENABLE; 2646 edata.maxtxpkt = 1; 2647 edata.maxrxpkt = 1; 2648 if ((ecmd.speed != edata.speed) || 2649 (ecmd.duplex != edata.duplex)) { 2650 u32 speed; 2651 u32 duplex; 2652 2653 if (ecmd.speed == SPEED_10) 2654 speed = 0; 2655 else 2656 speed = PCR_SPEED_100; 2657 if (ecmd.duplex == DUPLEX_FULL) 2658 duplex = PCR_DUPLEX_FULL; 2659 else 2660 duplex = 0; 2661 slic_link_config(adapter, speed, duplex); 2662 slic_link_event_handler(adapter); 2663 } 2664 } 2665 return 0; 2666 default: 2667 return -EOPNOTSUPP; 2668 } 2669} 2670 2671static void slic_config_pci(struct pci_dev *pcidev) 2672{ 2673 u16 pci_command; 2674 u16 new_command; 2675 2676 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); 2677 2678 new_command = pci_command | PCI_COMMAND_MASTER 2679 | PCI_COMMAND_MEMORY 2680 | PCI_COMMAND_INVALIDATE 2681 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; 2682 if (pci_command != new_command) 2683 pci_write_config_word(pcidev, PCI_COMMAND, new_command); 2684} 2685 2686static int slic_card_init(struct sliccard *card, struct adapter *adapter) 2687{ 2688 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 2689 struct slic_eeprom *peeprom; 2690 struct oslic_eeprom *pOeeprom; 2691 dma_addr_t phys_config; 2692 u32 phys_configh; 2693 u32 phys_configl; 2694 u32 i = 0; 2695 struct slic_shmem *pshmem; 2696 int status; 2697 uint macaddrs = card->card_size; 2698 ushort eecodesize; 2699 ushort dramsize; 2700 ushort ee_chksum; 2701 ushort calc_chksum; 2702 struct slic_config_mac *pmac; 2703 unsigned char fruformat; 2704 unsigned char oemfruformat; 2705 struct atk_fru *patkfru; 2706 union oemfru *poemfru; 2707 2708 /* Reset everything except PCI configuration space */ 2709 slic_soft_reset(adapter); 2710 2711 /* Download the microcode */ 2712 status = slic_card_download(adapter); 2713 if (status) 2714 return status; 2715 2716 if (!card->config_set) { 2717 peeprom = pci_alloc_consistent(adapter->pcidev, 2718 sizeof(struct slic_eeprom), 2719 &phys_config); 2720 2721 phys_configl = SLIC_GET_ADDR_LOW(phys_config); 2722 phys_configh = SLIC_GET_ADDR_HIGH(phys_config); 2723 2724 if (!peeprom) { 2725 dev_err(&adapter->pcidev->dev, 2726 "Failed to allocate DMA memory for EEPROM.\n"); 2727 return -ENOMEM; 2728 } 2729 2730 memset(peeprom, 0, sizeof(struct slic_eeprom)); 2731 2732 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 2733 mdelay(1); 2734 pshmem = (struct slic_shmem *)(unsigned long) 2735 adapter->phys_shmem; 2736 2737 spin_lock_irqsave(&adapter->bit64reglock.lock, 2738 adapter->bit64reglock.flags); 2739 slic_reg32_write(&slic_regs->slic_addr_upper, 2740 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH); 2741 slic_reg32_write(&slic_regs->slic_isp, 2742 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); 2743 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 2744 adapter->bit64reglock.flags); 2745 2746 status = slic_config_get(adapter, phys_configl, phys_configh); 2747 if (status) { 2748 dev_err(&adapter->pcidev->dev, 2749 "Failed to fetch config data from device.\n"); 2750 goto card_init_err; 2751 } 2752 2753 for (;;) { 2754 if (adapter->pshmem->isr) { 2755 if (adapter->pshmem->isr & ISR_UPC) { 2756 adapter->pshmem->isr = 0; 2757 slic_reg64_write(adapter, 2758 &slic_regs->slic_isp, 0, 2759 &slic_regs->slic_addr_upper, 2760 0, FLUSH); 2761 slic_reg32_write(&slic_regs->slic_isr, 2762 0, FLUSH); 2763 2764 slic_upr_request_complete(adapter, 0); 2765 break; 2766 } 2767 2768 adapter->pshmem->isr = 0; 2769 slic_reg32_write(&slic_regs->slic_isr, 2770 0, FLUSH); 2771 } else { 2772 mdelay(1); 2773 i++; 2774 if (i > 5000) { 2775 dev_err(&adapter->pcidev->dev, 2776 "Fetch of config data timed out.\n"); 2777 slic_reg64_write(adapter, 2778 &slic_regs->slic_isp, 0, 2779 &slic_regs->slic_addr_upper, 2780 0, FLUSH); 2781 status = -EINVAL; 2782 goto card_init_err; 2783 } 2784 } 2785 } 2786 2787 switch (adapter->devid) { 2788 /* Oasis card */ 2789 case SLIC_2GB_DEVICE_ID: 2790 /* extract EEPROM data and pointers to EEPROM data */ 2791 pOeeprom = (struct oslic_eeprom *) peeprom; 2792 eecodesize = pOeeprom->EecodeSize; 2793 dramsize = pOeeprom->DramSize; 2794 pmac = pOeeprom->MacInfo; 2795 fruformat = pOeeprom->FruFormat; 2796 patkfru = &pOeeprom->AtkFru; 2797 oemfruformat = pOeeprom->OemFruFormat; 2798 poemfru = &pOeeprom->OemFru; 2799 macaddrs = 2; 2800 /* Minor kludge for Oasis card 2801 get 2 MAC addresses from the 2802 EEPROM to ensure that function 1 2803 gets the Port 1 MAC address */ 2804 break; 2805 default: 2806 /* extract EEPROM data and pointers to EEPROM data */ 2807 eecodesize = peeprom->EecodeSize; 2808 dramsize = peeprom->DramSize; 2809 pmac = peeprom->u2.mac.MacInfo; 2810 fruformat = peeprom->FruFormat; 2811 patkfru = &peeprom->AtkFru; 2812 oemfruformat = peeprom->OemFruFormat; 2813 poemfru = &peeprom->OemFru; 2814 break; 2815 } 2816 2817 card->config.EepromValid = false; 2818 2819 /* see if the EEPROM is valid by checking it's checksum */ 2820 if ((eecodesize <= MAX_EECODE_SIZE) && 2821 (eecodesize >= MIN_EECODE_SIZE)) { 2822 2823 ee_chksum = 2824 *(u16 *) ((char *) peeprom + (eecodesize - 2)); 2825 /* 2826 calculate the EEPROM checksum 2827 */ 2828 calc_chksum = slic_eeprom_cksum(peeprom, 2829 eecodesize - 2); 2830 /* 2831 if the ucdoe chksum flag bit worked, 2832 we wouldn't need this 2833 */ 2834 if (ee_chksum == calc_chksum) 2835 card->config.EepromValid = true; 2836 } 2837 /* copy in the DRAM size */ 2838 card->config.DramSize = dramsize; 2839 2840 /* copy in the MAC address(es) */ 2841 for (i = 0; i < macaddrs; i++) { 2842 memcpy(&card->config.MacInfo[i], 2843 &pmac[i], sizeof(struct slic_config_mac)); 2844 } 2845 2846 /* copy the Alacritech FRU information */ 2847 card->config.FruFormat = fruformat; 2848 memcpy(&card->config.AtkFru, patkfru, 2849 sizeof(struct atk_fru)); 2850 2851 pci_free_consistent(adapter->pcidev, 2852 sizeof(struct slic_eeprom), 2853 peeprom, phys_config); 2854 2855 if (!card->config.EepromValid) { 2856 slic_reg64_write(adapter, &slic_regs->slic_isp, 0, 2857 &slic_regs->slic_addr_upper, 2858 0, FLUSH); 2859 dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n"); 2860 return -EINVAL; 2861 } 2862 2863 card->config_set = 1; 2864 } 2865 2866 status = slic_card_download_gbrcv(adapter); 2867 if (status) 2868 return status; 2869 2870 if (slic_global.dynamic_intagg) 2871 slic_intagg_set(adapter, 0); 2872 else 2873 slic_intagg_set(adapter, intagg_delay); 2874 2875 /* 2876 * Initialize ping status to "ok" 2877 */ 2878 card->pingstatus = ISR_PINGMASK; 2879 2880 /* 2881 * Lastly, mark our card state as up and return success 2882 */ 2883 card->state = CARD_UP; 2884 card->reset_in_progress = 0; 2885 2886 return 0; 2887 2888card_init_err: 2889 pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom), 2890 peeprom, phys_config); 2891 return status; 2892} 2893 2894static void slic_init_driver(void) 2895{ 2896 if (slic_first_init) { 2897 slic_first_init = 0; 2898 spin_lock_init(&slic_global.driver_lock.lock); 2899 } 2900} 2901 2902static void slic_init_adapter(struct net_device *netdev, 2903 struct pci_dev *pcidev, 2904 const struct pci_device_id *pci_tbl_entry, 2905 void __iomem *memaddr, int chip_idx) 2906{ 2907 ushort index; 2908 struct slic_handle *pslic_handle; 2909 struct adapter *adapter = netdev_priv(netdev); 2910 2911/* adapter->pcidev = pcidev;*/ 2912 adapter->vendid = pci_tbl_entry->vendor; 2913 adapter->devid = pci_tbl_entry->device; 2914 adapter->subsysid = pci_tbl_entry->subdevice; 2915 adapter->busnumber = pcidev->bus->number; 2916 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); 2917 adapter->functionnumber = (pcidev->devfn & 0x7); 2918 adapter->slic_regs = (__iomem struct slic_regs *)memaddr; 2919 adapter->irq = pcidev->irq; 2920/* adapter->netdev = netdev;*/ 2921 adapter->chipid = chip_idx; 2922 adapter->port = 0; /*adapter->functionnumber;*/ 2923 adapter->cardindex = adapter->port; 2924 spin_lock_init(&adapter->upr_lock.lock); 2925 spin_lock_init(&adapter->bit64reglock.lock); 2926 spin_lock_init(&adapter->adapter_lock.lock); 2927 spin_lock_init(&adapter->reset_lock.lock); 2928 spin_lock_init(&adapter->handle_lock.lock); 2929 2930 adapter->card_size = 1; 2931 /* 2932 Initialize slic_handle array 2933 */ 2934 /* 2935 Start with 1. 0 is an invalid host handle. 2936 */ 2937 for (index = 1, pslic_handle = &adapter->slic_handles[1]; 2938 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) { 2939 2940 pslic_handle->token.handle_index = index; 2941 pslic_handle->type = SLIC_HANDLE_FREE; 2942 pslic_handle->next = adapter->pfree_slic_handles; 2943 adapter->pfree_slic_handles = pslic_handle; 2944 } 2945 adapter->pshmem = (struct slic_shmem *) 2946 pci_alloc_consistent(adapter->pcidev, 2947 sizeof(struct slic_shmem), 2948 &adapter-> 2949 phys_shmem); 2950 if (adapter->pshmem) 2951 memset(adapter->pshmem, 0, sizeof(struct slic_shmem)); 2952} 2953 2954static const struct net_device_ops slic_netdev_ops = { 2955 .ndo_open = slic_entry_open, 2956 .ndo_stop = slic_entry_halt, 2957 .ndo_start_xmit = slic_xmit_start, 2958 .ndo_do_ioctl = slic_ioctl, 2959 .ndo_set_mac_address = slic_mac_set_address, 2960 .ndo_get_stats = slic_get_stats, 2961 .ndo_set_rx_mode = slic_mcast_set_list, 2962 .ndo_validate_addr = eth_validate_addr, 2963 .ndo_change_mtu = eth_change_mtu, 2964}; 2965 2966static u32 slic_card_locate(struct adapter *adapter) 2967{ 2968 struct sliccard *card = slic_global.slic_card; 2969 struct physcard *physcard = slic_global.phys_card; 2970 ushort card_hostid; 2971 u16 __iomem *hostid_reg; 2972 uint i; 2973 uint rdhostid_offset = 0; 2974 2975 switch (adapter->devid) { 2976 case SLIC_2GB_DEVICE_ID: 2977 rdhostid_offset = SLIC_RDHOSTID_2GB; 2978 break; 2979 case SLIC_1GB_DEVICE_ID: 2980 rdhostid_offset = SLIC_RDHOSTID_1GB; 2981 break; 2982 default: 2983 return -ENODEV; 2984 } 2985 2986 hostid_reg = 2987 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) + 2988 rdhostid_offset); 2989 2990 /* read the 16 bit hostid from SRAM */ 2991 card_hostid = (ushort) readw(hostid_reg); 2992 2993 /* Initialize a new card structure if need be */ 2994 if (card_hostid == SLIC_HOSTID_DEFAULT) { 2995 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL); 2996 if (card == NULL) 2997 return -ENOMEM; 2998 2999 card->next = slic_global.slic_card; 3000 slic_global.slic_card = card; 3001 card->busnumber = adapter->busnumber; 3002 card->slotnumber = adapter->slotnumber; 3003 3004 /* Find an available cardnum */ 3005 for (i = 0; i < SLIC_MAX_CARDS; i++) { 3006 if (slic_global.cardnuminuse[i] == 0) { 3007 slic_global.cardnuminuse[i] = 1; 3008 card->cardnum = i; 3009 break; 3010 } 3011 } 3012 slic_global.num_slic_cards++; 3013 } else { 3014 /* Card exists, find the card this adapter belongs to */ 3015 while (card) { 3016 if (card->cardnum == card_hostid) 3017 break; 3018 card = card->next; 3019 } 3020 } 3021 3022 if (!card) 3023 return -ENXIO; 3024 /* Put the adapter in the card's adapter list */ 3025 if (!card->adapter[adapter->port]) { 3026 card->adapter[adapter->port] = adapter; 3027 adapter->card = card; 3028 } 3029 3030 card->card_size = 1; /* one port per *logical* card */ 3031 3032 while (physcard) { 3033 for (i = 0; i < SLIC_MAX_PORTS; i++) { 3034 if (physcard->adapter[i]) 3035 break; 3036 } 3037 if (i == SLIC_MAX_PORTS) 3038 break; 3039 3040 if (physcard->adapter[i]->slotnumber == adapter->slotnumber) 3041 break; 3042 physcard = physcard->next; 3043 } 3044 if (!physcard) { 3045 /* no structure allocated for this physical card yet */ 3046 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC); 3047 if (!physcard) { 3048 if (card_hostid == SLIC_HOSTID_DEFAULT) 3049 kfree(card); 3050 return -ENOMEM; 3051 } 3052 3053 physcard->next = slic_global.phys_card; 3054 slic_global.phys_card = physcard; 3055 physcard->adapters_allocd = 1; 3056 } else { 3057 physcard->adapters_allocd++; 3058 } 3059 /* Note - this is ZERO relative */ 3060 adapter->physport = physcard->adapters_allocd - 1; 3061 3062 physcard->adapter[adapter->physport] = adapter; 3063 adapter->physcard = physcard; 3064 3065 return 0; 3066} 3067 3068static int slic_entry_probe(struct pci_dev *pcidev, 3069 const struct pci_device_id *pci_tbl_entry) 3070{ 3071 static int cards_found; 3072 static int did_version; 3073 int err = -ENODEV; 3074 struct net_device *netdev; 3075 struct adapter *adapter; 3076 void __iomem *memmapped_ioaddr = NULL; 3077 ulong mmio_start = 0; 3078 ulong mmio_len = 0; 3079 struct sliccard *card = NULL; 3080 int pci_using_dac = 0; 3081 3082 slic_global.dynamic_intagg = dynamic_intagg; 3083 3084 err = pci_enable_device(pcidev); 3085 3086 if (err) 3087 return err; 3088 3089 if (did_version++ == 0) { 3090 dev_info(&pcidev->dev, "%s\n", slic_banner); 3091 dev_info(&pcidev->dev, "%s\n", slic_proc_version); 3092 } 3093 3094 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) { 3095 pci_using_dac = 1; 3096 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64)); 3097 if (err) { 3098 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n"); 3099 goto err_out_disable_pci; 3100 } 3101 } else { 3102 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)); 3103 if (err) { 3104 dev_err(&pcidev->dev, "no usable DMA configuration\n"); 3105 goto err_out_disable_pci; 3106 } 3107 pci_using_dac = 0; 3108 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)); 3109 } 3110 3111 err = pci_request_regions(pcidev, DRV_NAME); 3112 if (err) { 3113 dev_err(&pcidev->dev, "can't obtain PCI resources\n"); 3114 goto err_out_disable_pci; 3115 } 3116 3117 pci_set_master(pcidev); 3118 3119 netdev = alloc_etherdev(sizeof(struct adapter)); 3120 if (!netdev) { 3121 err = -ENOMEM; 3122 goto err_out_exit_slic_probe; 3123 } 3124 3125 SET_NETDEV_DEV(netdev, &pcidev->dev); 3126 3127 pci_set_drvdata(pcidev, netdev); 3128 adapter = netdev_priv(netdev); 3129 adapter->netdev = netdev; 3130 adapter->pcidev = pcidev; 3131 if (pci_using_dac) 3132 netdev->features |= NETIF_F_HIGHDMA; 3133 3134 mmio_start = pci_resource_start(pcidev, 0); 3135 mmio_len = pci_resource_len(pcidev, 0); 3136 3137 3138/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/ 3139 memmapped_ioaddr = ioremap(mmio_start, mmio_len); 3140 if (!memmapped_ioaddr) { 3141 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n", 3142 mmio_len, mmio_start); 3143 err = -ENOMEM; 3144 goto err_out_free_netdev; 3145 } 3146 3147 slic_config_pci(pcidev); 3148 3149 slic_init_driver(); 3150 3151 slic_init_adapter(netdev, 3152 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found); 3153 3154 err = slic_card_locate(adapter); 3155 if (err) { 3156 dev_err(&pcidev->dev, "cannot locate card\n"); 3157 goto err_out_unmap; 3158 } 3159 3160 card = adapter->card; 3161 3162 if (!adapter->allocated) { 3163 card->adapters_allocated++; 3164 adapter->allocated = 1; 3165 } 3166 3167 err = slic_card_init(card, adapter); 3168 if (err) 3169 goto err_out_unmap; 3170 3171 slic_adapter_set_hwaddr(adapter); 3172 3173 netdev->base_addr = (unsigned long) memmapped_ioaddr; 3174 netdev->irq = adapter->irq; 3175 netdev->netdev_ops = &slic_netdev_ops; 3176 3177 strcpy(netdev->name, "eth%d"); 3178 err = register_netdev(netdev); 3179 if (err) { 3180 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n"); 3181 goto err_out_unmap; 3182 } 3183 3184 cards_found++; 3185 3186 return 0; 3187 3188err_out_unmap: 3189 iounmap(memmapped_ioaddr); 3190err_out_free_netdev: 3191 free_netdev(netdev); 3192err_out_exit_slic_probe: 3193 pci_release_regions(pcidev); 3194err_out_disable_pci: 3195 pci_disable_device(pcidev); 3196 return err; 3197} 3198 3199static struct pci_driver slic_driver = { 3200 .name = DRV_NAME, 3201 .id_table = slic_pci_tbl, 3202 .probe = slic_entry_probe, 3203 .remove = slic_entry_remove, 3204}; 3205 3206static int __init slic_module_init(void) 3207{ 3208 slic_init_driver(); 3209 3210 return pci_register_driver(&slic_driver); 3211} 3212 3213static void __exit slic_module_cleanup(void) 3214{ 3215 pci_unregister_driver(&slic_driver); 3216} 3217 3218module_init(slic_module_init); 3219module_exit(slic_module_cleanup);