tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 *
20 * File: mac.c
21 *
22 * Purpose: MAC routines
23 *
24 * Author: Tevin Chen
25 *
26 * Date: May 21, 1996
27 *
28 * Functions:
29 * MACbIsRegBitsOn - Test if All test Bits On
30 * MACbIsRegBitsOff - Test if All test Bits Off
31 * MACbIsIntDisable - Test if MAC interrupt disable
32 * MACvSetShortRetryLimit - Set 802.11 Short Retry limit
33 * MACvGetShortRetryLimit - Get 802.11 Short Retry limit
34 * MACvSetLongRetryLimit - Set 802.11 Long Retry limit
35 * MACvSetLoopbackMode - Set MAC Loopback Mode
36 * MACvSaveContext - Save Context of MAC Registers
37 * MACvRestoreContext - Restore Context of MAC Registers
38 * MACbSoftwareReset - Software Reset MAC
39 * MACbSafeRxOff - Turn Off MAC Rx
40 * MACbSafeTxOff - Turn Off MAC Tx
41 * MACbSafeStop - Stop MAC function
42 * MACbShutdown - Shut down MAC
43 * MACvInitialize - Initialize MAC
44 * MACvSetCurrRxDescAddr - Set Rx Descriptors Address
45 * MACvSetCurrTx0DescAddr - Set Tx0 Descriptors Address
46 * MACvSetCurrTx1DescAddr - Set Tx1 Descriptors Address
47 * MACvTimer0MicroSDelay - Micro Second Delay Loop by MAC
48 *
49 * Revision History:
50 * 08-22-2003 Kyle Hsu : Porting MAC functions from sim53
51 * 09-03-2003 Bryan YC Fan : Add MACvClearBusSusInd()& MACvEnableBusSusEn()
52 * 09-18-2003 Jerry Chen : Add MACvSetKeyEntry & MACvDisableKeyEntry
53 *
54 */
55
56#include "tmacro.h"
57#include "mac.h"
58
59/*
60 * Description:
61 * Test if all test bits on
62 *
63 * Parameters:
64 * In:
65 * dwIoBase - Base Address for MAC
66 * byRegOfs - Offset of MAC Register
67 * byTestBits - Test bits
68 * Out:
69 * none
70 *
71 * Return Value: true if all test bits On; otherwise false
72 *
73 */
74bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
75{
76 unsigned char byData;
77
78 VNSvInPortB(dwIoBase + byRegOfs, &byData);
79 return (byData & byTestBits) == byTestBits;
80}
81
82/*
83 * Description:
84 * Test if all test bits off
85 *
86 * Parameters:
87 * In:
88 * dwIoBase - Base Address for MAC
89 * byRegOfs - Offset of MAC Register
90 * byTestBits - Test bits
91 * Out:
92 * none
93 *
94 * Return Value: true if all test bits Off; otherwise false
95 *
96 */
97bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs, unsigned char byTestBits)
98{
99 unsigned char byData;
100
101 VNSvInPortB(dwIoBase + byRegOfs, &byData);
102 return !(byData & byTestBits);
103}
104
105/*
106 * Description:
107 * Test if MAC interrupt disable
108 *
109 * Parameters:
110 * In:
111 * dwIoBase - Base Address for MAC
112 * Out:
113 * none
114 *
115 * Return Value: true if interrupt is disable; otherwise false
116 *
117 */
118bool MACbIsIntDisable(void __iomem *dwIoBase)
119{
120 unsigned long dwData;
121
122 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData);
123 if (dwData != 0)
124 return false;
125
126 return true;
127}
128
129/*
130 * Description:
131 * Set 802.11 Short Retry Limit
132 *
133 * Parameters:
134 * In:
135 * dwIoBase - Base Address for MAC
136 * byRetryLimit- Retry Limit
137 * Out:
138 * none
139 *
140 * Return Value: none
141 *
142 */
143void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
144{
145 // set SRT
146 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit);
147}
148
149/*
150 * Description:
151 * Get 802.11 Short Retry Limit
152 *
153 * Parameters:
154 * In:
155 * dwIoBase - Base Address for MAC
156 * Out:
157 * pbyRetryLimit - Retry Limit Get
158 *
159 * Return Value: none
160 *
161 */
162void MACvGetShortRetryLimit(void __iomem *dwIoBase, unsigned char *pbyRetryLimit)
163{
164 // get SRT
165 VNSvInPortB(dwIoBase + MAC_REG_SRT, pbyRetryLimit);
166}
167
168/*
169 * Description:
170 * Set 802.11 Long Retry Limit
171 *
172 * Parameters:
173 * In:
174 * dwIoBase - Base Address for MAC
175 * byRetryLimit- Retry Limit
176 * Out:
177 * none
178 *
179 * Return Value: none
180 *
181 */
182void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit)
183{
184 // set LRT
185 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit);
186}
187
188/*
189 * Description:
190 * Set MAC Loopback mode
191 *
192 * Parameters:
193 * In:
194 * dwIoBase - Base Address for MAC
195 * byLoopbackMode - Loopback Mode
196 * Out:
197 * none
198 *
199 * Return Value: none
200 *
201 */
202void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode)
203{
204 unsigned char byOrgValue;
205
206 ASSERT(byLoopbackMode < 3);
207 byLoopbackMode <<= 6;
208 // set TCR
209 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue);
210 byOrgValue = byOrgValue & 0x3F;
211 byOrgValue = byOrgValue | byLoopbackMode;
212 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue);
213}
214
215/*
216 * Description:
217 * Save MAC registers to context buffer
218 *
219 * Parameters:
220 * In:
221 * dwIoBase - Base Address for MAC
222 * Out:
223 * pbyCxtBuf - Context buffer
224 *
225 * Return Value: none
226 *
227 */
228void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
229{
230 int ii;
231
232 // read page0 register
233 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE0; ii++)
234 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii));
235
236 MACvSelectPage1(dwIoBase);
237
238 // read page1 register
239 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
240 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
241
242 MACvSelectPage0(dwIoBase);
243}
244
245/*
246 * Description:
247 * Restore MAC registers from context buffer
248 *
249 * Parameters:
250 * In:
251 * dwIoBase - Base Address for MAC
252 * pbyCxtBuf - Context buffer
253 * Out:
254 * none
255 *
256 * Return Value: none
257 *
258 */
259void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf)
260{
261 int ii;
262
263 MACvSelectPage1(dwIoBase);
264 // restore page1
265 for (ii = 0; ii < MAC_MAX_CONTEXT_SIZE_PAGE1; ii++)
266 VNSvOutPortB((dwIoBase + ii), *(pbyCxtBuf + MAC_MAX_CONTEXT_SIZE_PAGE0 + ii));
267
268 MACvSelectPage0(dwIoBase);
269
270 // restore RCR,TCR,IMR...
271 for (ii = MAC_REG_RCR; ii < MAC_REG_ISR; ii++)
272 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
273
274 // restore MAC Config.
275 for (ii = MAC_REG_LRT; ii < MAC_REG_PAGE1SEL; ii++)
276 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
277
278 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG));
279
280 // restore PS Config.
281 for (ii = MAC_REG_PSCFG; ii < MAC_REG_BBREGCTL; ii++)
282 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii));
283
284 // restore CURR_RX_DESC_ADDR, CURR_TX_DESC_ADDR
285 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_TXDMAPTR0));
286 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_AC0DMAPTR));
287 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, *(unsigned long *)(pbyCxtBuf + MAC_REG_BCNDMAPTR));
288
289 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR0));
290
291 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, *(unsigned long *)(pbyCxtBuf + MAC_REG_RXDMAPTR1));
292}
293
294/*
295 * Description:
296 * Software Reset MAC
297 *
298 * Parameters:
299 * In:
300 * dwIoBase - Base Address for MAC
301 * Out:
302 * none
303 *
304 * Return Value: true if Reset Success; otherwise false
305 *
306 */
307bool MACbSoftwareReset(void __iomem *dwIoBase)
308{
309 unsigned char byData;
310 unsigned short ww;
311
312 // turn on HOSTCR_SOFTRST, just write 0x01 to reset
313 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01);
314
315 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
316 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
317 if (!(byData & HOSTCR_SOFTRST))
318 break;
319 }
320 if (ww == W_MAX_TIMEOUT)
321 return false;
322 return true;
323}
324
325/*
326 * Description:
327 * save some important register's value, then do reset, then restore register's value
328 *
329 * Parameters:
330 * In:
331 * dwIoBase - Base Address for MAC
332 * Out:
333 * none
334 *
335 * Return Value: true if success; otherwise false
336 *
337 */
338bool MACbSafeSoftwareReset(void __iomem *dwIoBase)
339{
340 unsigned char abyTmpRegData[MAC_MAX_CONTEXT_SIZE_PAGE0+MAC_MAX_CONTEXT_SIZE_PAGE1];
341 bool bRetVal;
342
343 // PATCH....
344 // save some important register's value, then do
345 // reset, then restore register's value
346
347 // save MAC context
348 MACvSaveContext(dwIoBase, abyTmpRegData);
349 // do reset
350 bRetVal = MACbSoftwareReset(dwIoBase);
351 // restore MAC context, except CR0
352 MACvRestoreContext(dwIoBase, abyTmpRegData);
353
354 return bRetVal;
355}
356
357/*
358 * Description:
359 * Trun Off MAC Rx
360 *
361 * Parameters:
362 * In:
363 * dwIoBase - Base Address for MAC
364 * Out:
365 * none
366 *
367 * Return Value: true if success; otherwise false
368 *
369 */
370bool MACbSafeRxOff(void __iomem *dwIoBase)
371{
372 unsigned short ww;
373 unsigned long dwData;
374 unsigned char byData;
375
376 // turn off wow temp for turn off Rx safely
377
378 // Clear RX DMA0,1
379 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN);
380 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN);
381 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
382 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData);
383 if (!(dwData & DMACTL_RUN))
384 break;
385 }
386 if (ww == W_MAX_TIMEOUT) {
387 DBG_PORT80(0x10);
388 pr_debug(" DBG_PORT80(0x10)\n");
389 return false;
390 }
391 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
392 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData);
393 if (!(dwData & DMACTL_RUN))
394 break;
395 }
396 if (ww == W_MAX_TIMEOUT) {
397 DBG_PORT80(0x11);
398 pr_debug(" DBG_PORT80(0x11)\n");
399 return false;
400 }
401
402 // try to safe shutdown RX
403 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON);
404 // W_MAX_TIMEOUT is the timeout period
405 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
406 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
407 if (!(byData & HOSTCR_RXONST))
408 break;
409 }
410 if (ww == W_MAX_TIMEOUT) {
411 DBG_PORT80(0x12);
412 pr_debug(" DBG_PORT80(0x12)\n");
413 return false;
414 }
415 return true;
416}
417
418/*
419 * Description:
420 * Trun Off MAC Tx
421 *
422 * Parameters:
423 * In:
424 * dwIoBase - Base Address for MAC
425 * Out:
426 * none
427 *
428 * Return Value: true if success; otherwise false
429 *
430 */
431bool MACbSafeTxOff(void __iomem *dwIoBase)
432{
433 unsigned short ww;
434 unsigned long dwData;
435 unsigned char byData;
436
437 // Clear TX DMA
438 //Tx0
439 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN);
440 //AC0
441 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN);
442
443 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
444 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData);
445 if (!(dwData & DMACTL_RUN))
446 break;
447 }
448 if (ww == W_MAX_TIMEOUT) {
449 DBG_PORT80(0x20);
450 pr_debug(" DBG_PORT80(0x20)\n");
451 return false;
452 }
453 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
454 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData);
455 if (!(dwData & DMACTL_RUN))
456 break;
457 }
458 if (ww == W_MAX_TIMEOUT) {
459 DBG_PORT80(0x21);
460 pr_debug(" DBG_PORT80(0x21)\n");
461 return false;
462 }
463
464 // try to safe shutdown TX
465 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON);
466
467 // W_MAX_TIMEOUT is the timeout period
468 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
469 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData);
470 if (!(byData & HOSTCR_TXONST))
471 break;
472 }
473 if (ww == W_MAX_TIMEOUT) {
474 DBG_PORT80(0x24);
475 pr_debug(" DBG_PORT80(0x24)\n");
476 return false;
477 }
478 return true;
479}
480
481/*
482 * Description:
483 * Stop MAC function
484 *
485 * Parameters:
486 * In:
487 * dwIoBase - Base Address for MAC
488 * Out:
489 * none
490 *
491 * Return Value: true if success; otherwise false
492 *
493 */
494bool MACbSafeStop(void __iomem *dwIoBase)
495{
496 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX);
497
498 if (!MACbSafeRxOff(dwIoBase)) {
499 DBG_PORT80(0xA1);
500 pr_debug(" MACbSafeRxOff == false)\n");
501 MACbSafeSoftwareReset(dwIoBase);
502 return false;
503 }
504 if (!MACbSafeTxOff(dwIoBase)) {
505 DBG_PORT80(0xA2);
506 pr_debug(" MACbSafeTxOff == false)\n");
507 MACbSafeSoftwareReset(dwIoBase);
508 return false;
509 }
510
511 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN);
512
513 return true;
514}
515
516/*
517 * Description:
518 * Shut Down MAC
519 *
520 * Parameters:
521 * In:
522 * dwIoBase - Base Address for MAC
523 * Out:
524 * none
525 *
526 * Return Value: true if success; otherwise false
527 *
528 */
529bool MACbShutdown(void __iomem *dwIoBase)
530{
531 // disable MAC IMR
532 MACvIntDisable(dwIoBase);
533 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL);
534 // stop the adapter
535 if (!MACbSafeStop(dwIoBase)) {
536 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
537 return false;
538 }
539 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE);
540 return true;
541}
542
543/*
544 * Description:
545 * Initialize MAC
546 *
547 * Parameters:
548 * In:
549 * dwIoBase - Base Address for MAC
550 * Out:
551 * none
552 *
553 * Return Value: none
554 *
555 */
556void MACvInitialize(void __iomem *dwIoBase)
557{
558 // clear sticky bits
559 MACvClearStckDS(dwIoBase);
560 // disable force PME-enable
561 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR);
562 // only 3253 A
563
564 // do reset
565 MACbSoftwareReset(dwIoBase);
566
567 // reset TSF counter
568 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST);
569 // enable TSF counter
570 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN);
571}
572
573/*
574 * Description:
575 * Set the chip with current rx descriptor address
576 *
577 * Parameters:
578 * In:
579 * dwIoBase - Base Address for MAC
580 * dwCurrDescAddr - Descriptor Address
581 * Out:
582 * none
583 *
584 * Return Value: none
585 *
586 */
587void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
588{
589 unsigned short ww;
590 unsigned char byData;
591 unsigned char byOrgDMACtl;
592
593 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl);
594 if (byOrgDMACtl & DMACTL_RUN)
595 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN);
596
597 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
598 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData);
599 if (!(byData & DMACTL_RUN))
600 break;
601 }
602
603 if (ww == W_MAX_TIMEOUT)
604 DBG_PORT80(0x13);
605
606 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr);
607 if (byOrgDMACtl & DMACTL_RUN)
608 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN);
609}
610
611/*
612 * Description:
613 * Set the chip with current rx descriptor address
614 *
615 * Parameters:
616 * In:
617 * dwIoBase - Base Address for MAC
618 * dwCurrDescAddr - Descriptor Address
619 * Out:
620 * none
621 *
622 * Return Value: none
623 *
624 */
625void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
626{
627 unsigned short ww;
628 unsigned char byData;
629 unsigned char byOrgDMACtl;
630
631 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl);
632 if (byOrgDMACtl & DMACTL_RUN)
633 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN);
634
635 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
636 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData);
637 if (!(byData & DMACTL_RUN))
638 break;
639 }
640 if (ww == W_MAX_TIMEOUT)
641 DBG_PORT80(0x14);
642
643 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr);
644 if (byOrgDMACtl & DMACTL_RUN)
645 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN);
646
647}
648
649/*
650 * Description:
651 * Set the chip with current tx0 descriptor address
652 *
653 * Parameters:
654 * In:
655 * dwIoBase - Base Address for MAC
656 * dwCurrDescAddr - Descriptor Address
657 * Out:
658 * none
659 *
660 * Return Value: none
661 *
662 */
663void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
664{
665 unsigned short ww;
666 unsigned char byData;
667 unsigned char byOrgDMACtl;
668
669 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl);
670 if (byOrgDMACtl & DMACTL_RUN)
671 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN);
672
673 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
674 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData);
675 if (!(byData & DMACTL_RUN))
676 break;
677 }
678 if (ww == W_MAX_TIMEOUT)
679 DBG_PORT80(0x25);
680
681 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr);
682 if (byOrgDMACtl & DMACTL_RUN)
683 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN);
684}
685
686/*
687 * Description:
688 * Set the chip with current AC0 descriptor address
689 *
690 * Parameters:
691 * In:
692 * dwIoBase - Base Address for MAC
693 * dwCurrDescAddr - Descriptor Address
694 * Out:
695 * none
696 *
697 * Return Value: none
698 *
699 */
700//TxDMA1 = AC0DMA
701void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
702{
703 unsigned short ww;
704 unsigned char byData;
705 unsigned char byOrgDMACtl;
706
707 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl);
708 if (byOrgDMACtl & DMACTL_RUN)
709 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN);
710
711 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
712 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData);
713 if (!(byData & DMACTL_RUN))
714 break;
715 }
716 if (ww == W_MAX_TIMEOUT) {
717 DBG_PORT80(0x26);
718 pr_debug(" DBG_PORT80(0x26)\n");
719 }
720 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr);
721 if (byOrgDMACtl & DMACTL_RUN)
722 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN);
723}
724
725void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase, unsigned long dwCurrDescAddr)
726{
727 if (iTxType == TYPE_AC0DMA)
728 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr);
729 else if (iTxType == TYPE_TXDMA0)
730 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr);
731}
732
733/*
734 * Description:
735 * Micro Second Delay via MAC
736 *
737 * Parameters:
738 * In:
739 * dwIoBase - Base Address for MAC
740 * uDelay - Delay time (timer resolution is 4 us)
741 * Out:
742 * none
743 *
744 * Return Value: none
745 *
746 */
747void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay)
748{
749 unsigned char byValue;
750 unsigned int uu, ii;
751
752 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
753 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay);
754 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE));
755 for (ii = 0; ii < 66; ii++) { // assume max PCI clock is 66Mhz
756 for (uu = 0; uu < uDelay; uu++) {
757 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue);
758 if ((byValue == 0) ||
759 (byValue & TMCTL_TSUSP)) {
760 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
761 return;
762 }
763 }
764 }
765 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0);
766}
767
768/*
769 * Description:
770 * Micro Second One shot timer via MAC
771 *
772 * Parameters:
773 * In:
774 * dwIoBase - Base Address for MAC
775 * uDelay - Delay time
776 * Out:
777 * none
778 *
779 * Return Value: none
780 *
781 */
782void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime)
783{
784 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0);
785 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime);
786 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE));
787}
788
789void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset, unsigned long dwData)
790{
791 if (wOffset > 273)
792 return;
793 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
794 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
795 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
796}
797
798bool MACbPSWakeup(void __iomem *dwIoBase)
799{
800 unsigned char byOrgValue;
801 unsigned int ww;
802 // Read PSCTL
803 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS))
804 return true;
805
806 // Disable PS
807 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN);
808
809 // Check if SyncFlushOK
810 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
811 VNSvInPortB(dwIoBase + MAC_REG_PSCTL , &byOrgValue);
812 if (byOrgValue & PSCTL_WAKEDONE)
813 break;
814 }
815 if (ww == W_MAX_TIMEOUT) {
816 DBG_PORT80(0x36);
817 pr_debug(" DBG_PORT80(0x33)\n");
818 return false;
819 }
820 return true;
821}
822
823/*
824 * Description:
825 * Set the Key by MISCFIFO
826 *
827 * Parameters:
828 * In:
829 * dwIoBase - Base Address for MAC
830 *
831 * Out:
832 * none
833 *
834 * Return Value: none
835 *
836 */
837
838void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx,
839 unsigned int uKeyIdx, unsigned char *pbyAddr, u32 *pdwKey, unsigned char byLocalID)
840{
841 unsigned short wOffset;
842 u32 dwData;
843 int ii;
844
845 if (byLocalID <= 1)
846 return;
847
848 pr_debug("MACvSetKeyEntry\n");
849 wOffset = MISCFIFO_KEYETRY0;
850 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
851
852 dwData = 0;
853 dwData |= wKeyCtl;
854 dwData <<= 16;
855 dwData |= MAKEWORD(*(pbyAddr+4), *(pbyAddr+5));
856 pr_debug("1. wOffset: %d, Data: %X, KeyCtl:%X\n",
857 wOffset, dwData, wKeyCtl);
858
859 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
860 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
861 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
862 wOffset++;
863
864 dwData = 0;
865 dwData |= *(pbyAddr+3);
866 dwData <<= 8;
867 dwData |= *(pbyAddr+2);
868 dwData <<= 8;
869 dwData |= *(pbyAddr+1);
870 dwData <<= 8;
871 dwData |= *(pbyAddr+0);
872 pr_debug("2. wOffset: %d, Data: %X\n", wOffset, dwData);
873
874 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
875 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData);
876 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
877 wOffset++;
878
879 wOffset += (uKeyIdx * 4);
880 for (ii = 0; ii < 4; ii++) {
881 // always push 128 bits
882 pr_debug("3.(%d) wOffset: %d, Data: %X\n",
883 ii, wOffset+ii, *pdwKey);
884 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii);
885 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++);
886 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
887 }
888}
889
890/*
891 * Description:
892 * Disable the Key Entry by MISCFIFO
893 *
894 * Parameters:
895 * In:
896 * dwIoBase - Base Address for MAC
897 *
898 * Out:
899 * none
900 *
901 * Return Value: none
902 *
903 */
904void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx)
905{
906 unsigned short wOffset;
907
908 wOffset = MISCFIFO_KEYETRY0;
909 wOffset += (uEntryIdx * MISCFIFO_KEYENTRYSIZE);
910
911 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset);
912 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0);
913 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE);
914}