tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Adding PCI-E MSI support for PPC4XX SoCs.
3 *
4 * Copyright (c) 2010, Applied Micro Circuits Corporation
5 * Authors: Tirumala R Marri <tmarri@apm.com>
6 * Feng Kan <fkan@apm.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <linux/irq.h>
25#include <linux/bootmem.h>
26#include <linux/pci.h>
27#include <linux/msi.h>
28#include <linux/of_platform.h>
29#include <linux/interrupt.h>
30#include <linux/export.h>
31#include <linux/kernel.h>
32#include <asm/prom.h>
33#include <asm/hw_irq.h>
34#include <asm/ppc-pci.h>
35#include <asm/dcr.h>
36#include <asm/dcr-regs.h>
37#include <asm/msi_bitmap.h>
38
39#define PEIH_TERMADH 0x00
40#define PEIH_TERMADL 0x08
41#define PEIH_MSIED 0x10
42#define PEIH_MSIMK 0x18
43#define PEIH_MSIASS 0x20
44#define PEIH_FLUSH0 0x30
45#define PEIH_FLUSH1 0x38
46#define PEIH_CNTRST 0x48
47
48static int msi_irqs;
49
50struct ppc4xx_msi {
51 u32 msi_addr_lo;
52 u32 msi_addr_hi;
53 void __iomem *msi_regs;
54 int *msi_virqs;
55 struct msi_bitmap bitmap;
56 struct device_node *msi_dev;
57};
58
59static struct ppc4xx_msi ppc4xx_msi;
60
61static int ppc4xx_msi_init_allocator(struct platform_device *dev,
62 struct ppc4xx_msi *msi_data)
63{
64 int err;
65
66 err = msi_bitmap_alloc(&msi_data->bitmap, msi_irqs,
67 dev->dev.of_node);
68 if (err)
69 return err;
70
71 err = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
72 if (err < 0) {
73 msi_bitmap_free(&msi_data->bitmap);
74 return err;
75 }
76
77 return 0;
78}
79
80static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
81{
82 int int_no = -ENOMEM;
83 unsigned int virq;
84 struct msi_msg msg;
85 struct msi_desc *entry;
86 struct ppc4xx_msi *msi_data = &ppc4xx_msi;
87
88 dev_dbg(&dev->dev, "PCIE-MSI:%s called. vec %x type %d\n",
89 __func__, nvec, type);
90 if (type == PCI_CAP_ID_MSIX)
91 pr_debug("ppc4xx msi: MSI-X untested, trying anyway.\n");
92
93 msi_data->msi_virqs = kmalloc((msi_irqs) * sizeof(int), GFP_KERNEL);
94 if (!msi_data->msi_virqs)
95 return -ENOMEM;
96
97 list_for_each_entry(entry, &dev->msi_list, list) {
98 int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
99 if (int_no >= 0)
100 break;
101 if (int_no < 0) {
102 pr_debug("%s: fail allocating msi interrupt\n",
103 __func__);
104 }
105 virq = irq_of_parse_and_map(msi_data->msi_dev, int_no);
106 if (virq == NO_IRQ) {
107 dev_err(&dev->dev, "%s: fail mapping irq\n", __func__);
108 msi_bitmap_free_hwirqs(&msi_data->bitmap, int_no, 1);
109 return -ENOSPC;
110 }
111 dev_dbg(&dev->dev, "%s: virq = %d\n", __func__, virq);
112
113 /* Setup msi address space */
114 msg.address_hi = msi_data->msi_addr_hi;
115 msg.address_lo = msi_data->msi_addr_lo;
116
117 irq_set_msi_desc(virq, entry);
118 msg.data = int_no;
119 write_msi_msg(virq, &msg);
120 }
121 return 0;
122}
123
124void ppc4xx_teardown_msi_irqs(struct pci_dev *dev)
125{
126 struct msi_desc *entry;
127 struct ppc4xx_msi *msi_data = &ppc4xx_msi;
128
129 dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n");
130
131 list_for_each_entry(entry, &dev->msi_list, list) {
132 if (entry->irq == NO_IRQ)
133 continue;
134 irq_set_msi_desc(entry->irq, NULL);
135 msi_bitmap_free_hwirqs(&msi_data->bitmap,
136 virq_to_hw(entry->irq), 1);
137 irq_dispose_mapping(entry->irq);
138 }
139}
140
141static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
142 struct resource res, struct ppc4xx_msi *msi)
143{
144 const u32 *msi_data;
145 const u32 *msi_mask;
146 const u32 *sdr_addr;
147 dma_addr_t msi_phys;
148 void *msi_virt;
149
150 sdr_addr = of_get_property(dev->dev.of_node, "sdr-base", NULL);
151 if (!sdr_addr)
152 return -1;
153
154 mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */
155 mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start)); /* Low addr */
156
157 msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
158 if (!msi->msi_dev)
159 return -ENODEV;
160
161 msi->msi_regs = of_iomap(msi->msi_dev, 0);
162 if (!msi->msi_regs) {
163 dev_err(&dev->dev, "of_iomap problem failed\n");
164 return -ENOMEM;
165 }
166 dev_dbg(&dev->dev, "PCIE-MSI: msi register mapped 0x%x 0x%x\n",
167 (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
168
169 msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
170 if (!msi_virt)
171 return -ENOMEM;
172 msi->msi_addr_hi = upper_32_bits(msi_phys);
173 msi->msi_addr_lo = lower_32_bits(msi_phys & 0xffffffff);
174 dev_dbg(&dev->dev, "PCIE-MSI: msi address high 0x%x, low 0x%x\n",
175 msi->msi_addr_hi, msi->msi_addr_lo);
176
177 /* Progam the Interrupt handler Termination addr registers */
178 out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
179 out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo);
180
181 msi_data = of_get_property(dev->dev.of_node, "msi-data", NULL);
182 if (!msi_data)
183 return -1;
184 msi_mask = of_get_property(dev->dev.of_node, "msi-mask", NULL);
185 if (!msi_mask)
186 return -1;
187 /* Program MSI Expected data and Mask bits */
188 out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
189 out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
190
191 dma_free_coherent(&dev->dev, 64, msi_virt, msi_phys);
192
193 return 0;
194}
195
196static int ppc4xx_of_msi_remove(struct platform_device *dev)
197{
198 struct ppc4xx_msi *msi = dev->dev.platform_data;
199 int i;
200 int virq;
201
202 for (i = 0; i < msi_irqs; i++) {
203 virq = msi->msi_virqs[i];
204 if (virq != NO_IRQ)
205 irq_dispose_mapping(virq);
206 }
207
208 if (msi->bitmap.bitmap)
209 msi_bitmap_free(&msi->bitmap);
210 iounmap(msi->msi_regs);
211 of_node_put(msi->msi_dev);
212 kfree(msi);
213
214 return 0;
215}
216
217static int ppc4xx_msi_probe(struct platform_device *dev)
218{
219 struct ppc4xx_msi *msi;
220 struct resource res;
221 int err = 0;
222
223 dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
224
225 msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
226 if (!msi) {
227 dev_err(&dev->dev, "No memory for MSI structure\n");
228 return -ENOMEM;
229 }
230 dev->dev.platform_data = msi;
231
232 /* Get MSI ranges */
233 err = of_address_to_resource(dev->dev.of_node, 0, &res);
234 if (err) {
235 dev_err(&dev->dev, "%s resource error!\n",
236 dev->dev.of_node->full_name);
237 goto error_out;
238 }
239
240 msi_irqs = of_irq_count(dev->dev.of_node);
241 if (!msi_irqs)
242 return -ENODEV;
243
244 if (ppc4xx_setup_pcieh_hw(dev, res, msi))
245 goto error_out;
246
247 err = ppc4xx_msi_init_allocator(dev, msi);
248 if (err) {
249 dev_err(&dev->dev, "Error allocating MSI bitmap\n");
250 goto error_out;
251 }
252 ppc4xx_msi = *msi;
253
254 ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
255 ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
256 return err;
257
258error_out:
259 ppc4xx_of_msi_remove(dev);
260 return err;
261}
262static const struct of_device_id ppc4xx_msi_ids[] = {
263 {
264 .compatible = "amcc,ppc4xx-msi",
265 },
266 {}
267};
268static struct platform_driver ppc4xx_msi_driver = {
269 .probe = ppc4xx_msi_probe,
270 .remove = ppc4xx_of_msi_remove,
271 .driver = {
272 .name = "ppc4xx-msi",
273 .owner = THIS_MODULE,
274 .of_match_table = ppc4xx_msi_ids,
275 },
276
277};
278
279static __init int ppc4xx_msi_init(void)
280{
281 return platform_driver_register(&ppc4xx_msi_driver);
282}
283
284subsys_initcall(ppc4xx_msi_init);