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1/* 2 * Copyright (C) 2006 Intel Corp. 3 * Tom Long Nguyen (tom.l.nguyen@intel.com) 4 * Zhang Yanmin (yanmin.zhang@intel.com) 5 */ 6 7#ifndef _AER_H_ 8#define _AER_H_ 9 10#define AER_NONFATAL 0 11#define AER_FATAL 1 12#define AER_CORRECTABLE 2 13 14struct pci_dev; 15 16struct aer_header_log_regs { 17 unsigned int dw0; 18 unsigned int dw1; 19 unsigned int dw2; 20 unsigned int dw3; 21}; 22 23struct aer_capability_regs { 24 u32 header; 25 u32 uncor_status; 26 u32 uncor_mask; 27 u32 uncor_severity; 28 u32 cor_status; 29 u32 cor_mask; 30 u32 cap_control; 31 struct aer_header_log_regs header_log; 32 u32 root_command; 33 u32 root_status; 34 u16 cor_err_source; 35 u16 uncor_err_source; 36}; 37 38#if defined(CONFIG_PCIEAER) 39/* pci-e port driver needs this function to enable aer */ 40int pci_enable_pcie_error_reporting(struct pci_dev *dev); 41int pci_disable_pcie_error_reporting(struct pci_dev *dev); 42int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); 43#else 44static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev) 45{ 46 return -EINVAL; 47} 48static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev) 49{ 50 return -EINVAL; 51} 52static inline int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev) 53{ 54 return -EINVAL; 55} 56#endif 57 58void cper_print_aer(struct pci_dev *dev, int cper_severity, 59 struct aer_capability_regs *aer); 60int cper_severity_to_aer(int cper_severity); 61void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, 62 int severity, 63 struct aer_capability_regs *aer_regs); 64#endif //_AER_H_ 65