Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

at v3.17-rc4 515 lines 13 kB view raw
1/* 2 * i.MX IPUv3 Graphics driver 3 * 4 * Copyright (C) 2011 Sascha Hauer, Pengutronix 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 2 9 * of the License, or (at your option) any later version. 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 18 * MA 02110-1301, USA. 19 */ 20#include <linux/component.h> 21#include <linux/module.h> 22#include <linux/export.h> 23#include <linux/device.h> 24#include <linux/platform_device.h> 25#include <drm/drmP.h> 26#include <drm/drm_crtc_helper.h> 27#include <linux/fb.h> 28#include <linux/clk.h> 29#include <linux/errno.h> 30#include <drm/drm_gem_cma_helper.h> 31#include <drm/drm_fb_cma_helper.h> 32 33#include <video/imx-ipu-v3.h> 34#include "imx-drm.h" 35#include "ipuv3-plane.h" 36 37#define DRIVER_DESC "i.MX IPUv3 Graphics" 38 39struct ipu_crtc { 40 struct device *dev; 41 struct drm_crtc base; 42 struct imx_drm_crtc *imx_crtc; 43 44 /* plane[0] is the full plane, plane[1] is the partial plane */ 45 struct ipu_plane *plane[2]; 46 47 struct ipu_dc *dc; 48 struct ipu_di *di; 49 int enabled; 50 struct drm_pending_vblank_event *page_flip_event; 51 struct drm_framebuffer *newfb; 52 int irq; 53 u32 interface_pix_fmt; 54 unsigned long di_clkflags; 55 int di_hsync_pin; 56 int di_vsync_pin; 57}; 58 59#define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base) 60 61static void ipu_fb_enable(struct ipu_crtc *ipu_crtc) 62{ 63 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); 64 65 if (ipu_crtc->enabled) 66 return; 67 68 ipu_dc_enable(ipu); 69 ipu_plane_enable(ipu_crtc->plane[0]); 70 /* Start DC channel and DI after IDMAC */ 71 ipu_dc_enable_channel(ipu_crtc->dc); 72 ipu_di_enable(ipu_crtc->di); 73 74 ipu_crtc->enabled = 1; 75} 76 77static void ipu_fb_disable(struct ipu_crtc *ipu_crtc) 78{ 79 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); 80 81 if (!ipu_crtc->enabled) 82 return; 83 84 /* Stop DC channel and DI before IDMAC */ 85 ipu_dc_disable_channel(ipu_crtc->dc); 86 ipu_di_disable(ipu_crtc->di); 87 ipu_plane_disable(ipu_crtc->plane[0]); 88 ipu_dc_disable(ipu); 89 90 ipu_crtc->enabled = 0; 91} 92 93static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode) 94{ 95 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); 96 97 dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode); 98 99 switch (mode) { 100 case DRM_MODE_DPMS_ON: 101 ipu_fb_enable(ipu_crtc); 102 break; 103 case DRM_MODE_DPMS_STANDBY: 104 case DRM_MODE_DPMS_SUSPEND: 105 case DRM_MODE_DPMS_OFF: 106 ipu_fb_disable(ipu_crtc); 107 break; 108 } 109} 110 111static int ipu_page_flip(struct drm_crtc *crtc, 112 struct drm_framebuffer *fb, 113 struct drm_pending_vblank_event *event, 114 uint32_t page_flip_flags) 115{ 116 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); 117 int ret; 118 119 if (ipu_crtc->newfb) 120 return -EBUSY; 121 122 ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc); 123 if (ret) { 124 dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n"); 125 list_del(&event->base.link); 126 127 return ret; 128 } 129 130 ipu_crtc->newfb = fb; 131 ipu_crtc->page_flip_event = event; 132 crtc->primary->fb = fb; 133 134 return 0; 135} 136 137static const struct drm_crtc_funcs ipu_crtc_funcs = { 138 .set_config = drm_crtc_helper_set_config, 139 .destroy = drm_crtc_cleanup, 140 .page_flip = ipu_page_flip, 141}; 142 143static int ipu_crtc_mode_set(struct drm_crtc *crtc, 144 struct drm_display_mode *orig_mode, 145 struct drm_display_mode *mode, 146 int x, int y, 147 struct drm_framebuffer *old_fb) 148{ 149 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); 150 int ret; 151 struct ipu_di_signal_cfg sig_cfg = {}; 152 u32 out_pixel_fmt; 153 154 dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__, 155 mode->hdisplay); 156 dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__, 157 mode->vdisplay); 158 159 out_pixel_fmt = ipu_crtc->interface_pix_fmt; 160 161 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 162 sig_cfg.interlaced = 1; 163 if (mode->flags & DRM_MODE_FLAG_PHSYNC) 164 sig_cfg.Hsync_pol = 1; 165 if (mode->flags & DRM_MODE_FLAG_PVSYNC) 166 sig_cfg.Vsync_pol = 1; 167 168 sig_cfg.enable_pol = 1; 169 sig_cfg.clk_pol = 0; 170 sig_cfg.width = mode->hdisplay; 171 sig_cfg.height = mode->vdisplay; 172 sig_cfg.pixel_fmt = out_pixel_fmt; 173 sig_cfg.h_start_width = mode->htotal - mode->hsync_end; 174 sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start; 175 sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay; 176 177 sig_cfg.v_start_width = mode->vtotal - mode->vsync_end; 178 sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start; 179 sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay; 180 sig_cfg.pixelclock = mode->clock * 1000; 181 sig_cfg.clkflags = ipu_crtc->di_clkflags; 182 183 sig_cfg.v_to_h_sync = 0; 184 185 sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin; 186 sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin; 187 188 ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced, 189 out_pixel_fmt, mode->hdisplay); 190 if (ret) { 191 dev_err(ipu_crtc->dev, 192 "initializing display controller failed with %d\n", 193 ret); 194 return ret; 195 } 196 197 ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg); 198 if (ret) { 199 dev_err(ipu_crtc->dev, 200 "initializing panel failed with %d\n", ret); 201 return ret; 202 } 203 204 return ipu_plane_mode_set(ipu_crtc->plane[0], crtc, mode, crtc->primary->fb, 205 0, 0, mode->hdisplay, mode->vdisplay, 206 x, y, mode->hdisplay, mode->vdisplay); 207} 208 209static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc) 210{ 211 unsigned long flags; 212 struct drm_device *drm = ipu_crtc->base.dev; 213 214 spin_lock_irqsave(&drm->event_lock, flags); 215 if (ipu_crtc->page_flip_event) 216 drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event); 217 ipu_crtc->page_flip_event = NULL; 218 imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc); 219 spin_unlock_irqrestore(&drm->event_lock, flags); 220} 221 222static irqreturn_t ipu_irq_handler(int irq, void *dev_id) 223{ 224 struct ipu_crtc *ipu_crtc = dev_id; 225 226 imx_drm_handle_vblank(ipu_crtc->imx_crtc); 227 228 if (ipu_crtc->newfb) { 229 ipu_crtc->newfb = NULL; 230 ipu_plane_set_base(ipu_crtc->plane[0], ipu_crtc->base.primary->fb, 231 ipu_crtc->plane[0]->x, ipu_crtc->plane[0]->y); 232 ipu_crtc_handle_pageflip(ipu_crtc); 233 } 234 235 return IRQ_HANDLED; 236} 237 238static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc, 239 const struct drm_display_mode *mode, 240 struct drm_display_mode *adjusted_mode) 241{ 242 return true; 243} 244 245static void ipu_crtc_prepare(struct drm_crtc *crtc) 246{ 247 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); 248 249 ipu_fb_disable(ipu_crtc); 250} 251 252static void ipu_crtc_commit(struct drm_crtc *crtc) 253{ 254 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); 255 256 ipu_fb_enable(ipu_crtc); 257} 258 259static struct drm_crtc_helper_funcs ipu_helper_funcs = { 260 .dpms = ipu_crtc_dpms, 261 .mode_fixup = ipu_crtc_mode_fixup, 262 .mode_set = ipu_crtc_mode_set, 263 .prepare = ipu_crtc_prepare, 264 .commit = ipu_crtc_commit, 265}; 266 267static int ipu_enable_vblank(struct drm_crtc *crtc) 268{ 269 return 0; 270} 271 272static void ipu_disable_vblank(struct drm_crtc *crtc) 273{ 274 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); 275 276 ipu_crtc->page_flip_event = NULL; 277 ipu_crtc->newfb = NULL; 278} 279 280static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type, 281 u32 pixfmt, int hsync_pin, int vsync_pin) 282{ 283 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc); 284 285 ipu_crtc->interface_pix_fmt = pixfmt; 286 ipu_crtc->di_hsync_pin = hsync_pin; 287 ipu_crtc->di_vsync_pin = vsync_pin; 288 289 switch (encoder_type) { 290 case DRM_MODE_ENCODER_DAC: 291 case DRM_MODE_ENCODER_TVDAC: 292 case DRM_MODE_ENCODER_LVDS: 293 ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC | 294 IPU_DI_CLKMODE_EXT; 295 break; 296 case DRM_MODE_ENCODER_TMDS: 297 case DRM_MODE_ENCODER_NONE: 298 ipu_crtc->di_clkflags = 0; 299 break; 300 } 301 302 return 0; 303} 304 305static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = { 306 .enable_vblank = ipu_enable_vblank, 307 .disable_vblank = ipu_disable_vblank, 308 .set_interface_pix_fmt = ipu_set_interface_pix_fmt, 309 .crtc_funcs = &ipu_crtc_funcs, 310 .crtc_helper_funcs = &ipu_helper_funcs, 311}; 312 313static void ipu_put_resources(struct ipu_crtc *ipu_crtc) 314{ 315 if (!IS_ERR_OR_NULL(ipu_crtc->dc)) 316 ipu_dc_put(ipu_crtc->dc); 317 if (!IS_ERR_OR_NULL(ipu_crtc->di)) 318 ipu_di_put(ipu_crtc->di); 319} 320 321static int ipu_get_resources(struct ipu_crtc *ipu_crtc, 322 struct ipu_client_platformdata *pdata) 323{ 324 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); 325 int ret; 326 327 ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc); 328 if (IS_ERR(ipu_crtc->dc)) { 329 ret = PTR_ERR(ipu_crtc->dc); 330 goto err_out; 331 } 332 333 ipu_crtc->di = ipu_di_get(ipu, pdata->di); 334 if (IS_ERR(ipu_crtc->di)) { 335 ret = PTR_ERR(ipu_crtc->di); 336 goto err_out; 337 } 338 339 return 0; 340err_out: 341 ipu_put_resources(ipu_crtc); 342 343 return ret; 344} 345 346static int ipu_crtc_init(struct ipu_crtc *ipu_crtc, 347 struct ipu_client_platformdata *pdata, struct drm_device *drm) 348{ 349 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent); 350 int dp = -EINVAL; 351 int ret; 352 int id; 353 354 ret = ipu_get_resources(ipu_crtc, pdata); 355 if (ret) { 356 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n", 357 ret); 358 return ret; 359 } 360 361 ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc, 362 &ipu_crtc_helper_funcs, ipu_crtc->dev->of_node); 363 if (ret) { 364 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret); 365 goto err_put_resources; 366 } 367 368 if (pdata->dp >= 0) 369 dp = IPU_DP_FLOW_SYNC_BG; 370 id = imx_drm_crtc_id(ipu_crtc->imx_crtc); 371 ipu_crtc->plane[0] = ipu_plane_init(ipu_crtc->base.dev, ipu, 372 pdata->dma[0], dp, BIT(id), true); 373 ret = ipu_plane_get_resources(ipu_crtc->plane[0]); 374 if (ret) { 375 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n", 376 ret); 377 goto err_remove_crtc; 378 } 379 380 /* If this crtc is using the DP, add an overlay plane */ 381 if (pdata->dp >= 0 && pdata->dma[1] > 0) { 382 ipu_crtc->plane[1] = ipu_plane_init(ipu_crtc->base.dev, ipu, 383 pdata->dma[1], 384 IPU_DP_FLOW_SYNC_FG, 385 BIT(id), false); 386 if (IS_ERR(ipu_crtc->plane[1])) 387 ipu_crtc->plane[1] = NULL; 388 } 389 390 ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]); 391 ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0, 392 "imx_drm", ipu_crtc); 393 if (ret < 0) { 394 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret); 395 goto err_put_plane_res; 396 } 397 398 return 0; 399 400err_put_plane_res: 401 ipu_plane_put_resources(ipu_crtc->plane[0]); 402err_remove_crtc: 403 imx_drm_remove_crtc(ipu_crtc->imx_crtc); 404err_put_resources: 405 ipu_put_resources(ipu_crtc); 406 407 return ret; 408} 409 410static struct device_node *ipu_drm_get_port_by_id(struct device_node *parent, 411 int port_id) 412{ 413 struct device_node *port; 414 int id, ret; 415 416 port = of_get_child_by_name(parent, "port"); 417 while (port) { 418 ret = of_property_read_u32(port, "reg", &id); 419 if (!ret && id == port_id) 420 return port; 421 422 do { 423 port = of_get_next_child(parent, port); 424 if (!port) 425 return NULL; 426 } while (of_node_cmp(port->name, "port")); 427 } 428 429 return NULL; 430} 431 432static int ipu_drm_bind(struct device *dev, struct device *master, void *data) 433{ 434 struct ipu_client_platformdata *pdata = dev->platform_data; 435 struct drm_device *drm = data; 436 struct ipu_crtc *ipu_crtc; 437 int ret; 438 439 ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL); 440 if (!ipu_crtc) 441 return -ENOMEM; 442 443 ipu_crtc->dev = dev; 444 445 ret = ipu_crtc_init(ipu_crtc, pdata, drm); 446 if (ret) 447 return ret; 448 449 dev_set_drvdata(dev, ipu_crtc); 450 451 return 0; 452} 453 454static void ipu_drm_unbind(struct device *dev, struct device *master, 455 void *data) 456{ 457 struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev); 458 459 imx_drm_remove_crtc(ipu_crtc->imx_crtc); 460 461 ipu_plane_put_resources(ipu_crtc->plane[0]); 462 ipu_put_resources(ipu_crtc); 463} 464 465static const struct component_ops ipu_crtc_ops = { 466 .bind = ipu_drm_bind, 467 .unbind = ipu_drm_unbind, 468}; 469 470static int ipu_drm_probe(struct platform_device *pdev) 471{ 472 struct device *dev = &pdev->dev; 473 struct ipu_client_platformdata *pdata = dev->platform_data; 474 int ret; 475 476 if (!dev->platform_data) 477 return -EINVAL; 478 479 if (!dev->of_node) { 480 /* Associate crtc device with the corresponding DI port node */ 481 dev->of_node = ipu_drm_get_port_by_id(dev->parent->of_node, 482 pdata->di + 2); 483 if (!dev->of_node) { 484 dev_err(dev, "missing port@%d node in %s\n", 485 pdata->di + 2, dev->parent->of_node->full_name); 486 return -ENODEV; 487 } 488 } 489 490 ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32)); 491 if (ret) 492 return ret; 493 494 return component_add(dev, &ipu_crtc_ops); 495} 496 497static int ipu_drm_remove(struct platform_device *pdev) 498{ 499 component_del(&pdev->dev, &ipu_crtc_ops); 500 return 0; 501} 502 503static struct platform_driver ipu_drm_driver = { 504 .driver = { 505 .name = "imx-ipuv3-crtc", 506 }, 507 .probe = ipu_drm_probe, 508 .remove = ipu_drm_remove, 509}; 510module_platform_driver(ipu_drm_driver); 511 512MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); 513MODULE_DESCRIPTION(DRIVER_DESC); 514MODULE_LICENSE("GPL"); 515MODULE_ALIAS("platform:imx-ipuv3-crtc");