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1/* 2 * linux/include/linux/mmc/host.h 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 * 8 * Host driver specific definitions. 9 */ 10#ifndef LINUX_MMC_HOST_H 11#define LINUX_MMC_HOST_H 12 13#include <linux/leds.h> 14#include <linux/mutex.h> 15#include <linux/sched.h> 16#include <linux/device.h> 17#include <linux/fault-inject.h> 18 19#include <linux/mmc/core.h> 20#include <linux/mmc/card.h> 21#include <linux/mmc/pm.h> 22 23struct mmc_ios { 24 unsigned int clock; /* clock rate */ 25 unsigned short vdd; 26 27/* vdd stores the bit number of the selected voltage range from below. */ 28 29 unsigned char bus_mode; /* command output mode */ 30 31#define MMC_BUSMODE_OPENDRAIN 1 32#define MMC_BUSMODE_PUSHPULL 2 33 34 unsigned char chip_select; /* SPI chip select */ 35 36#define MMC_CS_DONTCARE 0 37#define MMC_CS_HIGH 1 38#define MMC_CS_LOW 2 39 40 unsigned char power_mode; /* power supply mode */ 41 42#define MMC_POWER_OFF 0 43#define MMC_POWER_UP 1 44#define MMC_POWER_ON 2 45 46 unsigned char bus_width; /* data bus width */ 47 48#define MMC_BUS_WIDTH_1 0 49#define MMC_BUS_WIDTH_4 2 50#define MMC_BUS_WIDTH_8 3 51 52 unsigned char timing; /* timing specification used */ 53 54#define MMC_TIMING_LEGACY 0 55#define MMC_TIMING_MMC_HS 1 56#define MMC_TIMING_SD_HS 2 57#define MMC_TIMING_UHS_SDR12 3 58#define MMC_TIMING_UHS_SDR25 4 59#define MMC_TIMING_UHS_SDR50 5 60#define MMC_TIMING_UHS_SDR104 6 61#define MMC_TIMING_UHS_DDR50 7 62#define MMC_TIMING_MMC_DDR52 8 63#define MMC_TIMING_MMC_HS200 9 64#define MMC_TIMING_MMC_HS400 10 65 66 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ 67 68#define MMC_SIGNAL_VOLTAGE_330 0 69#define MMC_SIGNAL_VOLTAGE_180 1 70#define MMC_SIGNAL_VOLTAGE_120 2 71 72 unsigned char drv_type; /* driver type (A, B, C, D) */ 73 74#define MMC_SET_DRIVER_TYPE_B 0 75#define MMC_SET_DRIVER_TYPE_A 1 76#define MMC_SET_DRIVER_TYPE_C 2 77#define MMC_SET_DRIVER_TYPE_D 3 78}; 79 80struct mmc_host_ops { 81 /* 82 * 'enable' is called when the host is claimed and 'disable' is called 83 * when the host is released. 'enable' and 'disable' are deprecated. 84 */ 85 int (*enable)(struct mmc_host *host); 86 int (*disable)(struct mmc_host *host); 87 /* 88 * It is optional for the host to implement pre_req and post_req in 89 * order to support double buffering of requests (prepare one 90 * request while another request is active). 91 * pre_req() must always be followed by a post_req(). 92 * To undo a call made to pre_req(), call post_req() with 93 * a nonzero err condition. 94 */ 95 void (*post_req)(struct mmc_host *host, struct mmc_request *req, 96 int err); 97 void (*pre_req)(struct mmc_host *host, struct mmc_request *req, 98 bool is_first_req); 99 void (*request)(struct mmc_host *host, struct mmc_request *req); 100 /* 101 * Avoid calling these three functions too often or in a "fast path", 102 * since underlaying controller might implement them in an expensive 103 * and/or slow way. 104 * 105 * Also note that these functions might sleep, so don't call them 106 * in the atomic contexts! 107 * 108 * Return values for the get_ro callback should be: 109 * 0 for a read/write card 110 * 1 for a read-only card 111 * -ENOSYS when not supported (equal to NULL callback) 112 * or a negative errno value when something bad happened 113 * 114 * Return values for the get_cd callback should be: 115 * 0 for a absent card 116 * 1 for a present card 117 * -ENOSYS when not supported (equal to NULL callback) 118 * or a negative errno value when something bad happened 119 */ 120 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios); 121 int (*get_ro)(struct mmc_host *host); 122 int (*get_cd)(struct mmc_host *host); 123 124 void (*enable_sdio_irq)(struct mmc_host *host, int enable); 125 126 /* optional callback for HC quirks */ 127 void (*init_card)(struct mmc_host *host, struct mmc_card *card); 128 129 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios); 130 131 /* Check if the card is pulling dat[0:3] low */ 132 int (*card_busy)(struct mmc_host *host); 133 134 /* The tuning command opcode value is different for SD and eMMC cards */ 135 int (*execute_tuning)(struct mmc_host *host, u32 opcode); 136 137 /* Prepare HS400 target operating frequency depending host driver */ 138 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios); 139 int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv); 140 void (*hw_reset)(struct mmc_host *host); 141 void (*card_event)(struct mmc_host *host); 142}; 143 144struct mmc_card; 145struct device; 146 147struct mmc_async_req { 148 /* active mmc request */ 149 struct mmc_request *mrq; 150 /* 151 * Check error status of completed mmc request. 152 * Returns 0 if success otherwise non zero. 153 */ 154 int (*err_check) (struct mmc_card *, struct mmc_async_req *); 155}; 156 157/** 158 * struct mmc_slot - MMC slot functions 159 * 160 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL 161 * @lock: protect the @handler_priv pointer 162 * @handler_priv: MMC/SD-card slot context 163 * 164 * Some MMC/SD host controllers implement slot-functions like card and 165 * write-protect detection natively. However, a large number of controllers 166 * leave these functions to the CPU. This struct provides a hook to attach 167 * such slot-function drivers. 168 */ 169struct mmc_slot { 170 int cd_irq; 171 struct mutex lock; 172 void *handler_priv; 173}; 174 175/** 176 * mmc_context_info - synchronization details for mmc context 177 * @is_done_rcv wake up reason was done request 178 * @is_new_req wake up reason was new request 179 * @is_waiting_last_req mmc context waiting for single running request 180 * @wait wait queue 181 * @lock lock to protect data fields 182 */ 183struct mmc_context_info { 184 bool is_done_rcv; 185 bool is_new_req; 186 bool is_waiting_last_req; 187 wait_queue_head_t wait; 188 spinlock_t lock; 189}; 190 191struct regulator; 192 193struct mmc_supply { 194 struct regulator *vmmc; /* Card power supply */ 195 struct regulator *vqmmc; /* Optional Vccq supply */ 196}; 197 198struct mmc_host { 199 struct device *parent; 200 struct device class_dev; 201 int index; 202 const struct mmc_host_ops *ops; 203 unsigned int f_min; 204 unsigned int f_max; 205 unsigned int f_init; 206 u32 ocr_avail; 207 u32 ocr_avail_sdio; /* SDIO-specific OCR */ 208 u32 ocr_avail_sd; /* SD-specific OCR */ 209 u32 ocr_avail_mmc; /* MMC-specific OCR */ 210 struct notifier_block pm_notify; 211 u32 max_current_330; 212 u32 max_current_300; 213 u32 max_current_180; 214 215#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 216#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 217#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 218#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 219#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 220#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 221#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 222#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 223#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 224#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 225#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 226#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 227#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 228#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 229#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 230#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 231#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 232 233 u32 caps; /* Host capabilities */ 234 235#define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */ 236#define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */ 237#define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */ 238#define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */ 239#define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */ 240#define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */ 241#define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */ 242#define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */ 243#define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */ 244#define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */ 245#define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */ 246#define MMC_CAP_1_8V_DDR (1 << 11) /* can support */ 247 /* DDR mode at 1.8V */ 248#define MMC_CAP_1_2V_DDR (1 << 12) /* can support */ 249 /* DDR mode at 1.2V */ 250#define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */ 251#define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */ 252#define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */ 253#define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */ 254#define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */ 255#define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */ 256#define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */ 257#define MMC_CAP_RUNTIME_RESUME (1 << 20) /* Resume at runtime_resume. */ 258#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 259#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 260#define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ 261#define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ 262#define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */ 263 264 u32 caps2; /* More host capabilities */ 265 266#define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */ 267#define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */ 268#define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock reads don't work */ 269#define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */ 270#define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */ 271#define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \ 272 MMC_CAP2_HS200_1_2V_SDR) 273#define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */ 274#define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ 275#define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ 276#define MMC_CAP2_PACKED_RD (1 << 12) /* Allow packed read */ 277#define MMC_CAP2_PACKED_WR (1 << 13) /* Allow packed write */ 278#define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \ 279 MMC_CAP2_PACKED_WR) 280#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */ 281#define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */ 282#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ 283#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ 284 MMC_CAP2_HS400_1_2V) 285#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) 286 287 mmc_pm_flag_t pm_caps; /* supported pm features */ 288 289#ifdef CONFIG_MMC_CLKGATE 290 int clk_requests; /* internal reference counter */ 291 unsigned int clk_delay; /* number of MCI clk hold cycles */ 292 bool clk_gated; /* clock gated */ 293 struct delayed_work clk_gate_work; /* delayed clock gate */ 294 unsigned int clk_old; /* old clock value cache */ 295 spinlock_t clk_lock; /* lock for clk fields */ 296 struct mutex clk_gate_mutex; /* mutex for clock gating */ 297 struct device_attribute clkgate_delay_attr; 298 unsigned long clkgate_delay; 299#endif 300 301 /* host specific block data */ 302 unsigned int max_seg_size; /* see blk_queue_max_segment_size */ 303 unsigned short max_segs; /* see blk_queue_max_segments */ 304 unsigned short unused; 305 unsigned int max_req_size; /* maximum number of bytes in one req */ 306 unsigned int max_blk_size; /* maximum size of one mmc block */ 307 unsigned int max_blk_count; /* maximum number of blocks in one req */ 308 unsigned int max_busy_timeout; /* max busy timeout in ms */ 309 310 /* private data */ 311 spinlock_t lock; /* lock for claim and bus ops */ 312 313 struct mmc_ios ios; /* current io bus settings */ 314 315 /* group bitfields together to minimize padding */ 316 unsigned int use_spi_crc:1; 317 unsigned int claimed:1; /* host exclusively claimed */ 318 unsigned int bus_dead:1; /* bus has been released */ 319#ifdef CONFIG_MMC_DEBUG 320 unsigned int removed:1; /* host is being removed */ 321#endif 322 323 int rescan_disable; /* disable card detection */ 324 int rescan_entered; /* used with nonremovable devices */ 325 326 bool trigger_card_event; /* card_event necessary */ 327 328 struct mmc_card *card; /* device attached to this host */ 329 330 wait_queue_head_t wq; 331 struct task_struct *claimer; /* task that has host claimed */ 332 int claim_cnt; /* "claim" nesting count */ 333 334 struct delayed_work detect; 335 int detect_change; /* card detect flag */ 336 struct mmc_slot slot; 337 338 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 339 unsigned int bus_refs; /* reference counter */ 340 341 unsigned int sdio_irqs; 342 struct task_struct *sdio_irq_thread; 343 bool sdio_irq_pending; 344 atomic_t sdio_irq_thread_abort; 345 346 mmc_pm_flag_t pm_flags; /* requested pm features */ 347 348 struct led_trigger *led; /* activity led */ 349 350#ifdef CONFIG_REGULATOR 351 bool regulator_enabled; /* regulator state */ 352#endif 353 struct mmc_supply supply; 354 355 struct dentry *debugfs_root; 356 357 struct mmc_async_req *areq; /* active async req */ 358 struct mmc_context_info context_info; /* async synchronization info */ 359 360#ifdef CONFIG_FAIL_MMC_REQUEST 361 struct fault_attr fail_mmc_request; 362#endif 363 364 unsigned int actual_clock; /* Actual HC clock rate */ 365 366 unsigned int slotno; /* used for sdio acpi binding */ 367 368 unsigned long private[0] ____cacheline_aligned; 369}; 370 371struct mmc_host *mmc_alloc_host(int extra, struct device *); 372int mmc_add_host(struct mmc_host *); 373void mmc_remove_host(struct mmc_host *); 374void mmc_free_host(struct mmc_host *); 375int mmc_of_parse(struct mmc_host *host); 376 377static inline void *mmc_priv(struct mmc_host *host) 378{ 379 return (void *)host->private; 380} 381 382#define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI) 383 384#define mmc_dev(x) ((x)->parent) 385#define mmc_classdev(x) (&(x)->class_dev) 386#define mmc_hostname(x) (dev_name(&(x)->class_dev)) 387 388int mmc_power_save_host(struct mmc_host *host); 389int mmc_power_restore_host(struct mmc_host *host); 390 391void mmc_detect_change(struct mmc_host *, unsigned long delay); 392void mmc_request_done(struct mmc_host *, struct mmc_request *); 393 394static inline void mmc_signal_sdio_irq(struct mmc_host *host) 395{ 396 host->ops->enable_sdio_irq(host, 0); 397 host->sdio_irq_pending = true; 398 wake_up_process(host->sdio_irq_thread); 399} 400 401void sdio_run_irqs(struct mmc_host *host); 402 403#ifdef CONFIG_REGULATOR 404int mmc_regulator_get_ocrmask(struct regulator *supply); 405int mmc_regulator_set_ocr(struct mmc_host *mmc, 406 struct regulator *supply, 407 unsigned short vdd_bit); 408#else 409static inline int mmc_regulator_get_ocrmask(struct regulator *supply) 410{ 411 return 0; 412} 413 414static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, 415 struct regulator *supply, 416 unsigned short vdd_bit) 417{ 418 return 0; 419} 420#endif 421 422int mmc_regulator_get_supply(struct mmc_host *mmc); 423 424int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *); 425 426static inline int mmc_card_is_removable(struct mmc_host *host) 427{ 428 return !(host->caps & MMC_CAP_NONREMOVABLE); 429} 430 431static inline int mmc_card_keep_power(struct mmc_host *host) 432{ 433 return host->pm_flags & MMC_PM_KEEP_POWER; 434} 435 436static inline int mmc_card_wake_sdio_irq(struct mmc_host *host) 437{ 438 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ; 439} 440 441static inline int mmc_host_cmd23(struct mmc_host *host) 442{ 443 return host->caps & MMC_CAP_CMD23; 444} 445 446static inline int mmc_boot_partition_access(struct mmc_host *host) 447{ 448 return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC); 449} 450 451static inline int mmc_host_uhs(struct mmc_host *host) 452{ 453 return host->caps & 454 (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | 455 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | 456 MMC_CAP_UHS_DDR50); 457} 458 459static inline int mmc_host_packed_wr(struct mmc_host *host) 460{ 461 return host->caps2 & MMC_CAP2_PACKED_WR; 462} 463 464#ifdef CONFIG_MMC_CLKGATE 465void mmc_host_clk_hold(struct mmc_host *host); 466void mmc_host_clk_release(struct mmc_host *host); 467unsigned int mmc_host_clk_rate(struct mmc_host *host); 468 469#else 470static inline void mmc_host_clk_hold(struct mmc_host *host) 471{ 472} 473 474static inline void mmc_host_clk_release(struct mmc_host *host) 475{ 476} 477 478static inline unsigned int mmc_host_clk_rate(struct mmc_host *host) 479{ 480 return host->ios.clock; 481} 482#endif 483 484static inline int mmc_card_hs(struct mmc_card *card) 485{ 486 return card->host->ios.timing == MMC_TIMING_SD_HS || 487 card->host->ios.timing == MMC_TIMING_MMC_HS; 488} 489 490static inline int mmc_card_uhs(struct mmc_card *card) 491{ 492 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 && 493 card->host->ios.timing <= MMC_TIMING_UHS_DDR50; 494} 495 496static inline bool mmc_card_hs200(struct mmc_card *card) 497{ 498 return card->host->ios.timing == MMC_TIMING_MMC_HS200; 499} 500 501static inline bool mmc_card_ddr52(struct mmc_card *card) 502{ 503 return card->host->ios.timing == MMC_TIMING_MMC_DDR52; 504} 505 506static inline bool mmc_card_hs400(struct mmc_card *card) 507{ 508 return card->host->ios.timing == MMC_TIMING_MMC_HS400; 509} 510 511#endif /* LINUX_MMC_HOST_H */