Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
1#ifndef _LINUX_DMA_MAPPING_H
2#define _LINUX_DMA_MAPPING_H
3
4#include <linux/string.h>
5#include <linux/device.h>
6#include <linux/err.h>
7#include <linux/dma-attrs.h>
8#include <linux/dma-direction.h>
9#include <linux/scatterlist.h>
10
11/*
12 * A dma_addr_t can hold any valid DMA or bus address for the platform.
13 * It can be given to a device to use as a DMA source or target. A CPU cannot
14 * reference a dma_addr_t directly because there may be translation between
15 * its physical address space and the bus address space.
16 */
17struct dma_map_ops {
18 void* (*alloc)(struct device *dev, size_t size,
19 dma_addr_t *dma_handle, gfp_t gfp,
20 struct dma_attrs *attrs);
21 void (*free)(struct device *dev, size_t size,
22 void *vaddr, dma_addr_t dma_handle,
23 struct dma_attrs *attrs);
24 int (*mmap)(struct device *, struct vm_area_struct *,
25 void *, dma_addr_t, size_t, struct dma_attrs *attrs);
26
27 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
28 dma_addr_t, size_t, struct dma_attrs *attrs);
29
30 dma_addr_t (*map_page)(struct device *dev, struct page *page,
31 unsigned long offset, size_t size,
32 enum dma_data_direction dir,
33 struct dma_attrs *attrs);
34 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
35 size_t size, enum dma_data_direction dir,
36 struct dma_attrs *attrs);
37 int (*map_sg)(struct device *dev, struct scatterlist *sg,
38 int nents, enum dma_data_direction dir,
39 struct dma_attrs *attrs);
40 void (*unmap_sg)(struct device *dev,
41 struct scatterlist *sg, int nents,
42 enum dma_data_direction dir,
43 struct dma_attrs *attrs);
44 void (*sync_single_for_cpu)(struct device *dev,
45 dma_addr_t dma_handle, size_t size,
46 enum dma_data_direction dir);
47 void (*sync_single_for_device)(struct device *dev,
48 dma_addr_t dma_handle, size_t size,
49 enum dma_data_direction dir);
50 void (*sync_sg_for_cpu)(struct device *dev,
51 struct scatterlist *sg, int nents,
52 enum dma_data_direction dir);
53 void (*sync_sg_for_device)(struct device *dev,
54 struct scatterlist *sg, int nents,
55 enum dma_data_direction dir);
56 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
57 int (*dma_supported)(struct device *dev, u64 mask);
58 int (*set_dma_mask)(struct device *dev, u64 mask);
59#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
60 u64 (*get_required_mask)(struct device *dev);
61#endif
62 int is_phys;
63};
64
65#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
66
67#define DMA_MASK_NONE 0x0ULL
68
69static inline int valid_dma_direction(int dma_direction)
70{
71 return ((dma_direction == DMA_BIDIRECTIONAL) ||
72 (dma_direction == DMA_TO_DEVICE) ||
73 (dma_direction == DMA_FROM_DEVICE));
74}
75
76static inline int is_device_dma_capable(struct device *dev)
77{
78 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
79}
80
81#ifdef CONFIG_HAS_DMA
82#include <asm/dma-mapping.h>
83#else
84#include <asm-generic/dma-mapping-broken.h>
85#endif
86
87static inline u64 dma_get_mask(struct device *dev)
88{
89 if (dev && dev->dma_mask && *dev->dma_mask)
90 return *dev->dma_mask;
91 return DMA_BIT_MASK(32);
92}
93
94#ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
95int dma_set_coherent_mask(struct device *dev, u64 mask);
96#else
97static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
98{
99 if (!dma_supported(dev, mask))
100 return -EIO;
101 dev->coherent_dma_mask = mask;
102 return 0;
103}
104#endif
105
106/*
107 * Set both the DMA mask and the coherent DMA mask to the same thing.
108 * Note that we don't check the return value from dma_set_coherent_mask()
109 * as the DMA API guarantees that the coherent DMA mask can be set to
110 * the same or smaller than the streaming DMA mask.
111 */
112static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
113{
114 int rc = dma_set_mask(dev, mask);
115 if (rc == 0)
116 dma_set_coherent_mask(dev, mask);
117 return rc;
118}
119
120/*
121 * Similar to the above, except it deals with the case where the device
122 * does not have dev->dma_mask appropriately setup.
123 */
124static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
125{
126 dev->dma_mask = &dev->coherent_dma_mask;
127 return dma_set_mask_and_coherent(dev, mask);
128}
129
130extern u64 dma_get_required_mask(struct device *dev);
131
132#ifndef set_arch_dma_coherent_ops
133static inline int set_arch_dma_coherent_ops(struct device *dev)
134{
135 return 0;
136}
137#endif
138
139static inline unsigned int dma_get_max_seg_size(struct device *dev)
140{
141 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536;
142}
143
144static inline unsigned int dma_set_max_seg_size(struct device *dev,
145 unsigned int size)
146{
147 if (dev->dma_parms) {
148 dev->dma_parms->max_segment_size = size;
149 return 0;
150 } else
151 return -EIO;
152}
153
154static inline unsigned long dma_get_seg_boundary(struct device *dev)
155{
156 return dev->dma_parms ?
157 dev->dma_parms->segment_boundary_mask : 0xffffffff;
158}
159
160static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
161{
162 if (dev->dma_parms) {
163 dev->dma_parms->segment_boundary_mask = mask;
164 return 0;
165 } else
166 return -EIO;
167}
168
169#ifndef dma_max_pfn
170static inline unsigned long dma_max_pfn(struct device *dev)
171{
172 return *dev->dma_mask >> PAGE_SHIFT;
173}
174#endif
175
176static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
177 dma_addr_t *dma_handle, gfp_t flag)
178{
179 void *ret = dma_alloc_coherent(dev, size, dma_handle,
180 flag | __GFP_ZERO);
181 return ret;
182}
183
184#ifdef CONFIG_HAS_DMA
185static inline int dma_get_cache_alignment(void)
186{
187#ifdef ARCH_DMA_MINALIGN
188 return ARCH_DMA_MINALIGN;
189#endif
190 return 1;
191}
192#endif
193
194/* flags for the coherent memory api */
195#define DMA_MEMORY_MAP 0x01
196#define DMA_MEMORY_IO 0x02
197#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
198#define DMA_MEMORY_EXCLUSIVE 0x08
199
200#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
201static inline int
202dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
203 dma_addr_t device_addr, size_t size, int flags)
204{
205 return 0;
206}
207
208static inline void
209dma_release_declared_memory(struct device *dev)
210{
211}
212
213static inline void *
214dma_mark_declared_memory_occupied(struct device *dev,
215 dma_addr_t device_addr, size_t size)
216{
217 return ERR_PTR(-EBUSY);
218}
219#endif
220
221/*
222 * Managed DMA API
223 */
224extern void *dmam_alloc_coherent(struct device *dev, size_t size,
225 dma_addr_t *dma_handle, gfp_t gfp);
226extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
227 dma_addr_t dma_handle);
228extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
229 dma_addr_t *dma_handle, gfp_t gfp);
230extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
231 dma_addr_t dma_handle);
232#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
233extern int dmam_declare_coherent_memory(struct device *dev,
234 phys_addr_t phys_addr,
235 dma_addr_t device_addr, size_t size,
236 int flags);
237extern void dmam_release_declared_memory(struct device *dev);
238#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
239static inline int dmam_declare_coherent_memory(struct device *dev,
240 phys_addr_t phys_addr, dma_addr_t device_addr,
241 size_t size, gfp_t gfp)
242{
243 return 0;
244}
245
246static inline void dmam_release_declared_memory(struct device *dev)
247{
248}
249#endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
250
251#ifndef CONFIG_HAVE_DMA_ATTRS
252struct dma_attrs;
253
254#define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \
255 dma_map_single(dev, cpu_addr, size, dir)
256
257#define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \
258 dma_unmap_single(dev, dma_addr, size, dir)
259
260#define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \
261 dma_map_sg(dev, sgl, nents, dir)
262
263#define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \
264 dma_unmap_sg(dev, sgl, nents, dir)
265
266#endif /* CONFIG_HAVE_DMA_ATTRS */
267
268#ifdef CONFIG_NEED_DMA_MAP_STATE
269#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
270#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
271#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
272#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
273#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
274#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
275#else
276#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
277#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
278#define dma_unmap_addr(PTR, ADDR_NAME) (0)
279#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
280#define dma_unmap_len(PTR, LEN_NAME) (0)
281#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
282#endif
283
284#endif