Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
at v3.16 3207 lines 84 kB view raw
1/************************************************************************** 2 * 3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above 12 * copyright notice, this list of conditions and the following 13 * disclaimer in the documentation and/or other materials provided 14 * with the distribution. 15 * 16 * Alternatively, this software may be distributed under the terms of the 17 * GNU General Public License ("GPL") version 2 as published by the Free 18 * Software Foundation. 19 * 20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR 24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * The views and conclusions contained in the software and documentation 34 * are those of the authors and should not be interpreted as representing 35 * official policies, either expressed or implied, of Alacritech, Inc. 36 * 37 **************************************************************************/ 38 39/* 40 * FILENAME: slicoss.c 41 * 42 * The SLICOSS driver for Alacritech's IS-NIC products. 43 * 44 * This driver is supposed to support: 45 * 46 * Mojave cards (single port PCI Gigabit) both copper and fiber 47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber 48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber 49 * 50 * The driver was actually tested on Oasis and Kalahari cards. 51 * 52 * 53 * NOTE: This is the standard, non-accelerated version of Alacritech's 54 * IS-NIC driver. 55 */ 56 57 58#define KLUDGE_FOR_4GB_BOUNDARY 1 59#define DEBUG_MICROCODE 1 60#define DBG 1 61#define SLIC_INTERRUPT_PROCESS_LIMIT 1 62#define SLIC_OFFLOAD_IP_CHECKSUM 1 63#define STATS_TIMER_INTERVAL 2 64#define PING_TIMER_INTERVAL 1 65#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 66 67#include <linux/kernel.h> 68#include <linux/string.h> 69#include <linux/errno.h> 70#include <linux/ioport.h> 71#include <linux/slab.h> 72#include <linux/interrupt.h> 73#include <linux/timer.h> 74#include <linux/pci.h> 75#include <linux/spinlock.h> 76#include <linux/init.h> 77#include <linux/bitops.h> 78#include <linux/io.h> 79#include <linux/netdevice.h> 80#include <linux/crc32.h> 81#include <linux/etherdevice.h> 82#include <linux/skbuff.h> 83#include <linux/delay.h> 84#include <linux/seq_file.h> 85#include <linux/kthread.h> 86#include <linux/module.h> 87#include <linux/moduleparam.h> 88 89#include <linux/firmware.h> 90#include <linux/types.h> 91#include <linux/dma-mapping.h> 92#include <linux/mii.h> 93#include <linux/if_vlan.h> 94#include <asm/unaligned.h> 95 96#include <linux/ethtool.h> 97#include <linux/uaccess.h> 98#include "slichw.h" 99#include "slic.h" 100 101static uint slic_first_init = 1; 102static char *slic_banner = "Alacritech SLIC Technology(tm) Server " 103 "and Storage Accelerator (Non-Accelerated)"; 104 105static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00"; 106 107static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL }; 108static int intagg_delay = 100; 109static u32 dynamic_intagg; 110static unsigned int rcv_count; 111 112#define DRV_NAME "slicoss" 113#define DRV_VERSION "2.0.1" 114#define DRV_AUTHOR "Alacritech, Inc. Engineering" 115#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\ 116 "Non-Accelerated Driver" 117#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\ 118 "All rights reserved." 119#define PFX DRV_NAME " " 120 121MODULE_AUTHOR(DRV_AUTHOR); 122MODULE_DESCRIPTION(DRV_DESCRIPTION); 123MODULE_LICENSE("Dual BSD/GPL"); 124 125module_param(dynamic_intagg, int, 0); 126MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting"); 127module_param(intagg_delay, int, 0); 128MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay"); 129 130static const struct pci_device_id slic_pci_tbl[] = { 131 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) }, 132 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) }, 133 { 0 } 134}; 135 136MODULE_DEVICE_TABLE(pci, slic_pci_tbl); 137 138static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush) 139{ 140 writel(value, reg); 141 if (flush) 142 mb(); 143} 144 145static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg, 146 u32 value, void __iomem *regh, u32 paddrh, 147 bool flush) 148{ 149 spin_lock_irqsave(&adapter->bit64reglock.lock, 150 adapter->bit64reglock.flags); 151 if (paddrh != adapter->curaddrupper) { 152 adapter->curaddrupper = paddrh; 153 writel(paddrh, regh); 154 } 155 writel(value, reg); 156 if (flush) 157 mb(); 158 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 159 adapter->bit64reglock.flags); 160} 161 162static void slic_mcast_set_bit(struct adapter *adapter, char *address) 163{ 164 unsigned char crcpoly; 165 166 /* Get the CRC polynomial for the mac address */ 167 /* we use bits 1-8 (lsb), bitwise reversed, 168 * msb (= lsb bit 0 before bitrev) is automatically discarded */ 169 crcpoly = (ether_crc(ETH_ALEN, address)>>23); 170 171 /* We only have space on the SLIC for 64 entries. Lop 172 * off the top two bits. (2^6 = 64) 173 */ 174 crcpoly &= 0x3F; 175 176 /* OR in the new bit into our 64 bit mask. */ 177 adapter->mcastmask |= (u64) 1 << crcpoly; 178} 179 180static void slic_mcast_set_mask(struct adapter *adapter) 181{ 182 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 183 184 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) { 185 /* Turn on all multicast addresses. We have to do this for 186 * promiscuous mode as well as ALLMCAST mode. It saves the 187 * Microcode from having to keep state about the MAC 188 * configuration. 189 */ 190 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH); 191 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF, 192 FLUSH); 193 } else { 194 /* Commit our multicast mast to the SLIC by writing to the 195 * multicast address mask registers 196 */ 197 slic_reg32_write(&slic_regs->slic_mcastlow, 198 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH); 199 slic_reg32_write(&slic_regs->slic_mcasthigh, 200 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH); 201 } 202} 203 204static void slic_timer_ping(ulong dev) 205{ 206 struct adapter *adapter; 207 struct sliccard *card; 208 209 adapter = netdev_priv((struct net_device *)dev); 210 card = adapter->card; 211 212 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ); 213 add_timer(&adapter->pingtimer); 214} 215 216static void slic_unmap_mmio_space(struct adapter *adapter) 217{ 218 if (adapter->slic_regs) 219 iounmap(adapter->slic_regs); 220 adapter->slic_regs = NULL; 221} 222 223/* 224 * slic_link_config 225 * 226 * Write phy control to configure link duplex/speed 227 * 228 */ 229static void slic_link_config(struct adapter *adapter, 230 u32 linkspeed, u32 linkduplex) 231{ 232 u32 __iomem *wphy; 233 u32 speed; 234 u32 duplex; 235 u32 phy_config; 236 u32 phy_advreg; 237 u32 phy_gctlreg; 238 239 if (adapter->state != ADAPT_UP) 240 return; 241 242 if (linkspeed > LINK_1000MB) 243 linkspeed = LINK_AUTOSPEED; 244 if (linkduplex > LINK_AUTOD) 245 linkduplex = LINK_AUTOD; 246 247 wphy = &adapter->slic_regs->slic_wphy; 248 249 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) { 250 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) { 251 /* We've got a fiber gigabit interface, and register 252 * 4 is different in fiber mode than in copper mode 253 */ 254 255 /* advertise FD only @1000 Mb */ 256 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD)); 257 /* enable PAUSE frames */ 258 phy_advreg |= PAR_ASYMPAUSE_FIBER; 259 slic_reg32_write(wphy, phy_advreg, FLUSH); 260 261 if (linkspeed == LINK_AUTOSPEED) { 262 /* reset phy, enable auto-neg */ 263 phy_config = 264 (MIICR_REG_PCR | 265 (PCR_RESET | PCR_AUTONEG | 266 PCR_AUTONEG_RST)); 267 slic_reg32_write(wphy, phy_config, FLUSH); 268 } else { /* forced 1000 Mb FD*/ 269 /* power down phy to break link 270 this may not work) */ 271 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN); 272 slic_reg32_write(wphy, phy_config, FLUSH); 273 /* wait, Marvell says 1 sec, 274 try to get away with 10 ms */ 275 mdelay(10); 276 277 /* disable auto-neg, set speed/duplex, 278 soft reset phy, powerup */ 279 phy_config = 280 (MIICR_REG_PCR | 281 (PCR_RESET | PCR_SPEED_1000 | 282 PCR_DUPLEX_FULL)); 283 slic_reg32_write(wphy, phy_config, FLUSH); 284 } 285 } else { /* copper gigabit */ 286 287 /* Auto-Negotiate or 1000 Mb must be auto negotiated 288 * We've got a copper gigabit interface, and 289 * register 4 is different in copper mode than 290 * in fiber mode 291 */ 292 if (linkspeed == LINK_AUTOSPEED) { 293 /* advertise 10/100 Mb modes */ 294 phy_advreg = 295 (MIICR_REG_4 | 296 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD 297 | PAR_ADV10HD)); 298 } else { 299 /* linkspeed == LINK_1000MB - 300 don't advertise 10/100 Mb modes */ 301 phy_advreg = MIICR_REG_4; 302 } 303 /* enable PAUSE frames */ 304 phy_advreg |= PAR_ASYMPAUSE; 305 /* required by the Cicada PHY */ 306 phy_advreg |= PAR_802_3; 307 slic_reg32_write(wphy, phy_advreg, FLUSH); 308 /* advertise FD only @1000 Mb */ 309 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD)); 310 slic_reg32_write(wphy, phy_gctlreg, FLUSH); 311 312 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 313 /* if a Marvell PHY 314 enable auto crossover */ 315 phy_config = 316 (MIICR_REG_16 | (MRV_REG16_XOVERON)); 317 slic_reg32_write(wphy, phy_config, FLUSH); 318 319 /* reset phy, enable auto-neg */ 320 phy_config = 321 (MIICR_REG_PCR | 322 (PCR_RESET | PCR_AUTONEG | 323 PCR_AUTONEG_RST)); 324 slic_reg32_write(wphy, phy_config, FLUSH); 325 } else { /* it's a Cicada PHY */ 326 /* enable and restart auto-neg (don't reset) */ 327 phy_config = 328 (MIICR_REG_PCR | 329 (PCR_AUTONEG | PCR_AUTONEG_RST)); 330 slic_reg32_write(wphy, phy_config, FLUSH); 331 } 332 } 333 } else { 334 /* Forced 10/100 */ 335 if (linkspeed == LINK_10MB) 336 speed = 0; 337 else 338 speed = PCR_SPEED_100; 339 if (linkduplex == LINK_HALFD) 340 duplex = 0; 341 else 342 duplex = PCR_DUPLEX_FULL; 343 344 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 345 /* if a Marvell PHY 346 disable auto crossover */ 347 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF)); 348 slic_reg32_write(wphy, phy_config, FLUSH); 349 } 350 351 /* power down phy to break link (this may not work) */ 352 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex)); 353 slic_reg32_write(wphy, phy_config, FLUSH); 354 355 /* wait, Marvell says 1 sec, try to get away with 10 ms */ 356 mdelay(10); 357 358 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { 359 /* if a Marvell PHY 360 disable auto-neg, set speed, 361 soft reset phy, powerup */ 362 phy_config = 363 (MIICR_REG_PCR | (PCR_RESET | speed | duplex)); 364 slic_reg32_write(wphy, phy_config, FLUSH); 365 } else { /* it's a Cicada PHY */ 366 /* disable auto-neg, set speed, powerup */ 367 phy_config = (MIICR_REG_PCR | (speed | duplex)); 368 slic_reg32_write(wphy, phy_config, FLUSH); 369 } 370 } 371} 372 373static int slic_card_download_gbrcv(struct adapter *adapter) 374{ 375 const struct firmware *fw; 376 const char *file = ""; 377 int ret; 378 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 379 u32 codeaddr; 380 u32 instruction; 381 int index = 0; 382 u32 rcvucodelen = 0; 383 384 switch (adapter->devid) { 385 case SLIC_2GB_DEVICE_ID: 386 file = "slicoss/oasisrcvucode.sys"; 387 break; 388 case SLIC_1GB_DEVICE_ID: 389 file = "slicoss/gbrcvucode.sys"; 390 break; 391 default: 392 return -ENOENT; 393 } 394 395 ret = request_firmware(&fw, file, &adapter->pcidev->dev); 396 if (ret) { 397 dev_err(&adapter->pcidev->dev, 398 "Failed to load firmware %s\n", file); 399 return ret; 400 } 401 402 rcvucodelen = *(u32 *)(fw->data + index); 403 index += 4; 404 switch (adapter->devid) { 405 case SLIC_2GB_DEVICE_ID: 406 if (rcvucodelen != OasisRcvUCodeLen) { 407 release_firmware(fw); 408 return -EINVAL; 409 } 410 break; 411 case SLIC_1GB_DEVICE_ID: 412 if (rcvucodelen != GBRcvUCodeLen) { 413 release_firmware(fw); 414 return -EINVAL; 415 } 416 break; 417 } 418 /* start download */ 419 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH); 420 /* download the rcv sequencer ucode */ 421 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) { 422 /* write out instruction address */ 423 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH); 424 425 instruction = *(u32 *)(fw->data + index); 426 index += 4; 427 /* write out the instruction data low addr */ 428 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH); 429 430 instruction = *(u8 *)(fw->data + index); 431 index++; 432 /* write out the instruction data high addr */ 433 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction, 434 FLUSH); 435 } 436 437 /* download finished */ 438 release_firmware(fw); 439 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH); 440 return 0; 441} 442 443MODULE_FIRMWARE("slicoss/oasisrcvucode.sys"); 444MODULE_FIRMWARE("slicoss/gbrcvucode.sys"); 445 446static int slic_card_download(struct adapter *adapter) 447{ 448 const struct firmware *fw; 449 const char *file = ""; 450 int ret; 451 u32 section; 452 int thissectionsize; 453 int codeaddr; 454 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 455 u32 instruction; 456 u32 baseaddress; 457 u32 i; 458 u32 numsects = 0; 459 u32 sectsize[3]; 460 u32 sectstart[3]; 461 int ucode_start, index = 0; 462 463 switch (adapter->devid) { 464 case SLIC_2GB_DEVICE_ID: 465 file = "slicoss/oasisdownload.sys"; 466 break; 467 case SLIC_1GB_DEVICE_ID: 468 file = "slicoss/gbdownload.sys"; 469 break; 470 default: 471 return -ENOENT; 472 } 473 ret = request_firmware(&fw, file, &adapter->pcidev->dev); 474 if (ret) { 475 dev_err(&adapter->pcidev->dev, 476 "Failed to load firmware %s\n", file); 477 return ret; 478 } 479 numsects = *(u32 *)(fw->data + index); 480 index += 4; 481 for (i = 0; i < numsects; i++) { 482 sectsize[i] = *(u32 *)(fw->data + index); 483 index += 4; 484 } 485 for (i = 0; i < numsects; i++) { 486 sectstart[i] = *(u32 *)(fw->data + index); 487 index += 4; 488 } 489 ucode_start = index; 490 instruction = *(u32 *)(fw->data + index); 491 index += 4; 492 for (section = 0; section < numsects; section++) { 493 baseaddress = sectstart[section]; 494 thissectionsize = sectsize[section] >> 3; 495 496 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { 497 /* Write out instruction address */ 498 slic_reg32_write(&slic_regs->slic_wcs, 499 baseaddress + codeaddr, FLUSH); 500 /* Write out instruction to low addr */ 501 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH); 502 instruction = *(u32 *)(fw->data + index); 503 index += 4; 504 505 /* Write out instruction to high addr */ 506 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH); 507 instruction = *(u32 *)(fw->data + index); 508 index += 4; 509 } 510 } 511 index = ucode_start; 512 for (section = 0; section < numsects; section++) { 513 instruction = *(u32 *)(fw->data + index); 514 baseaddress = sectstart[section]; 515 if (baseaddress < 0x8000) 516 continue; 517 thissectionsize = sectsize[section] >> 3; 518 519 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { 520 /* Write out instruction address */ 521 slic_reg32_write(&slic_regs->slic_wcs, 522 SLIC_WCS_COMPARE | (baseaddress + codeaddr), 523 FLUSH); 524 /* Write out instruction to low addr */ 525 slic_reg32_write(&slic_regs->slic_wcs, instruction, 526 FLUSH); 527 instruction = *(u32 *)(fw->data + index); 528 index += 4; 529 /* Write out instruction to high addr */ 530 slic_reg32_write(&slic_regs->slic_wcs, instruction, 531 FLUSH); 532 instruction = *(u32 *)(fw->data + index); 533 index += 4; 534 535 /* Check SRAM location zero. If it is non-zero. Abort.*/ 536/* failure = readl((u32 __iomem *)&slic_regs->slic_reset); 537 if (failure) { 538 release_firmware(fw); 539 return -EIO; 540 }*/ 541 } 542 } 543 release_firmware(fw); 544 /* Everything OK, kick off the card */ 545 mdelay(10); 546 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH); 547 548 /* stall for 20 ms, long enough for ucode to init card 549 and reach mainloop */ 550 mdelay(20); 551 552 return 0; 553} 554 555MODULE_FIRMWARE("slicoss/oasisdownload.sys"); 556MODULE_FIRMWARE("slicoss/gbdownload.sys"); 557 558static void slic_adapter_set_hwaddr(struct adapter *adapter) 559{ 560 struct sliccard *card = adapter->card; 561 562 if ((adapter->card) && (card->config_set)) { 563 memcpy(adapter->macaddr, 564 card->config.MacInfo[adapter->functionnumber].macaddrA, 565 sizeof(struct slic_config_mac)); 566 if (is_zero_ether_addr(adapter->currmacaddr)) 567 memcpy(adapter->currmacaddr, adapter->macaddr, 568 ETH_ALEN); 569 if (adapter->netdev) 570 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, 571 ETH_ALEN); 572 } 573} 574 575static void slic_intagg_set(struct adapter *adapter, u32 value) 576{ 577 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH); 578 adapter->card->loadlevel_current = value; 579} 580 581static void slic_soft_reset(struct adapter *adapter) 582{ 583 if (adapter->card->state == CARD_UP) { 584 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH); 585 mdelay(1); 586 } 587 588 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, 589 FLUSH); 590 mdelay(1); 591} 592 593static void slic_mac_address_config(struct adapter *adapter) 594{ 595 u32 value; 596 u32 value2; 597 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 598 599 value = *(u32 *) &adapter->currmacaddr[2]; 600 value = ntohl(value); 601 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH); 602 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH); 603 604 value2 = (u32) ((adapter->currmacaddr[0] << 8 | 605 adapter->currmacaddr[1]) & 0xFFFF); 606 607 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH); 608 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH); 609 610 /* Write our multicast mask out to the card. This is done */ 611 /* here in addition to the slic_mcast_addr_set routine */ 612 /* because ALL_MCAST may have been enabled or disabled */ 613 slic_mcast_set_mask(adapter); 614} 615 616static void slic_mac_config(struct adapter *adapter) 617{ 618 u32 value; 619 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 620 621 /* Setup GMAC gaps */ 622 if (adapter->linkspeed == LINK_1000MB) { 623 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) | 624 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) | 625 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT)); 626 } else { 627 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) | 628 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) | 629 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT)); 630 } 631 632 /* enable GMII */ 633 if (adapter->linkspeed == LINK_1000MB) 634 value |= GMCR_GBIT; 635 636 /* enable fullduplex */ 637 if ((adapter->linkduplex == LINK_FULLD) 638 || (adapter->macopts & MAC_LOOPBACK)) { 639 value |= GMCR_FULLD; 640 } 641 642 /* write mac config */ 643 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH); 644 645 /* setup mac addresses */ 646 slic_mac_address_config(adapter); 647} 648 649static void slic_config_set(struct adapter *adapter, bool linkchange) 650{ 651 u32 value; 652 u32 RcrReset; 653 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 654 655 if (linkchange) { 656 /* Setup MAC */ 657 slic_mac_config(adapter); 658 RcrReset = GRCR_RESET; 659 } else { 660 slic_mac_address_config(adapter); 661 RcrReset = 0; 662 } 663 664 if (adapter->linkduplex == LINK_FULLD) { 665 /* setup xmtcfg */ 666 value = (GXCR_RESET | /* Always reset */ 667 GXCR_XMTEN | /* Enable transmit */ 668 GXCR_PAUSEEN); /* Enable pause */ 669 670 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 671 672 /* Setup rcvcfg last */ 673 value = (RcrReset | /* Reset, if linkchange */ 674 GRCR_CTLEN | /* Enable CTL frames */ 675 GRCR_ADDRAEN | /* Address A enable */ 676 GRCR_RCVBAD | /* Rcv bad frames */ 677 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 678 } else { 679 /* setup xmtcfg */ 680 value = (GXCR_RESET | /* Always reset */ 681 GXCR_XMTEN); /* Enable transmit */ 682 683 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 684 685 /* Setup rcvcfg last */ 686 value = (RcrReset | /* Reset, if linkchange */ 687 GRCR_ADDRAEN | /* Address A enable */ 688 GRCR_RCVBAD | /* Rcv bad frames */ 689 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 690 } 691 692 if (adapter->state != ADAPT_DOWN) { 693 /* Only enable receive if we are restarting or running */ 694 value |= GRCR_RCVEN; 695 } 696 697 if (adapter->macopts & MAC_PROMISC) 698 value |= GRCR_RCVALL; 699 700 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); 701} 702 703/* 704 * Turn off RCV and XMT, power down PHY 705 */ 706static void slic_config_clear(struct adapter *adapter) 707{ 708 u32 value; 709 u32 phy_config; 710 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 711 712 /* Setup xmtcfg */ 713 value = (GXCR_RESET | /* Always reset */ 714 GXCR_PAUSEEN); /* Enable pause */ 715 716 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH); 717 718 value = (GRCR_RESET | /* Always reset */ 719 GRCR_CTLEN | /* Enable CTL frames */ 720 GRCR_ADDRAEN | /* Address A enable */ 721 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); 722 723 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH); 724 725 /* power down phy */ 726 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN)); 727 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH); 728} 729 730static bool slic_mac_filter(struct adapter *adapter, 731 struct ether_header *ether_frame) 732{ 733 struct net_device *netdev = adapter->netdev; 734 u32 opts = adapter->macopts; 735 736 if (opts & MAC_PROMISC) 737 return true; 738 739 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) { 740 if (opts & MAC_BCAST) { 741 adapter->rcv_broadcasts++; 742 return true; 743 } else { 744 return false; 745 } 746 } 747 748 if (is_multicast_ether_addr(ether_frame->ether_dhost)) { 749 if (opts & MAC_ALLMCAST) { 750 adapter->rcv_multicasts++; 751 netdev->stats.multicast++; 752 return true; 753 } 754 if (opts & MAC_MCAST) { 755 struct mcast_address *mcaddr = adapter->mcastaddrs; 756 757 while (mcaddr) { 758 if (ether_addr_equal(mcaddr->address, 759 ether_frame->ether_dhost)) { 760 adapter->rcv_multicasts++; 761 netdev->stats.multicast++; 762 return true; 763 } 764 mcaddr = mcaddr->next; 765 } 766 return false; 767 } else { 768 return false; 769 } 770 } 771 if (opts & MAC_DIRECTED) { 772 adapter->rcv_unicasts++; 773 return true; 774 } 775 return false; 776 777} 778 779static int slic_mac_set_address(struct net_device *dev, void *ptr) 780{ 781 struct adapter *adapter = netdev_priv(dev); 782 struct sockaddr *addr = ptr; 783 784 if (netif_running(dev)) 785 return -EBUSY; 786 if (!adapter) 787 return -EBUSY; 788 789 if (!is_valid_ether_addr(addr->sa_data)) 790 return -EINVAL; 791 792 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 793 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); 794 795 slic_config_set(adapter, true); 796 return 0; 797} 798 799static void slic_timer_load_check(ulong cardaddr) 800{ 801 struct sliccard *card = (struct sliccard *)cardaddr; 802 struct adapter *adapter = card->master; 803 u32 __iomem *intagg; 804 u32 load = card->events; 805 u32 level = 0; 806 807 if ((adapter) && (adapter->state == ADAPT_UP) && 808 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) { 809 intagg = &adapter->slic_regs->slic_intagg; 810 if (adapter->devid == SLIC_1GB_DEVICE_ID) { 811 if (adapter->linkspeed == LINK_1000MB) 812 level = 100; 813 else { 814 if (load > SLIC_LOAD_5) 815 level = SLIC_INTAGG_5; 816 else if (load > SLIC_LOAD_4) 817 level = SLIC_INTAGG_4; 818 else if (load > SLIC_LOAD_3) 819 level = SLIC_INTAGG_3; 820 else if (load > SLIC_LOAD_2) 821 level = SLIC_INTAGG_2; 822 else if (load > SLIC_LOAD_1) 823 level = SLIC_INTAGG_1; 824 else 825 level = SLIC_INTAGG_0; 826 } 827 if (card->loadlevel_current != level) { 828 card->loadlevel_current = level; 829 slic_reg32_write(intagg, level, FLUSH); 830 } 831 } else { 832 if (load > SLIC_LOAD_5) 833 level = SLIC_INTAGG_5; 834 else if (load > SLIC_LOAD_4) 835 level = SLIC_INTAGG_4; 836 else if (load > SLIC_LOAD_3) 837 level = SLIC_INTAGG_3; 838 else if (load > SLIC_LOAD_2) 839 level = SLIC_INTAGG_2; 840 else if (load > SLIC_LOAD_1) 841 level = SLIC_INTAGG_1; 842 else 843 level = SLIC_INTAGG_0; 844 if (card->loadlevel_current != level) { 845 card->loadlevel_current = level; 846 slic_reg32_write(intagg, level, FLUSH); 847 } 848 } 849 } 850 card->events = 0; 851 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ); 852 add_timer(&card->loadtimer); 853} 854 855static int slic_upr_queue_request(struct adapter *adapter, 856 u32 upr_request, 857 u32 upr_data, 858 u32 upr_data_h, 859 u32 upr_buffer, u32 upr_buffer_h) 860{ 861 struct slic_upr *upr; 862 struct slic_upr *uprqueue; 863 864 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC); 865 if (!upr) 866 return -ENOMEM; 867 868 upr->adapter = adapter->port; 869 upr->upr_request = upr_request; 870 upr->upr_data = upr_data; 871 upr->upr_buffer = upr_buffer; 872 upr->upr_data_h = upr_data_h; 873 upr->upr_buffer_h = upr_buffer_h; 874 upr->next = NULL; 875 if (adapter->upr_list) { 876 uprqueue = adapter->upr_list; 877 878 while (uprqueue->next) 879 uprqueue = uprqueue->next; 880 uprqueue->next = upr; 881 } else { 882 adapter->upr_list = upr; 883 } 884 return 0; 885} 886 887static void slic_upr_start(struct adapter *adapter) 888{ 889 struct slic_upr *upr; 890 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 891/* 892 char * ptr1; 893 char * ptr2; 894 uint cmdoffset; 895*/ 896 upr = adapter->upr_list; 897 if (!upr) 898 return; 899 if (adapter->upr_busy) 900 return; 901 adapter->upr_busy = 1; 902 903 switch (upr->upr_request) { 904 case SLIC_UPR_STATS: 905 if (upr->upr_data_h == 0) { 906 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data, 907 FLUSH); 908 } else { 909 slic_reg64_write(adapter, &slic_regs->slic_stats64, 910 upr->upr_data, 911 &slic_regs->slic_addr_upper, 912 upr->upr_data_h, FLUSH); 913 } 914 break; 915 916 case SLIC_UPR_RLSR: 917 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data, 918 &slic_regs->slic_addr_upper, upr->upr_data_h, 919 FLUSH); 920 break; 921 922 case SLIC_UPR_RCONFIG: 923 slic_reg64_write(adapter, &slic_regs->slic_rconfig, 924 upr->upr_data, &slic_regs->slic_addr_upper, 925 upr->upr_data_h, FLUSH); 926 break; 927 case SLIC_UPR_PING: 928 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH); 929 break; 930 } 931} 932 933static int slic_upr_request(struct adapter *adapter, 934 u32 upr_request, 935 u32 upr_data, 936 u32 upr_data_h, 937 u32 upr_buffer, u32 upr_buffer_h) 938{ 939 int rc; 940 941 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); 942 rc = slic_upr_queue_request(adapter, 943 upr_request, 944 upr_data, 945 upr_data_h, upr_buffer, upr_buffer_h); 946 if (rc) 947 goto err_unlock_irq; 948 949 slic_upr_start(adapter); 950err_unlock_irq: 951 spin_unlock_irqrestore(&adapter->upr_lock.lock, 952 adapter->upr_lock.flags); 953 return rc; 954} 955 956static void slic_link_upr_complete(struct adapter *adapter, u32 isr) 957{ 958 u32 linkstatus = adapter->pshmem->linkstatus; 959 uint linkup; 960 unsigned char linkspeed; 961 unsigned char linkduplex; 962 963 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { 964 struct slic_shmem *pshmem; 965 966 pshmem = (struct slic_shmem *)(unsigned long) 967 adapter->phys_shmem; 968#if BITS_PER_LONG == 64 969 slic_upr_queue_request(adapter, 970 SLIC_UPR_RLSR, 971 SLIC_GET_ADDR_LOW(&pshmem->linkstatus), 972 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus), 973 0, 0); 974#else 975 slic_upr_queue_request(adapter, 976 SLIC_UPR_RLSR, 977 (u32) &pshmem->linkstatus, 978 SLIC_GET_ADDR_HIGH(pshmem), 0, 0); 979#endif 980 return; 981 } 982 if (adapter->state != ADAPT_UP) 983 return; 984 985 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN; 986 if (linkstatus & GIG_SPEED_1000) 987 linkspeed = LINK_1000MB; 988 else if (linkstatus & GIG_SPEED_100) 989 linkspeed = LINK_100MB; 990 else 991 linkspeed = LINK_10MB; 992 993 if (linkstatus & GIG_FULLDUPLEX) 994 linkduplex = LINK_FULLD; 995 else 996 linkduplex = LINK_HALFD; 997 998 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) 999 return; 1000 1001 /* link up event, but nothing has changed */ 1002 if ((adapter->linkstate == LINK_UP) && 1003 (linkup == LINK_UP) && 1004 (adapter->linkspeed == linkspeed) && 1005 (adapter->linkduplex == linkduplex)) 1006 return; 1007 1008 /* link has changed at this point */ 1009 1010 /* link has gone from up to down */ 1011 if (linkup == LINK_DOWN) { 1012 adapter->linkstate = LINK_DOWN; 1013 return; 1014 } 1015 1016 /* link has gone from down to up */ 1017 adapter->linkspeed = linkspeed; 1018 adapter->linkduplex = linkduplex; 1019 1020 if (adapter->linkstate != LINK_UP) { 1021 /* setup the mac */ 1022 slic_config_set(adapter, true); 1023 adapter->linkstate = LINK_UP; 1024 netif_start_queue(adapter->netdev); 1025 } 1026} 1027 1028static void slic_upr_request_complete(struct adapter *adapter, u32 isr) 1029{ 1030 struct sliccard *card = adapter->card; 1031 struct slic_upr *upr; 1032 1033 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags); 1034 upr = adapter->upr_list; 1035 if (!upr) { 1036 spin_unlock_irqrestore(&adapter->upr_lock.lock, 1037 adapter->upr_lock.flags); 1038 return; 1039 } 1040 adapter->upr_list = upr->next; 1041 upr->next = NULL; 1042 adapter->upr_busy = 0; 1043 switch (upr->upr_request) { 1044 case SLIC_UPR_STATS: 1045 { 1046 struct slic_stats *slicstats = 1047 (struct slic_stats *) &adapter->pshmem->inicstats; 1048 struct slic_stats *newstats = slicstats; 1049 struct slic_stats *old = &adapter->inicstats_prev; 1050 struct slicnet_stats *stst = &adapter->slic_stats; 1051 1052 if (isr & ISR_UPCERR) { 1053 dev_err(&adapter->netdev->dev, 1054 "SLIC_UPR_STATS command failed isr[%x]\n", 1055 isr); 1056 1057 break; 1058 } 1059 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs, 1060 newstats->xmit_tcp_segs_gb, 1061 old->xmit_tcp_segs_gb); 1062 1063 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes, 1064 newstats->xmit_tcp_bytes_gb, 1065 old->xmit_tcp_bytes_gb); 1066 1067 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs, 1068 newstats->rcv_tcp_segs_gb, 1069 old->rcv_tcp_segs_gb); 1070 1071 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes, 1072 newstats->rcv_tcp_bytes_gb, 1073 old->rcv_tcp_bytes_gb); 1074 1075 UPDATE_STATS_GB(stst->iface.xmt_bytes, 1076 newstats->xmit_bytes_gb, 1077 old->xmit_bytes_gb); 1078 1079 UPDATE_STATS_GB(stst->iface.xmt_ucast, 1080 newstats->xmit_unicasts_gb, 1081 old->xmit_unicasts_gb); 1082 1083 UPDATE_STATS_GB(stst->iface.rcv_bytes, 1084 newstats->rcv_bytes_gb, 1085 old->rcv_bytes_gb); 1086 1087 UPDATE_STATS_GB(stst->iface.rcv_ucast, 1088 newstats->rcv_unicasts_gb, 1089 old->rcv_unicasts_gb); 1090 1091 UPDATE_STATS_GB(stst->iface.xmt_errors, 1092 newstats->xmit_collisions_gb, 1093 old->xmit_collisions_gb); 1094 1095 UPDATE_STATS_GB(stst->iface.xmt_errors, 1096 newstats->xmit_excess_collisions_gb, 1097 old->xmit_excess_collisions_gb); 1098 1099 UPDATE_STATS_GB(stst->iface.xmt_errors, 1100 newstats->xmit_other_error_gb, 1101 old->xmit_other_error_gb); 1102 1103 UPDATE_STATS_GB(stst->iface.rcv_errors, 1104 newstats->rcv_other_error_gb, 1105 old->rcv_other_error_gb); 1106 1107 UPDATE_STATS_GB(stst->iface.rcv_discards, 1108 newstats->rcv_drops_gb, 1109 old->rcv_drops_gb); 1110 1111 if (newstats->rcv_drops_gb > old->rcv_drops_gb) { 1112 adapter->rcv_drops += 1113 (newstats->rcv_drops_gb - 1114 old->rcv_drops_gb); 1115 } 1116 memcpy(old, newstats, sizeof(struct slic_stats)); 1117 break; 1118 } 1119 case SLIC_UPR_RLSR: 1120 slic_link_upr_complete(adapter, isr); 1121 break; 1122 case SLIC_UPR_RCONFIG: 1123 break; 1124 case SLIC_UPR_PING: 1125 card->pingstatus |= (isr & ISR_PINGDSMASK); 1126 break; 1127 } 1128 kfree(upr); 1129 slic_upr_start(adapter); 1130 spin_unlock_irqrestore(&adapter->upr_lock.lock, 1131 adapter->upr_lock.flags); 1132} 1133 1134static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h) 1135{ 1136 return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h, 1137 0, 0); 1138} 1139 1140/* 1141 * Compute a checksum of the EEPROM according to RFC 1071. 1142 */ 1143static u16 slic_eeprom_cksum(void *eeprom, unsigned len) 1144{ 1145 u16 *wp = eeprom; 1146 u32 checksum = 0; 1147 1148 while (len > 1) { 1149 checksum += *(wp++); 1150 len -= 2; 1151 } 1152 1153 if (len > 0) 1154 checksum += *(u8 *) wp; 1155 1156 1157 while (checksum >> 16) 1158 checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF); 1159 1160 return ~checksum; 1161} 1162 1163static void slic_rspqueue_free(struct adapter *adapter) 1164{ 1165 int i; 1166 struct slic_rspqueue *rspq = &adapter->rspqueue; 1167 1168 for (i = 0; i < rspq->num_pages; i++) { 1169 if (rspq->vaddr[i]) { 1170 pci_free_consistent(adapter->pcidev, PAGE_SIZE, 1171 rspq->vaddr[i], rspq->paddr[i]); 1172 } 1173 rspq->vaddr[i] = NULL; 1174 rspq->paddr[i] = 0; 1175 } 1176 rspq->offset = 0; 1177 rspq->pageindex = 0; 1178 rspq->rspbuf = NULL; 1179} 1180 1181static int slic_rspqueue_init(struct adapter *adapter) 1182{ 1183 int i; 1184 struct slic_rspqueue *rspq = &adapter->rspqueue; 1185 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 1186 u32 paddrh = 0; 1187 1188 memset(rspq, 0, sizeof(struct slic_rspqueue)); 1189 1190 rspq->num_pages = SLIC_RSPQ_PAGES_GB; 1191 1192 for (i = 0; i < rspq->num_pages; i++) { 1193 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev, 1194 PAGE_SIZE, 1195 &rspq->paddr[i]); 1196 if (!rspq->vaddr[i]) { 1197 dev_err(&adapter->pcidev->dev, 1198 "pci_alloc_consistent failed\n"); 1199 slic_rspqueue_free(adapter); 1200 return -ENOMEM; 1201 } 1202 /* FIXME: 1203 * do we really need this assertions (4K PAGE_SIZE aligned addr)? */ 1204 memset(rspq->vaddr[i], 0, PAGE_SIZE); 1205 1206 if (paddrh == 0) { 1207 slic_reg32_write(&slic_regs->slic_rbar, 1208 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE), 1209 DONT_FLUSH); 1210 } else { 1211 slic_reg64_write(adapter, &slic_regs->slic_rbar64, 1212 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE), 1213 &slic_regs->slic_addr_upper, 1214 paddrh, DONT_FLUSH); 1215 } 1216 } 1217 rspq->offset = 0; 1218 rspq->pageindex = 0; 1219 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0]; 1220 return 0; 1221} 1222 1223static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter) 1224{ 1225 struct slic_rspqueue *rspq = &adapter->rspqueue; 1226 struct slic_rspbuf *buf; 1227 1228 if (!(rspq->rspbuf->status)) 1229 return NULL; 1230 1231 buf = rspq->rspbuf; 1232 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) { 1233 rspq->rspbuf++; 1234 } else { 1235 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64, 1236 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE), 1237 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH); 1238 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages; 1239 rspq->offset = 0; 1240 rspq->rspbuf = (struct slic_rspbuf *) 1241 rspq->vaddr[rspq->pageindex]; 1242 } 1243 1244 return buf; 1245} 1246 1247static void slic_cmdqmem_free(struct adapter *adapter) 1248{ 1249 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; 1250 int i; 1251 1252 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) { 1253 if (cmdqmem->pages[i]) { 1254 pci_free_consistent(adapter->pcidev, 1255 PAGE_SIZE, 1256 (void *) cmdqmem->pages[i], 1257 cmdqmem->dma_pages[i]); 1258 } 1259 } 1260 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem)); 1261} 1262 1263static u32 *slic_cmdqmem_addpage(struct adapter *adapter) 1264{ 1265 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; 1266 u32 *pageaddr; 1267 1268 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES) 1269 return NULL; 1270 pageaddr = pci_alloc_consistent(adapter->pcidev, 1271 PAGE_SIZE, 1272 &cmdqmem->dma_pages[cmdqmem->pagecnt]); 1273 if (!pageaddr) 1274 return NULL; 1275 1276 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr; 1277 cmdqmem->pagecnt++; 1278 return pageaddr; 1279} 1280 1281static void slic_cmdq_free(struct adapter *adapter) 1282{ 1283 struct slic_hostcmd *cmd; 1284 1285 cmd = adapter->cmdq_all.head; 1286 while (cmd) { 1287 if (cmd->busy) { 1288 struct sk_buff *tempskb; 1289 1290 tempskb = cmd->skb; 1291 if (tempskb) { 1292 cmd->skb = NULL; 1293 dev_kfree_skb_irq(tempskb); 1294 } 1295 } 1296 cmd = cmd->next_all; 1297 } 1298 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); 1299 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); 1300 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); 1301 slic_cmdqmem_free(adapter); 1302} 1303 1304static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page) 1305{ 1306 struct slic_hostcmd *cmd; 1307 struct slic_hostcmd *prev; 1308 struct slic_hostcmd *tail; 1309 struct slic_cmdqueue *cmdq; 1310 int cmdcnt; 1311 void *cmdaddr; 1312 ulong phys_addr; 1313 u32 phys_addrl; 1314 u32 phys_addrh; 1315 struct slic_handle *pslic_handle; 1316 1317 cmdaddr = page; 1318 cmd = (struct slic_hostcmd *)cmdaddr; 1319 cmdcnt = 0; 1320 1321 phys_addr = virt_to_bus((void *)page); 1322 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr); 1323 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr); 1324 1325 prev = NULL; 1326 tail = cmd; 1327 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) && 1328 (adapter->slic_handle_ix < 256)) { 1329 /* Allocate and initialize a SLIC_HANDLE for this command */ 1330 spin_lock_irqsave(&adapter->handle_lock.lock, 1331 adapter->handle_lock.flags); 1332 pslic_handle = adapter->pfree_slic_handles; 1333 adapter->pfree_slic_handles = pslic_handle->next; 1334 spin_unlock_irqrestore(&adapter->handle_lock.lock, 1335 adapter->handle_lock.flags); 1336 pslic_handle->type = SLIC_HANDLE_CMD; 1337 pslic_handle->address = (void *) cmd; 1338 pslic_handle->offset = (ushort) adapter->slic_handle_ix++; 1339 pslic_handle->other_handle = NULL; 1340 pslic_handle->next = NULL; 1341 1342 cmd->pslic_handle = pslic_handle; 1343 cmd->cmd64.hosthandle = pslic_handle->token.handle_token; 1344 cmd->busy = false; 1345 cmd->paddrl = phys_addrl; 1346 cmd->paddrh = phys_addrh; 1347 cmd->next_all = prev; 1348 cmd->next = prev; 1349 prev = cmd; 1350 phys_addrl += SLIC_HOSTCMD_SIZE; 1351 cmdaddr += SLIC_HOSTCMD_SIZE; 1352 1353 cmd = (struct slic_hostcmd *)cmdaddr; 1354 cmdcnt++; 1355 } 1356 1357 cmdq = &adapter->cmdq_all; 1358 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ 1359 tail->next_all = cmdq->head; 1360 cmdq->head = prev; 1361 cmdq = &adapter->cmdq_free; 1362 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags); 1363 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ 1364 tail->next = cmdq->head; 1365 cmdq->head = prev; 1366 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags); 1367} 1368 1369static int slic_cmdq_init(struct adapter *adapter) 1370{ 1371 int i; 1372 u32 *pageaddr; 1373 1374 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); 1375 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); 1376 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); 1377 spin_lock_init(&adapter->cmdq_all.lock.lock); 1378 spin_lock_init(&adapter->cmdq_free.lock.lock); 1379 spin_lock_init(&adapter->cmdq_done.lock.lock); 1380 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem)); 1381 adapter->slic_handle_ix = 1; 1382 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) { 1383 pageaddr = slic_cmdqmem_addpage(adapter); 1384 if (!pageaddr) { 1385 slic_cmdq_free(adapter); 1386 return -ENOMEM; 1387 } 1388 slic_cmdq_addcmdpage(adapter, pageaddr); 1389 } 1390 adapter->slic_handle_ix = 1; 1391 1392 return 0; 1393} 1394 1395static void slic_cmdq_reset(struct adapter *adapter) 1396{ 1397 struct slic_hostcmd *hcmd; 1398 struct sk_buff *skb; 1399 u32 outstanding; 1400 1401 spin_lock_irqsave(&adapter->cmdq_free.lock.lock, 1402 adapter->cmdq_free.lock.flags); 1403 spin_lock_irqsave(&adapter->cmdq_done.lock.lock, 1404 adapter->cmdq_done.lock.flags); 1405 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count; 1406 outstanding -= adapter->cmdq_free.count; 1407 hcmd = adapter->cmdq_all.head; 1408 while (hcmd) { 1409 if (hcmd->busy) { 1410 skb = hcmd->skb; 1411 hcmd->busy = 0; 1412 hcmd->skb = NULL; 1413 dev_kfree_skb_irq(skb); 1414 } 1415 hcmd = hcmd->next_all; 1416 } 1417 adapter->cmdq_free.count = 0; 1418 adapter->cmdq_free.head = NULL; 1419 adapter->cmdq_free.tail = NULL; 1420 adapter->cmdq_done.count = 0; 1421 adapter->cmdq_done.head = NULL; 1422 adapter->cmdq_done.tail = NULL; 1423 adapter->cmdq_free.head = adapter->cmdq_all.head; 1424 hcmd = adapter->cmdq_all.head; 1425 while (hcmd) { 1426 adapter->cmdq_free.count++; 1427 hcmd->next = hcmd->next_all; 1428 hcmd = hcmd->next_all; 1429 } 1430 if (adapter->cmdq_free.count != adapter->cmdq_all.count) { 1431 dev_err(&adapter->netdev->dev, 1432 "free_count %d != all count %d\n", 1433 adapter->cmdq_free.count, adapter->cmdq_all.count); 1434 } 1435 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock, 1436 adapter->cmdq_done.lock.flags); 1437 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock, 1438 adapter->cmdq_free.lock.flags); 1439} 1440 1441static void slic_cmdq_getdone(struct adapter *adapter) 1442{ 1443 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done; 1444 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free; 1445 1446 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags); 1447 1448 free_cmdq->head = done_cmdq->head; 1449 free_cmdq->count = done_cmdq->count; 1450 done_cmdq->head = NULL; 1451 done_cmdq->tail = NULL; 1452 done_cmdq->count = 0; 1453 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags); 1454} 1455 1456static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter) 1457{ 1458 struct slic_cmdqueue *cmdq = &adapter->cmdq_free; 1459 struct slic_hostcmd *cmd = NULL; 1460 1461lock_and_retry: 1462 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags); 1463retry: 1464 cmd = cmdq->head; 1465 if (cmd) { 1466 cmdq->head = cmd->next; 1467 cmdq->count--; 1468 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags); 1469 } else { 1470 slic_cmdq_getdone(adapter); 1471 cmd = cmdq->head; 1472 if (cmd) { 1473 goto retry; 1474 } else { 1475 u32 *pageaddr; 1476 1477 spin_unlock_irqrestore(&cmdq->lock.lock, 1478 cmdq->lock.flags); 1479 pageaddr = slic_cmdqmem_addpage(adapter); 1480 if (pageaddr) { 1481 slic_cmdq_addcmdpage(adapter, pageaddr); 1482 goto lock_and_retry; 1483 } 1484 } 1485 } 1486 return cmd; 1487} 1488 1489static void slic_cmdq_putdone_irq(struct adapter *adapter, 1490 struct slic_hostcmd *cmd) 1491{ 1492 struct slic_cmdqueue *cmdq = &adapter->cmdq_done; 1493 1494 spin_lock(&cmdq->lock.lock); 1495 cmd->busy = 0; 1496 cmd->next = cmdq->head; 1497 cmdq->head = cmd; 1498 cmdq->count++; 1499 if ((adapter->xmitq_full) && (cmdq->count > 10)) 1500 netif_wake_queue(adapter->netdev); 1501 spin_unlock(&cmdq->lock.lock); 1502} 1503 1504static int slic_rcvqueue_fill(struct adapter *adapter) 1505{ 1506 void *paddr; 1507 u32 paddrl; 1508 u32 paddrh; 1509 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1510 int i = 0; 1511 struct device *dev = &adapter->netdev->dev; 1512 1513 while (i < SLIC_RCVQ_FILLENTRIES) { 1514 struct slic_rcvbuf *rcvbuf; 1515 struct sk_buff *skb; 1516#ifdef KLUDGE_FOR_4GB_BOUNDARY 1517retry_rcvqfill: 1518#endif 1519 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC); 1520 if (skb) { 1521 paddr = (void *)(unsigned long) 1522 pci_map_single(adapter->pcidev, 1523 skb->data, 1524 SLIC_RCVQ_RCVBUFSIZE, 1525 PCI_DMA_FROMDEVICE); 1526 paddrl = SLIC_GET_ADDR_LOW(paddr); 1527 paddrh = SLIC_GET_ADDR_HIGH(paddr); 1528 1529 skb->len = SLIC_RCVBUF_HEADSIZE; 1530 rcvbuf = (struct slic_rcvbuf *)skb->head; 1531 rcvbuf->status = 0; 1532 skb->next = NULL; 1533#ifdef KLUDGE_FOR_4GB_BOUNDARY 1534 if (paddrl == 0) { 1535 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1536 __func__); 1537 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1538 dev_err(dev, " skbdata[%p]\n", skb->data); 1539 dev_err(dev, " skblen[%x]\n", skb->len); 1540 dev_err(dev, " paddr[%p]\n", paddr); 1541 dev_err(dev, " paddrl[%x]\n", paddrl); 1542 dev_err(dev, " paddrh[%x]\n", paddrh); 1543 dev_err(dev, " rcvq->head[%p]\n", rcvq->head); 1544 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); 1545 dev_err(dev, " rcvq->count[%x]\n", rcvq->count); 1546 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n"); 1547 goto retry_rcvqfill; 1548 } 1549#else 1550 if (paddrl == 0) { 1551 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1552 __func__); 1553 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1554 dev_err(dev, " skbdata[%p]\n", skb->data); 1555 dev_err(dev, " skblen[%x]\n", skb->len); 1556 dev_err(dev, " paddr[%p]\n", paddr); 1557 dev_err(dev, " paddrl[%x]\n", paddrl); 1558 dev_err(dev, " paddrh[%x]\n", paddrh); 1559 dev_err(dev, " rcvq->head[%p]\n", rcvq->head); 1560 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); 1561 dev_err(dev, " rcvq->count[%x]\n", rcvq->count); 1562 dev_err(dev, "GIVE TO CARD ANYWAY\n"); 1563 } 1564#endif 1565 if (paddrh == 0) { 1566 slic_reg32_write(&adapter->slic_regs->slic_hbar, 1567 (u32)paddrl, DONT_FLUSH); 1568 } else { 1569 slic_reg64_write(adapter, 1570 &adapter->slic_regs->slic_hbar64, 1571 paddrl, 1572 &adapter->slic_regs->slic_addr_upper, 1573 paddrh, DONT_FLUSH); 1574 } 1575 if (rcvq->head) 1576 rcvq->tail->next = skb; 1577 else 1578 rcvq->head = skb; 1579 rcvq->tail = skb; 1580 rcvq->count++; 1581 i++; 1582 } else { 1583 dev_err(&adapter->netdev->dev, 1584 "slic_rcvqueue_fill could only get [%d] skbuffs\n", 1585 i); 1586 break; 1587 } 1588 } 1589 return i; 1590} 1591 1592static void slic_rcvqueue_free(struct adapter *adapter) 1593{ 1594 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1595 struct sk_buff *skb; 1596 1597 while (rcvq->head) { 1598 skb = rcvq->head; 1599 rcvq->head = rcvq->head->next; 1600 dev_kfree_skb(skb); 1601 } 1602 rcvq->tail = NULL; 1603 rcvq->head = NULL; 1604 rcvq->count = 0; 1605} 1606 1607static int slic_rcvqueue_init(struct adapter *adapter) 1608{ 1609 int i, count; 1610 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1611 1612 rcvq->tail = NULL; 1613 rcvq->head = NULL; 1614 rcvq->size = SLIC_RCVQ_ENTRIES; 1615 rcvq->errors = 0; 1616 rcvq->count = 0; 1617 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES); 1618 count = 0; 1619 while (i) { 1620 count += slic_rcvqueue_fill(adapter); 1621 i--; 1622 } 1623 if (rcvq->count < SLIC_RCVQ_MINENTRIES) { 1624 slic_rcvqueue_free(adapter); 1625 return -ENOMEM; 1626 } 1627 return 0; 1628} 1629 1630static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter) 1631{ 1632 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1633 struct sk_buff *skb; 1634 struct slic_rcvbuf *rcvbuf; 1635 int count; 1636 1637 if (rcvq->count) { 1638 skb = rcvq->head; 1639 rcvbuf = (struct slic_rcvbuf *)skb->head; 1640 1641 if (rcvbuf->status & IRHDDR_SVALID) { 1642 rcvq->head = rcvq->head->next; 1643 skb->next = NULL; 1644 rcvq->count--; 1645 } else { 1646 skb = NULL; 1647 } 1648 } else { 1649 dev_err(&adapter->netdev->dev, 1650 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count); 1651 skb = NULL; 1652 } 1653 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) { 1654 count = slic_rcvqueue_fill(adapter); 1655 if (!count) 1656 break; 1657 } 1658 if (skb) 1659 rcvq->errors = 0; 1660 return skb; 1661} 1662 1663static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb) 1664{ 1665 struct slic_rcvqueue *rcvq = &adapter->rcvqueue; 1666 void *paddr; 1667 u32 paddrl; 1668 u32 paddrh; 1669 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head; 1670 struct device *dev; 1671 1672 paddr = (void *)(unsigned long) 1673 pci_map_single(adapter->pcidev, skb->head, 1674 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE); 1675 rcvbuf->status = 0; 1676 skb->next = NULL; 1677 1678 paddrl = SLIC_GET_ADDR_LOW(paddr); 1679 paddrh = SLIC_GET_ADDR_HIGH(paddr); 1680 1681 if (paddrl == 0) { 1682 dev = &adapter->netdev->dev; 1683 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", 1684 __func__); 1685 dev_err(dev, "skb[%p] PROBLEM\n", skb); 1686 dev_err(dev, " skbdata[%p]\n", skb->data); 1687 dev_err(dev, " skblen[%x]\n", skb->len); 1688 dev_err(dev, " paddr[%p]\n", paddr); 1689 dev_err(dev, " paddrl[%x]\n", paddrl); 1690 dev_err(dev, " paddrh[%x]\n", paddrh); 1691 dev_err(dev, " rcvq->head[%p]\n", rcvq->head); 1692 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); 1693 dev_err(dev, " rcvq->count[%x]\n", rcvq->count); 1694 } 1695 if (paddrh == 0) { 1696 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl, 1697 DONT_FLUSH); 1698 } else { 1699 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64, 1700 paddrl, &adapter->slic_regs->slic_addr_upper, 1701 paddrh, DONT_FLUSH); 1702 } 1703 if (rcvq->head) 1704 rcvq->tail->next = skb; 1705 else 1706 rcvq->head = skb; 1707 rcvq->tail = skb; 1708 rcvq->count++; 1709 return rcvq->count; 1710} 1711 1712/* 1713 * slic_link_event_handler - 1714 * 1715 * Initiate a link configuration sequence. The link configuration begins 1716 * by issuing a READ_LINK_STATUS command to the Utility Processor on the 1717 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete 1718 * routine will follow it up witha UP configuration write command, which 1719 * will also complete asynchronously. 1720 * 1721 */ 1722static void slic_link_event_handler(struct adapter *adapter) 1723{ 1724 int status; 1725 struct slic_shmem *pshmem; 1726 1727 if (adapter->state != ADAPT_UP) { 1728 /* Adapter is not operational. Ignore. */ 1729 return; 1730 } 1731 1732 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem; 1733 1734#if BITS_PER_LONG == 64 1735 status = slic_upr_request(adapter, 1736 SLIC_UPR_RLSR, 1737 SLIC_GET_ADDR_LOW(&pshmem->linkstatus), 1738 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus), 1739 0, 0); 1740#else 1741 status = slic_upr_request(adapter, SLIC_UPR_RLSR, 1742 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */ 1743 0, 0, 0); 1744#endif 1745} 1746 1747static void slic_init_cleanup(struct adapter *adapter) 1748{ 1749 if (adapter->intrregistered) { 1750 adapter->intrregistered = 0; 1751 free_irq(adapter->netdev->irq, adapter->netdev); 1752 1753 } 1754 if (adapter->pshmem) { 1755 pci_free_consistent(adapter->pcidev, 1756 sizeof(struct slic_shmem), 1757 adapter->pshmem, adapter->phys_shmem); 1758 adapter->pshmem = NULL; 1759 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL; 1760 } 1761 1762 if (adapter->pingtimerset) { 1763 adapter->pingtimerset = 0; 1764 del_timer(&adapter->pingtimer); 1765 } 1766 1767 slic_rspqueue_free(adapter); 1768 slic_cmdq_free(adapter); 1769 slic_rcvqueue_free(adapter); 1770} 1771 1772/* 1773 * Allocate a mcast_address structure to hold the multicast address. 1774 * Link it in. 1775 */ 1776static int slic_mcast_add_list(struct adapter *adapter, char *address) 1777{ 1778 struct mcast_address *mcaddr, *mlist; 1779 1780 /* Check to see if it already exists */ 1781 mlist = adapter->mcastaddrs; 1782 while (mlist) { 1783 if (ether_addr_equal(mlist->address, address)) 1784 return 0; 1785 mlist = mlist->next; 1786 } 1787 1788 /* Doesn't already exist. Allocate a structure to hold it */ 1789 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC); 1790 if (mcaddr == NULL) 1791 return 1; 1792 1793 memcpy(mcaddr->address, address, ETH_ALEN); 1794 1795 mcaddr->next = adapter->mcastaddrs; 1796 adapter->mcastaddrs = mcaddr; 1797 1798 return 0; 1799} 1800 1801static void slic_mcast_set_list(struct net_device *dev) 1802{ 1803 struct adapter *adapter = netdev_priv(dev); 1804 int status = 0; 1805 char *addresses; 1806 struct netdev_hw_addr *ha; 1807 1808 netdev_for_each_mc_addr(ha, dev) { 1809 addresses = (char *) &ha->addr; 1810 status = slic_mcast_add_list(adapter, addresses); 1811 if (status != 0) 1812 break; 1813 slic_mcast_set_bit(adapter, addresses); 1814 } 1815 1816 if (adapter->devflags_prev != dev->flags) { 1817 adapter->macopts = MAC_DIRECTED; 1818 if (dev->flags) { 1819 if (dev->flags & IFF_BROADCAST) 1820 adapter->macopts |= MAC_BCAST; 1821 if (dev->flags & IFF_PROMISC) 1822 adapter->macopts |= MAC_PROMISC; 1823 if (dev->flags & IFF_ALLMULTI) 1824 adapter->macopts |= MAC_ALLMCAST; 1825 if (dev->flags & IFF_MULTICAST) 1826 adapter->macopts |= MAC_MCAST; 1827 } 1828 adapter->devflags_prev = dev->flags; 1829 slic_config_set(adapter, true); 1830 } else { 1831 if (status == 0) 1832 slic_mcast_set_mask(adapter); 1833 } 1834} 1835 1836#define XMIT_FAIL_LINK_STATE 1 1837#define XMIT_FAIL_ZERO_LENGTH 2 1838#define XMIT_FAIL_HOSTCMD_FAIL 3 1839 1840static void slic_xmit_build_request(struct adapter *adapter, 1841 struct slic_hostcmd *hcmd, struct sk_buff *skb) 1842{ 1843 struct slic_host64_cmd *ihcmd; 1844 ulong phys_addr; 1845 1846 ihcmd = &hcmd->cmd64; 1847 1848 ihcmd->flags = (adapter->port << IHFLG_IFSHFT); 1849 ihcmd->command = IHCMD_XMT_REQ; 1850 ihcmd->u.slic_buffers.totlen = skb->len; 1851 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, 1852 PCI_DMA_TODEVICE); 1853 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr); 1854 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr); 1855 ihcmd->u.slic_buffers.bufs[0].length = skb->len; 1856#if BITS_PER_LONG == 64 1857 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] - 1858 (u64) hcmd) + 31) >> 5); 1859#else 1860 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] - 1861 (u32) hcmd) + 31) >> 5); 1862#endif 1863} 1864 1865static void slic_xmit_fail(struct adapter *adapter, 1866 struct sk_buff *skb, 1867 void *cmd, u32 skbtype, u32 status) 1868{ 1869 if (adapter->xmitq_full) 1870 netif_stop_queue(adapter->netdev); 1871 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) { 1872 switch (status) { 1873 case XMIT_FAIL_LINK_STATE: 1874 dev_err(&adapter->netdev->dev, 1875 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n", 1876 skb, skb->pkt_type, 1877 SLIC_LINKSTATE(adapter->linkstate), 1878 SLIC_ADAPTER_STATE(adapter->state), 1879 adapter->state, 1880 SLIC_CARD_STATE(adapter->card->state), 1881 adapter->card->state); 1882 break; 1883 case XMIT_FAIL_ZERO_LENGTH: 1884 dev_err(&adapter->netdev->dev, 1885 "xmit_start skb->len == 0 skb[%p] type[%x]\n", 1886 skb, skb->pkt_type); 1887 break; 1888 case XMIT_FAIL_HOSTCMD_FAIL: 1889 dev_err(&adapter->netdev->dev, 1890 "xmit_start skb[%p] type[%x] No host commands available\n", skb, skb->pkt_type); 1891 break; 1892 } 1893 } 1894 dev_kfree_skb(skb); 1895 adapter->netdev->stats.tx_dropped++; 1896} 1897 1898static void slic_rcv_handle_error(struct adapter *adapter, 1899 struct slic_rcvbuf *rcvbuf) 1900{ 1901 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data; 1902 struct net_device *netdev = adapter->netdev; 1903 1904 if (adapter->devid != SLIC_1GB_DEVICE_ID) { 1905 if (hdr->frame_status14 & VRHSTAT_802OE) 1906 adapter->if_events.oflow802++; 1907 if (hdr->frame_status14 & VRHSTAT_TPOFLO) 1908 adapter->if_events.Tprtoflow++; 1909 if (hdr->frame_status_b14 & VRHSTATB_802UE) 1910 adapter->if_events.uflow802++; 1911 if (hdr->frame_status_b14 & VRHSTATB_RCVE) { 1912 adapter->if_events.rcvearly++; 1913 netdev->stats.rx_fifo_errors++; 1914 } 1915 if (hdr->frame_status_b14 & VRHSTATB_BUFF) { 1916 adapter->if_events.Bufov++; 1917 netdev->stats.rx_over_errors++; 1918 } 1919 if (hdr->frame_status_b14 & VRHSTATB_CARRE) { 1920 adapter->if_events.Carre++; 1921 netdev->stats.tx_carrier_errors++; 1922 } 1923 if (hdr->frame_status_b14 & VRHSTATB_LONGE) 1924 adapter->if_events.Longe++; 1925 if (hdr->frame_status_b14 & VRHSTATB_PREA) 1926 adapter->if_events.Invp++; 1927 if (hdr->frame_status_b14 & VRHSTATB_CRC) { 1928 adapter->if_events.Crc++; 1929 netdev->stats.rx_crc_errors++; 1930 } 1931 if (hdr->frame_status_b14 & VRHSTATB_DRBL) 1932 adapter->if_events.Drbl++; 1933 if (hdr->frame_status_b14 & VRHSTATB_CODE) 1934 adapter->if_events.Code++; 1935 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM) 1936 adapter->if_events.TpCsum++; 1937 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN) 1938 adapter->if_events.TpHlen++; 1939 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM) 1940 adapter->if_events.IpCsum++; 1941 if (hdr->frame_status_b14 & VRHSTATB_IPLERR) 1942 adapter->if_events.IpLen++; 1943 if (hdr->frame_status_b14 & VRHSTATB_IPHERR) 1944 adapter->if_events.IpHlen++; 1945 } else { 1946 if (hdr->frame_statusGB & VGBSTAT_XPERR) { 1947 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT; 1948 1949 if (xerr == VGBSTAT_XCSERR) 1950 adapter->if_events.TpCsum++; 1951 if (xerr == VGBSTAT_XUFLOW) 1952 adapter->if_events.Tprtoflow++; 1953 if (xerr == VGBSTAT_XHLEN) 1954 adapter->if_events.TpHlen++; 1955 } 1956 if (hdr->frame_statusGB & VGBSTAT_NETERR) { 1957 u32 nerr = 1958 (hdr-> 1959 frame_statusGB >> VGBSTAT_NERRSHFT) & 1960 VGBSTAT_NERRMSK; 1961 if (nerr == VGBSTAT_NCSERR) 1962 adapter->if_events.IpCsum++; 1963 if (nerr == VGBSTAT_NUFLOW) 1964 adapter->if_events.IpLen++; 1965 if (nerr == VGBSTAT_NHLEN) 1966 adapter->if_events.IpHlen++; 1967 } 1968 if (hdr->frame_statusGB & VGBSTAT_LNKERR) { 1969 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK; 1970 1971 if (lerr == VGBSTAT_LDEARLY) 1972 adapter->if_events.rcvearly++; 1973 if (lerr == VGBSTAT_LBOFLO) 1974 adapter->if_events.Bufov++; 1975 if (lerr == VGBSTAT_LCODERR) 1976 adapter->if_events.Code++; 1977 if (lerr == VGBSTAT_LDBLNBL) 1978 adapter->if_events.Drbl++; 1979 if (lerr == VGBSTAT_LCRCERR) 1980 adapter->if_events.Crc++; 1981 if (lerr == VGBSTAT_LOFLO) 1982 adapter->if_events.oflow802++; 1983 if (lerr == VGBSTAT_LUFLO) 1984 adapter->if_events.uflow802++; 1985 } 1986 } 1987 return; 1988} 1989 1990#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000 1991#define M_FAST_PATH 0x0040 1992 1993static void slic_rcv_handler(struct adapter *adapter) 1994{ 1995 struct net_device *netdev = adapter->netdev; 1996 struct sk_buff *skb; 1997 struct slic_rcvbuf *rcvbuf; 1998 u32 frames = 0; 1999 2000 while ((skb = slic_rcvqueue_getnext(adapter))) { 2001 u32 rx_bytes; 2002 2003 rcvbuf = (struct slic_rcvbuf *)skb->head; 2004 adapter->card->events++; 2005 if (rcvbuf->status & IRHDDR_ERR) { 2006 adapter->rx_errors++; 2007 slic_rcv_handle_error(adapter, rcvbuf); 2008 slic_rcvqueue_reinsert(adapter, skb); 2009 continue; 2010 } 2011 2012 if (!slic_mac_filter(adapter, (struct ether_header *) 2013 rcvbuf->data)) { 2014 slic_rcvqueue_reinsert(adapter, skb); 2015 continue; 2016 } 2017 skb_pull(skb, SLIC_RCVBUF_HEADSIZE); 2018 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK); 2019 skb_put(skb, rx_bytes); 2020 netdev->stats.rx_packets++; 2021 netdev->stats.rx_bytes += rx_bytes; 2022#if SLIC_OFFLOAD_IP_CHECKSUM 2023 skb->ip_summed = CHECKSUM_UNNECESSARY; 2024#endif 2025 2026 skb->dev = adapter->netdev; 2027 skb->protocol = eth_type_trans(skb, skb->dev); 2028 netif_rx(skb); 2029 2030 ++frames; 2031#if SLIC_INTERRUPT_PROCESS_LIMIT 2032 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) { 2033 adapter->rcv_interrupt_yields++; 2034 break; 2035 } 2036#endif 2037 } 2038 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames); 2039} 2040 2041static void slic_xmit_complete(struct adapter *adapter) 2042{ 2043 struct slic_hostcmd *hcmd; 2044 struct slic_rspbuf *rspbuf; 2045 u32 frames = 0; 2046 struct slic_handle_word slic_handle_word; 2047 2048 do { 2049 rspbuf = slic_rspqueue_getnext(adapter); 2050 if (!rspbuf) 2051 break; 2052 adapter->xmit_completes++; 2053 adapter->card->events++; 2054 /* 2055 Get the complete host command buffer 2056 */ 2057 slic_handle_word.handle_token = rspbuf->hosthandle; 2058 hcmd = 2059 (struct slic_hostcmd *) 2060 adapter->slic_handles[slic_handle_word.handle_index]. 2061 address; 2062/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */ 2063 if (hcmd->type == SLIC_CMD_DUMB) { 2064 if (hcmd->skb) 2065 dev_kfree_skb_irq(hcmd->skb); 2066 slic_cmdq_putdone_irq(adapter, hcmd); 2067 } 2068 rspbuf->status = 0; 2069 rspbuf->hosthandle = 0; 2070 frames++; 2071 } while (1); 2072 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames); 2073} 2074 2075static void slic_interrupt_card_up(u32 isr, struct adapter *adapter, 2076 struct net_device *dev) 2077{ 2078 if (isr & ~ISR_IO) { 2079 if (isr & ISR_ERR) { 2080 adapter->error_interrupts++; 2081 if (isr & ISR_RMISS) { 2082 int count; 2083 int pre_count; 2084 int errors; 2085 2086 struct slic_rcvqueue *rcvq = 2087 &adapter->rcvqueue; 2088 2089 adapter->error_rmiss_interrupts++; 2090 2091 if (!rcvq->errors) 2092 rcv_count = rcvq->count; 2093 pre_count = rcvq->count; 2094 errors = rcvq->errors; 2095 2096 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) { 2097 count = slic_rcvqueue_fill(adapter); 2098 if (!count) 2099 break; 2100 } 2101 } else if (isr & ISR_XDROP) { 2102 dev_err(&dev->dev, 2103 "isr & ISR_ERR [%x] ISR_XDROP\n", isr); 2104 } else { 2105 dev_err(&dev->dev, 2106 "isr & ISR_ERR [%x]\n", 2107 isr); 2108 } 2109 } 2110 2111 if (isr & ISR_LEVENT) { 2112 adapter->linkevent_interrupts++; 2113 slic_link_event_handler(adapter); 2114 } 2115 2116 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) || 2117 (isr & ISR_UPCBSY)) { 2118 adapter->upr_interrupts++; 2119 slic_upr_request_complete(adapter, isr); 2120 } 2121 } 2122 2123 if (isr & ISR_RCV) { 2124 adapter->rcv_interrupts++; 2125 slic_rcv_handler(adapter); 2126 } 2127 2128 if (isr & ISR_CMD) { 2129 adapter->xmit_interrupts++; 2130 slic_xmit_complete(adapter); 2131 } 2132} 2133 2134 2135static irqreturn_t slic_interrupt(int irq, void *dev_id) 2136{ 2137 struct net_device *dev = (struct net_device *)dev_id; 2138 struct adapter *adapter = netdev_priv(dev); 2139 u32 isr; 2140 2141 if ((adapter->pshmem) && (adapter->pshmem->isr)) { 2142 slic_reg32_write(&adapter->slic_regs->slic_icr, 2143 ICR_INT_MASK, FLUSH); 2144 isr = adapter->isrcopy = adapter->pshmem->isr; 2145 adapter->pshmem->isr = 0; 2146 adapter->num_isrs++; 2147 switch (adapter->card->state) { 2148 case CARD_UP: 2149 slic_interrupt_card_up(isr, adapter, dev); 2150 break; 2151 2152 case CARD_DOWN: 2153 if ((isr & ISR_UPC) || 2154 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { 2155 adapter->upr_interrupts++; 2156 slic_upr_request_complete(adapter, isr); 2157 } 2158 break; 2159 } 2160 2161 adapter->isrcopy = 0; 2162 adapter->all_reg_writes += 2; 2163 adapter->isr_reg_writes++; 2164 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH); 2165 } else { 2166 adapter->false_interrupts++; 2167 } 2168 return IRQ_HANDLED; 2169} 2170 2171#define NORMAL_ETHFRAME 0 2172 2173static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev) 2174{ 2175 struct sliccard *card; 2176 struct adapter *adapter = netdev_priv(dev); 2177 struct slic_hostcmd *hcmd = NULL; 2178 u32 status = 0; 2179 void *offloadcmd = NULL; 2180 2181 card = adapter->card; 2182 if ((adapter->linkstate != LINK_UP) || 2183 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) { 2184 status = XMIT_FAIL_LINK_STATE; 2185 goto xmit_fail; 2186 2187 } else if (skb->len == 0) { 2188 status = XMIT_FAIL_ZERO_LENGTH; 2189 goto xmit_fail; 2190 } 2191 2192 hcmd = slic_cmdq_getfree(adapter); 2193 if (!hcmd) { 2194 adapter->xmitq_full = 1; 2195 status = XMIT_FAIL_HOSTCMD_FAIL; 2196 goto xmit_fail; 2197 } 2198 hcmd->skb = skb; 2199 hcmd->busy = 1; 2200 hcmd->type = SLIC_CMD_DUMB; 2201 slic_xmit_build_request(adapter, hcmd, skb); 2202 dev->stats.tx_packets++; 2203 dev->stats.tx_bytes += skb->len; 2204 2205#ifdef DEBUG_DUMP 2206 if (adapter->kill_card) { 2207 struct slic_host64_cmd ihcmd; 2208 2209 ihcmd = &hcmd->cmd64; 2210 2211 ihcmd->flags |= 0x40; 2212 adapter->kill_card = 0; /* only do this once */ 2213 } 2214#endif 2215 if (hcmd->paddrh == 0) { 2216 slic_reg32_write(&adapter->slic_regs->slic_cbar, 2217 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH); 2218 } else { 2219 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64, 2220 (hcmd->paddrl | hcmd->cmdsize), 2221 &adapter->slic_regs->slic_addr_upper, 2222 hcmd->paddrh, DONT_FLUSH); 2223 } 2224xmit_done: 2225 return NETDEV_TX_OK; 2226xmit_fail: 2227 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status); 2228 goto xmit_done; 2229} 2230 2231 2232static void slic_adapter_freeresources(struct adapter *adapter) 2233{ 2234 slic_init_cleanup(adapter); 2235 adapter->error_interrupts = 0; 2236 adapter->rcv_interrupts = 0; 2237 adapter->xmit_interrupts = 0; 2238 adapter->linkevent_interrupts = 0; 2239 adapter->upr_interrupts = 0; 2240 adapter->num_isrs = 0; 2241 adapter->xmit_completes = 0; 2242 adapter->rcv_broadcasts = 0; 2243 adapter->rcv_multicasts = 0; 2244 adapter->rcv_unicasts = 0; 2245} 2246 2247static int slic_adapter_allocresources(struct adapter *adapter) 2248{ 2249 if (!adapter->intrregistered) { 2250 int retval; 2251 2252 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 2253 slic_global.driver_lock.flags); 2254 2255 retval = request_irq(adapter->netdev->irq, 2256 &slic_interrupt, 2257 IRQF_SHARED, 2258 adapter->netdev->name, adapter->netdev); 2259 2260 spin_lock_irqsave(&slic_global.driver_lock.lock, 2261 slic_global.driver_lock.flags); 2262 2263 if (retval) { 2264 dev_err(&adapter->netdev->dev, 2265 "request_irq (%s) FAILED [%x]\n", 2266 adapter->netdev->name, retval); 2267 return retval; 2268 } 2269 adapter->intrregistered = 1; 2270 } 2271 return 0; 2272} 2273 2274/* 2275 * slic_if_init 2276 * 2277 * Perform initialization of our slic interface. 2278 * 2279 */ 2280static int slic_if_init(struct adapter *adapter) 2281{ 2282 struct sliccard *card = adapter->card; 2283 struct net_device *dev = adapter->netdev; 2284 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 2285 struct slic_shmem *pshmem; 2286 int rc; 2287 2288 /* adapter should be down at this point */ 2289 if (adapter->state != ADAPT_DOWN) { 2290 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n", 2291 __func__); 2292 rc = -EIO; 2293 goto err; 2294 } 2295 2296 adapter->devflags_prev = dev->flags; 2297 adapter->macopts = MAC_DIRECTED; 2298 if (dev->flags) { 2299 if (dev->flags & IFF_BROADCAST) 2300 adapter->macopts |= MAC_BCAST; 2301 if (dev->flags & IFF_PROMISC) 2302 adapter->macopts |= MAC_PROMISC; 2303 if (dev->flags & IFF_ALLMULTI) 2304 adapter->macopts |= MAC_ALLMCAST; 2305 if (dev->flags & IFF_MULTICAST) 2306 adapter->macopts |= MAC_MCAST; 2307 } 2308 rc = slic_adapter_allocresources(adapter); 2309 if (rc) { 2310 dev_err(&dev->dev, 2311 "%s: slic_adapter_allocresources FAILED %x\n", 2312 __func__, rc); 2313 slic_adapter_freeresources(adapter); 2314 goto err; 2315 } 2316 2317 if (!adapter->queues_initialized) { 2318 rc = slic_rspqueue_init(adapter); 2319 if (rc) 2320 goto err; 2321 rc = slic_cmdq_init(adapter); 2322 if (rc) 2323 goto err; 2324 rc = slic_rcvqueue_init(adapter); 2325 if (rc) 2326 goto err; 2327 adapter->queues_initialized = 1; 2328 } 2329 2330 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 2331 mdelay(1); 2332 2333 if (!adapter->isp_initialized) { 2334 pshmem = (struct slic_shmem *)(unsigned long) 2335 adapter->phys_shmem; 2336 2337 spin_lock_irqsave(&adapter->bit64reglock.lock, 2338 adapter->bit64reglock.flags); 2339 2340#if BITS_PER_LONG == 64 2341 slic_reg32_write(&slic_regs->slic_addr_upper, 2342 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH); 2343 slic_reg32_write(&slic_regs->slic_isp, 2344 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); 2345#else 2346 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH); 2347 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH); 2348#endif 2349 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 2350 adapter->bit64reglock.flags); 2351 adapter->isp_initialized = 1; 2352 } 2353 2354 adapter->state = ADAPT_UP; 2355 if (!card->loadtimerset) { 2356 init_timer(&card->loadtimer); 2357 card->loadtimer.expires = 2358 jiffies + (SLIC_LOADTIMER_PERIOD * HZ); 2359 card->loadtimer.data = (ulong) card; 2360 card->loadtimer.function = &slic_timer_load_check; 2361 add_timer(&card->loadtimer); 2362 2363 card->loadtimerset = 1; 2364 } 2365 2366 if (!adapter->pingtimerset) { 2367 init_timer(&adapter->pingtimer); 2368 adapter->pingtimer.expires = 2369 jiffies + (PING_TIMER_INTERVAL * HZ); 2370 adapter->pingtimer.data = (ulong) dev; 2371 adapter->pingtimer.function = &slic_timer_ping; 2372 add_timer(&adapter->pingtimer); 2373 adapter->pingtimerset = 1; 2374 adapter->card->pingstatus = ISR_PINGMASK; 2375 } 2376 2377 /* 2378 * clear any pending events, then enable interrupts 2379 */ 2380 adapter->isrcopy = 0; 2381 adapter->pshmem->isr = 0; 2382 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH); 2383 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH); 2384 2385 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD); 2386 slic_link_event_handler(adapter); 2387 2388err: 2389 return rc; 2390} 2391 2392static int slic_entry_open(struct net_device *dev) 2393{ 2394 struct adapter *adapter = netdev_priv(dev); 2395 struct sliccard *card = adapter->card; 2396 int status; 2397 2398 netif_stop_queue(adapter->netdev); 2399 2400 spin_lock_irqsave(&slic_global.driver_lock.lock, 2401 slic_global.driver_lock.flags); 2402 if (!adapter->activated) { 2403 card->adapters_activated++; 2404 slic_global.num_slic_ports_active++; 2405 adapter->activated = 1; 2406 } 2407 status = slic_if_init(adapter); 2408 2409 if (status != 0) { 2410 if (adapter->activated) { 2411 card->adapters_activated--; 2412 slic_global.num_slic_ports_active--; 2413 adapter->activated = 0; 2414 } 2415 goto spin_unlock; 2416 } 2417 if (!card->master) 2418 card->master = adapter; 2419 2420spin_unlock: 2421 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 2422 slic_global.driver_lock.flags); 2423 return status; 2424} 2425 2426static void slic_card_cleanup(struct sliccard *card) 2427{ 2428 if (card->loadtimerset) { 2429 card->loadtimerset = 0; 2430 del_timer_sync(&card->loadtimer); 2431 } 2432 2433 kfree(card); 2434} 2435 2436static void slic_entry_remove(struct pci_dev *pcidev) 2437{ 2438 struct net_device *dev = pci_get_drvdata(pcidev); 2439 struct adapter *adapter = netdev_priv(dev); 2440 struct sliccard *card; 2441 struct mcast_address *mcaddr, *mlist; 2442 2443 unregister_netdev(dev); 2444 2445 slic_adapter_freeresources(adapter); 2446 slic_unmap_mmio_space(adapter); 2447 2448 /* free multicast addresses */ 2449 mlist = adapter->mcastaddrs; 2450 while (mlist) { 2451 mcaddr = mlist; 2452 mlist = mlist->next; 2453 kfree(mcaddr); 2454 } 2455 card = adapter->card; 2456 card->adapters_allocated--; 2457 adapter->allocated = 0; 2458 if (!card->adapters_allocated) { 2459 struct sliccard *curr_card = slic_global.slic_card; 2460 if (curr_card == card) { 2461 slic_global.slic_card = card->next; 2462 } else { 2463 while (curr_card->next != card) 2464 curr_card = curr_card->next; 2465 curr_card->next = card->next; 2466 } 2467 slic_global.num_slic_cards--; 2468 slic_card_cleanup(card); 2469 } 2470 free_netdev(dev); 2471 pci_release_regions(pcidev); 2472 pci_disable_device(pcidev); 2473} 2474 2475static int slic_entry_halt(struct net_device *dev) 2476{ 2477 struct adapter *adapter = netdev_priv(dev); 2478 struct sliccard *card = adapter->card; 2479 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 2480 2481 spin_lock_irqsave(&slic_global.driver_lock.lock, 2482 slic_global.driver_lock.flags); 2483 netif_stop_queue(adapter->netdev); 2484 adapter->state = ADAPT_DOWN; 2485 adapter->linkstate = LINK_DOWN; 2486 adapter->upr_list = NULL; 2487 adapter->upr_busy = 0; 2488 adapter->devflags_prev = 0; 2489 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 2490 adapter->all_reg_writes++; 2491 adapter->icr_reg_writes++; 2492 slic_config_clear(adapter); 2493 if (adapter->activated) { 2494 card->adapters_activated--; 2495 slic_global.num_slic_ports_active--; 2496 adapter->activated = 0; 2497 } 2498#ifdef AUTOMATIC_RESET 2499 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH); 2500#endif 2501 /* 2502 * Reset the adapter's cmd queues 2503 */ 2504 slic_cmdq_reset(adapter); 2505 2506#ifdef AUTOMATIC_RESET 2507 if (!card->adapters_activated) 2508 slic_card_init(card, adapter); 2509#endif 2510 2511 spin_unlock_irqrestore(&slic_global.driver_lock.lock, 2512 slic_global.driver_lock.flags); 2513 return 0; 2514} 2515 2516static struct net_device_stats *slic_get_stats(struct net_device *dev) 2517{ 2518 struct adapter *adapter = netdev_priv(dev); 2519 2520 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions; 2521 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors; 2522 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors; 2523 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards; 2524 dev->stats.tx_heartbeat_errors = 0; 2525 dev->stats.tx_aborted_errors = 0; 2526 dev->stats.tx_window_errors = 0; 2527 dev->stats.tx_fifo_errors = 0; 2528 dev->stats.rx_frame_errors = 0; 2529 dev->stats.rx_length_errors = 0; 2530 2531 return &dev->stats; 2532} 2533 2534static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 2535{ 2536 struct adapter *adapter = netdev_priv(dev); 2537 struct ethtool_cmd edata; 2538 struct ethtool_cmd ecmd; 2539 u32 data[7]; 2540 u32 intagg; 2541 2542 switch (cmd) { 2543 case SIOCSLICSETINTAGG: 2544 if (copy_from_user(data, rq->ifr_data, 28)) 2545 return -EFAULT; 2546 intagg = data[0]; 2547 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n", 2548 __func__, intagg); 2549 slic_intagg_set(adapter, intagg); 2550 return 0; 2551 2552#ifdef SLIC_TRACE_DUMP_ENABLED 2553 case SIOCSLICTRACEDUMP: 2554 { 2555 u32 value; 2556 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n"); 2557 2558 if (copy_from_user(data, rq->ifr_data, 28)) { 2559 PRINT_ERROR 2560 ("slic: copy_from_user FAILED getting initial simba param\n"); 2561 return -EFAULT; 2562 } 2563 2564 value = data[0]; 2565 if (tracemon_request == SLIC_DUMP_DONE) { 2566 PRINT_ERROR 2567 ("ATK Diagnostic Trace Dump Requested\n"); 2568 tracemon_request = SLIC_DUMP_REQUESTED; 2569 tracemon_request_type = value; 2570 tracemon_timestamp = jiffies; 2571 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) || 2572 (tracemon_request == 2573 SLIC_DUMP_IN_PROGRESS)) { 2574 PRINT_ERROR 2575 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n"); 2576 } else { 2577 PRINT_ERROR 2578 ("ATK Diagnostic Trace Dump Requested\n"); 2579 tracemon_request = SLIC_DUMP_REQUESTED; 2580 tracemon_request_type = value; 2581 tracemon_timestamp = jiffies; 2582 } 2583 return 0; 2584 } 2585#endif 2586 case SIOCETHTOOL: 2587 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd))) 2588 return -EFAULT; 2589 2590 if (ecmd.cmd == ETHTOOL_GSET) { 2591 memset(&edata, 0, sizeof(edata)); 2592 edata.supported = (SUPPORTED_10baseT_Half | 2593 SUPPORTED_10baseT_Full | 2594 SUPPORTED_100baseT_Half | 2595 SUPPORTED_100baseT_Full | 2596 SUPPORTED_Autoneg | SUPPORTED_MII); 2597 edata.port = PORT_MII; 2598 edata.transceiver = XCVR_INTERNAL; 2599 edata.phy_address = 0; 2600 if (adapter->linkspeed == LINK_100MB) 2601 edata.speed = SPEED_100; 2602 else if (adapter->linkspeed == LINK_10MB) 2603 edata.speed = SPEED_10; 2604 else 2605 edata.speed = 0; 2606 2607 if (adapter->linkduplex == LINK_FULLD) 2608 edata.duplex = DUPLEX_FULL; 2609 else 2610 edata.duplex = DUPLEX_HALF; 2611 2612 edata.autoneg = AUTONEG_ENABLE; 2613 edata.maxtxpkt = 1; 2614 edata.maxrxpkt = 1; 2615 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata))) 2616 return -EFAULT; 2617 2618 } else if (ecmd.cmd == ETHTOOL_SSET) { 2619 if (!capable(CAP_NET_ADMIN)) 2620 return -EPERM; 2621 2622 if (adapter->linkspeed == LINK_100MB) 2623 edata.speed = SPEED_100; 2624 else if (adapter->linkspeed == LINK_10MB) 2625 edata.speed = SPEED_10; 2626 else 2627 edata.speed = 0; 2628 2629 if (adapter->linkduplex == LINK_FULLD) 2630 edata.duplex = DUPLEX_FULL; 2631 else 2632 edata.duplex = DUPLEX_HALF; 2633 2634 edata.autoneg = AUTONEG_ENABLE; 2635 edata.maxtxpkt = 1; 2636 edata.maxrxpkt = 1; 2637 if ((ecmd.speed != edata.speed) || 2638 (ecmd.duplex != edata.duplex)) { 2639 u32 speed; 2640 u32 duplex; 2641 2642 if (ecmd.speed == SPEED_10) 2643 speed = 0; 2644 else 2645 speed = PCR_SPEED_100; 2646 if (ecmd.duplex == DUPLEX_FULL) 2647 duplex = PCR_DUPLEX_FULL; 2648 else 2649 duplex = 0; 2650 slic_link_config(adapter, speed, duplex); 2651 slic_link_event_handler(adapter); 2652 } 2653 } 2654 return 0; 2655 default: 2656 return -EOPNOTSUPP; 2657 } 2658} 2659 2660static void slic_config_pci(struct pci_dev *pcidev) 2661{ 2662 u16 pci_command; 2663 u16 new_command; 2664 2665 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); 2666 2667 new_command = pci_command | PCI_COMMAND_MASTER 2668 | PCI_COMMAND_MEMORY 2669 | PCI_COMMAND_INVALIDATE 2670 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; 2671 if (pci_command != new_command) 2672 pci_write_config_word(pcidev, PCI_COMMAND, new_command); 2673} 2674 2675static int slic_card_init(struct sliccard *card, struct adapter *adapter) 2676{ 2677 __iomem struct slic_regs *slic_regs = adapter->slic_regs; 2678 struct slic_eeprom *peeprom; 2679 struct oslic_eeprom *pOeeprom; 2680 dma_addr_t phys_config; 2681 u32 phys_configh; 2682 u32 phys_configl; 2683 u32 i = 0; 2684 struct slic_shmem *pshmem; 2685 int status; 2686 uint macaddrs = card->card_size; 2687 ushort eecodesize; 2688 ushort dramsize; 2689 ushort ee_chksum; 2690 ushort calc_chksum; 2691 struct slic_config_mac *pmac; 2692 unsigned char fruformat; 2693 unsigned char oemfruformat; 2694 struct atk_fru *patkfru; 2695 union oemfru *poemfru; 2696 2697 /* Reset everything except PCI configuration space */ 2698 slic_soft_reset(adapter); 2699 2700 /* Download the microcode */ 2701 status = slic_card_download(adapter); 2702 if (status) 2703 return status; 2704 2705 if (!card->config_set) { 2706 peeprom = pci_alloc_consistent(adapter->pcidev, 2707 sizeof(struct slic_eeprom), 2708 &phys_config); 2709 2710 phys_configl = SLIC_GET_ADDR_LOW(phys_config); 2711 phys_configh = SLIC_GET_ADDR_HIGH(phys_config); 2712 2713 if (!peeprom) { 2714 dev_err(&adapter->pcidev->dev, 2715 "Failed to allocate DMA memory for EEPROM.\n"); 2716 return -ENOMEM; 2717 } else { 2718 memset(peeprom, 0, sizeof(struct slic_eeprom)); 2719 } 2720 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH); 2721 mdelay(1); 2722 pshmem = (struct slic_shmem *)(unsigned long) 2723 adapter->phys_shmem; 2724 2725 spin_lock_irqsave(&adapter->bit64reglock.lock, 2726 adapter->bit64reglock.flags); 2727 slic_reg32_write(&slic_regs->slic_addr_upper, 2728 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH); 2729 slic_reg32_write(&slic_regs->slic_isp, 2730 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH); 2731 spin_unlock_irqrestore(&adapter->bit64reglock.lock, 2732 adapter->bit64reglock.flags); 2733 2734 status = slic_config_get(adapter, phys_configl, phys_configh); 2735 if (status) { 2736 dev_err(&adapter->pcidev->dev, 2737 "Failed to fetch config data from device.\n"); 2738 goto card_init_err; 2739 } 2740 2741 for (;;) { 2742 if (adapter->pshmem->isr) { 2743 if (adapter->pshmem->isr & ISR_UPC) { 2744 adapter->pshmem->isr = 0; 2745 slic_reg64_write(adapter, 2746 &slic_regs->slic_isp, 0, 2747 &slic_regs->slic_addr_upper, 2748 0, FLUSH); 2749 slic_reg32_write(&slic_regs->slic_isr, 2750 0, FLUSH); 2751 2752 slic_upr_request_complete(adapter, 0); 2753 break; 2754 } else { 2755 adapter->pshmem->isr = 0; 2756 slic_reg32_write(&slic_regs->slic_isr, 2757 0, FLUSH); 2758 } 2759 } else { 2760 mdelay(1); 2761 i++; 2762 if (i > 5000) { 2763 dev_err(&adapter->pcidev->dev, 2764 "Fetch of config data timed out.\n"); 2765 slic_reg64_write(adapter, 2766 &slic_regs->slic_isp, 0, 2767 &slic_regs->slic_addr_upper, 2768 0, FLUSH); 2769 status = -EINVAL; 2770 goto card_init_err; 2771 } 2772 } 2773 } 2774 2775 switch (adapter->devid) { 2776 /* Oasis card */ 2777 case SLIC_2GB_DEVICE_ID: 2778 /* extract EEPROM data and pointers to EEPROM data */ 2779 pOeeprom = (struct oslic_eeprom *) peeprom; 2780 eecodesize = pOeeprom->EecodeSize; 2781 dramsize = pOeeprom->DramSize; 2782 pmac = pOeeprom->MacInfo; 2783 fruformat = pOeeprom->FruFormat; 2784 patkfru = &pOeeprom->AtkFru; 2785 oemfruformat = pOeeprom->OemFruFormat; 2786 poemfru = &pOeeprom->OemFru; 2787 macaddrs = 2; 2788 /* Minor kludge for Oasis card 2789 get 2 MAC addresses from the 2790 EEPROM to ensure that function 1 2791 gets the Port 1 MAC address */ 2792 break; 2793 default: 2794 /* extract EEPROM data and pointers to EEPROM data */ 2795 eecodesize = peeprom->EecodeSize; 2796 dramsize = peeprom->DramSize; 2797 pmac = peeprom->u2.mac.MacInfo; 2798 fruformat = peeprom->FruFormat; 2799 patkfru = &peeprom->AtkFru; 2800 oemfruformat = peeprom->OemFruFormat; 2801 poemfru = &peeprom->OemFru; 2802 break; 2803 } 2804 2805 card->config.EepromValid = false; 2806 2807 /* see if the EEPROM is valid by checking it's checksum */ 2808 if ((eecodesize <= MAX_EECODE_SIZE) && 2809 (eecodesize >= MIN_EECODE_SIZE)) { 2810 2811 ee_chksum = 2812 *(u16 *) ((char *) peeprom + (eecodesize - 2)); 2813 /* 2814 calculate the EEPROM checksum 2815 */ 2816 calc_chksum = slic_eeprom_cksum(peeprom, 2817 eecodesize - 2); 2818 /* 2819 if the ucdoe chksum flag bit worked, 2820 we wouldn't need this 2821 */ 2822 if (ee_chksum == calc_chksum) 2823 card->config.EepromValid = true; 2824 } 2825 /* copy in the DRAM size */ 2826 card->config.DramSize = dramsize; 2827 2828 /* copy in the MAC address(es) */ 2829 for (i = 0; i < macaddrs; i++) { 2830 memcpy(&card->config.MacInfo[i], 2831 &pmac[i], sizeof(struct slic_config_mac)); 2832 } 2833 2834 /* copy the Alacritech FRU information */ 2835 card->config.FruFormat = fruformat; 2836 memcpy(&card->config.AtkFru, patkfru, 2837 sizeof(struct atk_fru)); 2838 2839 pci_free_consistent(adapter->pcidev, 2840 sizeof(struct slic_eeprom), 2841 peeprom, phys_config); 2842 2843 if (!card->config.EepromValid) { 2844 slic_reg64_write(adapter, &slic_regs->slic_isp, 0, 2845 &slic_regs->slic_addr_upper, 2846 0, FLUSH); 2847 dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n"); 2848 return -EINVAL; 2849 } 2850 2851 card->config_set = 1; 2852 } 2853 2854 status = slic_card_download_gbrcv(adapter); 2855 if (status) 2856 return status; 2857 2858 if (slic_global.dynamic_intagg) 2859 slic_intagg_set(adapter, 0); 2860 else 2861 slic_intagg_set(adapter, intagg_delay); 2862 2863 /* 2864 * Initialize ping status to "ok" 2865 */ 2866 card->pingstatus = ISR_PINGMASK; 2867 2868 /* 2869 * Lastly, mark our card state as up and return success 2870 */ 2871 card->state = CARD_UP; 2872 card->reset_in_progress = 0; 2873 2874 return 0; 2875 2876card_init_err: 2877 pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom), 2878 peeprom, phys_config); 2879 return status; 2880} 2881 2882static void slic_init_driver(void) 2883{ 2884 if (slic_first_init) { 2885 slic_first_init = 0; 2886 spin_lock_init(&slic_global.driver_lock.lock); 2887 } 2888} 2889 2890static void slic_init_adapter(struct net_device *netdev, 2891 struct pci_dev *pcidev, 2892 const struct pci_device_id *pci_tbl_entry, 2893 void __iomem *memaddr, int chip_idx) 2894{ 2895 ushort index; 2896 struct slic_handle *pslic_handle; 2897 struct adapter *adapter = netdev_priv(netdev); 2898 2899/* adapter->pcidev = pcidev;*/ 2900 adapter->vendid = pci_tbl_entry->vendor; 2901 adapter->devid = pci_tbl_entry->device; 2902 adapter->subsysid = pci_tbl_entry->subdevice; 2903 adapter->busnumber = pcidev->bus->number; 2904 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); 2905 adapter->functionnumber = (pcidev->devfn & 0x7); 2906 adapter->slic_regs = (__iomem struct slic_regs *)memaddr; 2907 adapter->irq = pcidev->irq; 2908/* adapter->netdev = netdev;*/ 2909 adapter->chipid = chip_idx; 2910 adapter->port = 0; /*adapter->functionnumber;*/ 2911 adapter->cardindex = adapter->port; 2912 spin_lock_init(&adapter->upr_lock.lock); 2913 spin_lock_init(&adapter->bit64reglock.lock); 2914 spin_lock_init(&adapter->adapter_lock.lock); 2915 spin_lock_init(&adapter->reset_lock.lock); 2916 spin_lock_init(&adapter->handle_lock.lock); 2917 2918 adapter->card_size = 1; 2919 /* 2920 Initialize slic_handle array 2921 */ 2922 /* 2923 Start with 1. 0 is an invalid host handle. 2924 */ 2925 for (index = 1, pslic_handle = &adapter->slic_handles[1]; 2926 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) { 2927 2928 pslic_handle->token.handle_index = index; 2929 pslic_handle->type = SLIC_HANDLE_FREE; 2930 pslic_handle->next = adapter->pfree_slic_handles; 2931 adapter->pfree_slic_handles = pslic_handle; 2932 } 2933 adapter->pshmem = (struct slic_shmem *) 2934 pci_alloc_consistent(adapter->pcidev, 2935 sizeof(struct slic_shmem), 2936 &adapter-> 2937 phys_shmem); 2938 if (adapter->pshmem) 2939 memset(adapter->pshmem, 0, sizeof(struct slic_shmem)); 2940} 2941 2942static const struct net_device_ops slic_netdev_ops = { 2943 .ndo_open = slic_entry_open, 2944 .ndo_stop = slic_entry_halt, 2945 .ndo_start_xmit = slic_xmit_start, 2946 .ndo_do_ioctl = slic_ioctl, 2947 .ndo_set_mac_address = slic_mac_set_address, 2948 .ndo_get_stats = slic_get_stats, 2949 .ndo_set_rx_mode = slic_mcast_set_list, 2950 .ndo_validate_addr = eth_validate_addr, 2951 .ndo_change_mtu = eth_change_mtu, 2952}; 2953 2954static u32 slic_card_locate(struct adapter *adapter) 2955{ 2956 struct sliccard *card = slic_global.slic_card; 2957 struct physcard *physcard = slic_global.phys_card; 2958 ushort card_hostid; 2959 u16 __iomem *hostid_reg; 2960 uint i; 2961 uint rdhostid_offset = 0; 2962 2963 switch (adapter->devid) { 2964 case SLIC_2GB_DEVICE_ID: 2965 rdhostid_offset = SLIC_RDHOSTID_2GB; 2966 break; 2967 case SLIC_1GB_DEVICE_ID: 2968 rdhostid_offset = SLIC_RDHOSTID_1GB; 2969 break; 2970 default: 2971 return -ENODEV; 2972 } 2973 2974 hostid_reg = 2975 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) + 2976 rdhostid_offset); 2977 2978 /* read the 16 bit hostid from SRAM */ 2979 card_hostid = (ushort) readw(hostid_reg); 2980 2981 /* Initialize a new card structure if need be */ 2982 if (card_hostid == SLIC_HOSTID_DEFAULT) { 2983 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL); 2984 if (card == NULL) 2985 return -ENOMEM; 2986 2987 card->next = slic_global.slic_card; 2988 slic_global.slic_card = card; 2989 card->busnumber = adapter->busnumber; 2990 card->slotnumber = adapter->slotnumber; 2991 2992 /* Find an available cardnum */ 2993 for (i = 0; i < SLIC_MAX_CARDS; i++) { 2994 if (slic_global.cardnuminuse[i] == 0) { 2995 slic_global.cardnuminuse[i] = 1; 2996 card->cardnum = i; 2997 break; 2998 } 2999 } 3000 slic_global.num_slic_cards++; 3001 } else { 3002 /* Card exists, find the card this adapter belongs to */ 3003 while (card) { 3004 if (card->cardnum == card_hostid) 3005 break; 3006 card = card->next; 3007 } 3008 } 3009 3010 if (!card) 3011 return -ENXIO; 3012 /* Put the adapter in the card's adapter list */ 3013 if (!card->adapter[adapter->port]) { 3014 card->adapter[adapter->port] = adapter; 3015 adapter->card = card; 3016 } 3017 3018 card->card_size = 1; /* one port per *logical* card */ 3019 3020 while (physcard) { 3021 for (i = 0; i < SLIC_MAX_PORTS; i++) { 3022 if (physcard->adapter[i]) 3023 break; 3024 } 3025 if (i == SLIC_MAX_PORTS) 3026 break; 3027 3028 if (physcard->adapter[i]->slotnumber == adapter->slotnumber) 3029 break; 3030 physcard = physcard->next; 3031 } 3032 if (!physcard) { 3033 /* no structure allocated for this physical card yet */ 3034 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC); 3035 if (!physcard) { 3036 if (card_hostid == SLIC_HOSTID_DEFAULT) 3037 kfree(card); 3038 return -ENOMEM; 3039 } 3040 3041 physcard->next = slic_global.phys_card; 3042 slic_global.phys_card = physcard; 3043 physcard->adapters_allocd = 1; 3044 } else { 3045 physcard->adapters_allocd++; 3046 } 3047 /* Note - this is ZERO relative */ 3048 adapter->physport = physcard->adapters_allocd - 1; 3049 3050 physcard->adapter[adapter->physport] = adapter; 3051 adapter->physcard = physcard; 3052 3053 return 0; 3054} 3055 3056static int slic_entry_probe(struct pci_dev *pcidev, 3057 const struct pci_device_id *pci_tbl_entry) 3058{ 3059 static int cards_found; 3060 static int did_version; 3061 int err = -ENODEV; 3062 struct net_device *netdev; 3063 struct adapter *adapter; 3064 void __iomem *memmapped_ioaddr = NULL; 3065 ulong mmio_start = 0; 3066 ulong mmio_len = 0; 3067 struct sliccard *card = NULL; 3068 int pci_using_dac = 0; 3069 3070 slic_global.dynamic_intagg = dynamic_intagg; 3071 3072 err = pci_enable_device(pcidev); 3073 3074 if (err) 3075 return err; 3076 3077 if (did_version++ == 0) { 3078 dev_info(&pcidev->dev, "%s\n", slic_banner); 3079 dev_info(&pcidev->dev, "%s\n", slic_proc_version); 3080 } 3081 3082 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) { 3083 pci_using_dac = 1; 3084 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64)); 3085 if (err) { 3086 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n"); 3087 goto err_out_disable_pci; 3088 } 3089 } else { 3090 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)); 3091 if (err) { 3092 dev_err(&pcidev->dev, "no usable DMA configuration\n"); 3093 goto err_out_disable_pci; 3094 } 3095 pci_using_dac = 0; 3096 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)); 3097 } 3098 3099 err = pci_request_regions(pcidev, DRV_NAME); 3100 if (err) { 3101 dev_err(&pcidev->dev, "can't obtain PCI resources\n"); 3102 goto err_out_disable_pci; 3103 } 3104 3105 pci_set_master(pcidev); 3106 3107 netdev = alloc_etherdev(sizeof(struct adapter)); 3108 if (!netdev) { 3109 err = -ENOMEM; 3110 goto err_out_exit_slic_probe; 3111 } 3112 3113 SET_NETDEV_DEV(netdev, &pcidev->dev); 3114 3115 pci_set_drvdata(pcidev, netdev); 3116 adapter = netdev_priv(netdev); 3117 adapter->netdev = netdev; 3118 adapter->pcidev = pcidev; 3119 if (pci_using_dac) 3120 netdev->features |= NETIF_F_HIGHDMA; 3121 3122 mmio_start = pci_resource_start(pcidev, 0); 3123 mmio_len = pci_resource_len(pcidev, 0); 3124 3125 3126/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/ 3127 memmapped_ioaddr = ioremap(mmio_start, mmio_len); 3128 if (!memmapped_ioaddr) { 3129 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n", 3130 mmio_len, mmio_start); 3131 err = -ENOMEM; 3132 goto err_out_free_netdev; 3133 } 3134 3135 slic_config_pci(pcidev); 3136 3137 slic_init_driver(); 3138 3139 slic_init_adapter(netdev, 3140 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found); 3141 3142 err = slic_card_locate(adapter); 3143 if (err) { 3144 dev_err(&pcidev->dev, "cannot locate card\n"); 3145 goto err_out_unmap; 3146 } 3147 3148 card = adapter->card; 3149 3150 if (!adapter->allocated) { 3151 card->adapters_allocated++; 3152 adapter->allocated = 1; 3153 } 3154 3155 err = slic_card_init(card, adapter); 3156 if (err) 3157 goto err_out_unmap; 3158 3159 slic_adapter_set_hwaddr(adapter); 3160 3161 netdev->base_addr = (unsigned long) memmapped_ioaddr; 3162 netdev->irq = adapter->irq; 3163 netdev->netdev_ops = &slic_netdev_ops; 3164 3165 strcpy(netdev->name, "eth%d"); 3166 err = register_netdev(netdev); 3167 if (err) { 3168 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n"); 3169 goto err_out_unmap; 3170 } 3171 3172 cards_found++; 3173 3174 return 0; 3175 3176err_out_unmap: 3177 iounmap(memmapped_ioaddr); 3178err_out_free_netdev: 3179 free_netdev(netdev); 3180err_out_exit_slic_probe: 3181 pci_release_regions(pcidev); 3182err_out_disable_pci: 3183 pci_disable_device(pcidev); 3184 return err; 3185} 3186 3187static struct pci_driver slic_driver = { 3188 .name = DRV_NAME, 3189 .id_table = slic_pci_tbl, 3190 .probe = slic_entry_probe, 3191 .remove = slic_entry_remove, 3192}; 3193 3194static int __init slic_module_init(void) 3195{ 3196 slic_init_driver(); 3197 3198 return pci_register_driver(&slic_driver); 3199} 3200 3201static void __exit slic_module_cleanup(void) 3202{ 3203 pci_unregister_driver(&slic_driver); 3204} 3205 3206module_init(slic_module_init); 3207module_exit(slic_module_cleanup);