tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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linux
1/******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30#ifndef __RTL92COMMON_DM_H__
31#define __RTL92COMMON_DM_H__
32
33#include "../wifi.h"
34#include "../rtl8192ce/def.h"
35#include "../rtl8192ce/reg.h"
36#include "fw_common.h"
37
38#define HAL_DM_DIG_DISABLE BIT(0)
39#define HAL_DM_HIPWR_DISABLE BIT(1)
40
41#define OFDM_TABLE_LENGTH 37
42#define CCK_TABLE_LENGTH 33
43
44#define OFDM_TABLE_SIZE 37
45#define CCK_TABLE_SIZE 33
46
47#define BW_AUTO_SWITCH_HIGH_LOW 25
48#define BW_AUTO_SWITCH_LOW_HIGH 30
49
50#define DM_DIG_THRESH_HIGH 40
51#define DM_DIG_THRESH_LOW 35
52
53#define DM_FALSEALARM_THRESH_LOW 400
54#define DM_FALSEALARM_THRESH_HIGH 1000
55
56#define DM_DIG_MAX 0x3e
57#define DM_DIG_MIN 0x1e
58
59#define DM_DIG_FA_UPPER 0x32
60#define DM_DIG_FA_LOWER 0x20
61#define DM_DIG_FA_TH0 0x20
62#define DM_DIG_FA_TH1 0x100
63#define DM_DIG_FA_TH2 0x200
64
65#define DM_DIG_BACKOFF_MAX 12
66#define DM_DIG_BACKOFF_MIN -4
67#define DM_DIG_BACKOFF_DEFAULT 10
68
69#define RXPATHSELECTION_SS_TH_lOW 30
70#define RXPATHSELECTION_DIFF_TH 18
71
72#define DM_RATR_STA_INIT 0
73#define DM_RATR_STA_HIGH 1
74#define DM_RATR_STA_MIDDLE 2
75#define DM_RATR_STA_LOW 3
76
77#define CTS2SELF_THVAL 30
78#define REGC38_TH 20
79
80#define WAIOTTHVal 25
81
82#define TXHIGHPWRLEVEL_NORMAL 0
83#define TXHIGHPWRLEVEL_LEVEL1 1
84#define TXHIGHPWRLEVEL_LEVEL2 2
85#define TXHIGHPWRLEVEL_BT1 3
86#define TXHIGHPWRLEVEL_BT2 4
87
88#define DM_TYPE_BYFW 0
89#define DM_TYPE_BYDRIVER 1
90
91#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74
92#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67
93
94#define DYNAMIC_FUNC_DISABLE 0x0
95#define DYNAMIC_FUNC_DIG BIT(0)
96#define DYNAMIC_FUNC_HP BIT(1)
97#define DYNAMIC_FUNC_SS BIT(2) /*Tx Power Tracking*/
98#define DYNAMIC_FUNC_BT BIT(3)
99#define DYNAMIC_FUNC_ANT_DIV BIT(4)
100
101#define RSSI_CCK 0
102#define RSSI_OFDM 1
103#define RSSI_DEFAULT 2
104
105struct swat_t {
106 u8 failure_cnt;
107 u8 try_flag;
108 u8 stop_trying;
109 long pre_rssi;
110 long trying_threshold;
111 u8 cur_antenna;
112 u8 pre_antenna;
113};
114
115enum tag_dynamic_init_gain_operation_type_definition {
116 DIG_TYPE_THRESH_HIGH = 0,
117 DIG_TYPE_THRESH_LOW = 1,
118 DIG_TYPE_BACKOFF = 2,
119 DIG_TYPE_RX_GAIN_MIN = 3,
120 DIG_TYPE_RX_GAIN_MAX = 4,
121 DIG_TYPE_ENABLE = 5,
122 DIG_TYPE_DISABLE = 6,
123 DIG_OP_TYPE_MAX
124};
125
126enum tag_cck_packet_detection_threshold_type_definition {
127 CCK_PD_STAGE_LowRssi = 0,
128 CCK_PD_STAGE_HighRssi = 1,
129 CCK_FA_STAGE_Low = 2,
130 CCK_FA_STAGE_High = 3,
131 CCK_PD_STAGE_MAX = 4,
132};
133
134enum dm_1r_cca_e {
135 CCA_1R = 0,
136 CCA_2R = 1,
137 CCA_MAX = 2,
138};
139
140enum dm_rf_e {
141 RF_SAVE = 0,
142 RF_NORMAL = 1,
143 RF_MAX = 2,
144};
145
146enum dm_sw_ant_switch_e {
147 ANS_ANTENNA_B = 1,
148 ANS_ANTENNA_A = 2,
149 ANS_ANTENNA_MAX = 3,
150};
151
152enum dm_dig_ext_port_alg_e {
153 DIG_EXT_PORT_STAGE_0 = 0,
154 DIG_EXT_PORT_STAGE_1 = 1,
155 DIG_EXT_PORT_STAGE_2 = 2,
156 DIG_EXT_PORT_STAGE_3 = 3,
157 DIG_EXT_PORT_STAGE_MAX = 4,
158};
159
160enum dm_dig_connect_e {
161 DIG_STA_DISCONNECT = 0,
162 DIG_STA_CONNECT = 1,
163 DIG_STA_BEFORE_CONNECT = 2,
164 DIG_MULTISTA_DISCONNECT = 3,
165 DIG_MULTISTA_CONNECT = 4,
166 DIG_CONNECT_MAX
167};
168
169void rtl92c_dm_init(struct ieee80211_hw *hw);
170void rtl92c_dm_watchdog(struct ieee80211_hw *hw);
171void rtl92c_dm_write_dig(struct ieee80211_hw *hw);
172void rtl92c_dm_init_edca_turbo(struct ieee80211_hw *hw);
173void rtl92c_dm_check_txpower_tracking(struct ieee80211_hw *hw);
174void rtl92c_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw);
175void rtl92c_dm_rf_saving(struct ieee80211_hw *hw, u8 bforce_in_normal);
176void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
177void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
178void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool recovery);
179void rtl92c_dm_dynamic_txpower(struct ieee80211_hw *hw);
180void rtl92c_dm_bt_coexist(struct ieee80211_hw *hw);
181void dm_savepowerindex(struct ieee80211_hw *hw);
182void dm_writepowerindex(struct ieee80211_hw *hw, u8 value);
183void dm_restorepowerindex(struct ieee80211_hw *hw);
184
185#endif