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1/* 2 * Copyright © 2007 David Airlie 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 21 * DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * David Airlie 25 */ 26#include <linux/module.h> 27#include <linux/slab.h> 28#include <linux/fb.h> 29 30#include <drm/drmP.h> 31#include <drm/drm_crtc.h> 32#include <drm/drm_crtc_helper.h> 33#include <drm/radeon_drm.h> 34#include "radeon.h" 35 36#include <drm/drm_fb_helper.h> 37 38#include <linux/vga_switcheroo.h> 39 40/* object hierarchy - 41 this contains a helper + a radeon fb 42 the helper contains a pointer to radeon framebuffer baseclass. 43*/ 44struct radeon_fbdev { 45 struct drm_fb_helper helper; 46 struct radeon_framebuffer rfb; 47 struct list_head fbdev_list; 48 struct radeon_device *rdev; 49}; 50 51static struct fb_ops radeonfb_ops = { 52 .owner = THIS_MODULE, 53 .fb_check_var = drm_fb_helper_check_var, 54 .fb_set_par = drm_fb_helper_set_par, 55 .fb_fillrect = cfb_fillrect, 56 .fb_copyarea = cfb_copyarea, 57 .fb_imageblit = cfb_imageblit, 58 .fb_pan_display = drm_fb_helper_pan_display, 59 .fb_blank = drm_fb_helper_blank, 60 .fb_setcmap = drm_fb_helper_setcmap, 61 .fb_debug_enter = drm_fb_helper_debug_enter, 62 .fb_debug_leave = drm_fb_helper_debug_leave, 63}; 64 65 66int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled) 67{ 68 int aligned = width; 69 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled; 70 int pitch_mask = 0; 71 72 switch (bpp / 8) { 73 case 1: 74 pitch_mask = align_large ? 255 : 127; 75 break; 76 case 2: 77 pitch_mask = align_large ? 127 : 31; 78 break; 79 case 3: 80 case 4: 81 pitch_mask = align_large ? 63 : 15; 82 break; 83 } 84 85 aligned += pitch_mask; 86 aligned &= ~pitch_mask; 87 return aligned; 88} 89 90static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj) 91{ 92 struct radeon_bo *rbo = gem_to_radeon_bo(gobj); 93 int ret; 94 95 ret = radeon_bo_reserve(rbo, false); 96 if (likely(ret == 0)) { 97 radeon_bo_kunmap(rbo); 98 radeon_bo_unpin(rbo); 99 radeon_bo_unreserve(rbo); 100 } 101 drm_gem_object_unreference_unlocked(gobj); 102} 103 104static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, 105 struct drm_mode_fb_cmd2 *mode_cmd, 106 struct drm_gem_object **gobj_p) 107{ 108 struct radeon_device *rdev = rfbdev->rdev; 109 struct drm_gem_object *gobj = NULL; 110 struct radeon_bo *rbo = NULL; 111 bool fb_tiled = false; /* useful for testing */ 112 u32 tiling_flags = 0; 113 int ret; 114 int aligned_size, size; 115 int height = mode_cmd->height; 116 u32 bpp, depth; 117 118 drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp); 119 120 /* need to align pitch with crtc limits */ 121 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp, 122 fb_tiled) * ((bpp + 1) / 8); 123 124 if (rdev->family >= CHIP_R600) 125 height = ALIGN(mode_cmd->height, 8); 126 size = mode_cmd->pitches[0] * height; 127 aligned_size = ALIGN(size, PAGE_SIZE); 128 ret = radeon_gem_object_create(rdev, aligned_size, 0, 129 RADEON_GEM_DOMAIN_VRAM, 130 false, true, 131 &gobj); 132 if (ret) { 133 printk(KERN_ERR "failed to allocate framebuffer (%d)\n", 134 aligned_size); 135 return -ENOMEM; 136 } 137 rbo = gem_to_radeon_bo(gobj); 138 139 if (fb_tiled) 140 tiling_flags = RADEON_TILING_MACRO; 141 142#ifdef __BIG_ENDIAN 143 switch (bpp) { 144 case 32: 145 tiling_flags |= RADEON_TILING_SWAP_32BIT; 146 break; 147 case 16: 148 tiling_flags |= RADEON_TILING_SWAP_16BIT; 149 default: 150 break; 151 } 152#endif 153 154 if (tiling_flags) { 155 ret = radeon_bo_set_tiling_flags(rbo, 156 tiling_flags | RADEON_TILING_SURFACE, 157 mode_cmd->pitches[0]); 158 if (ret) 159 dev_err(rdev->dev, "FB failed to set tiling flags\n"); 160 } 161 162 163 ret = radeon_bo_reserve(rbo, false); 164 if (unlikely(ret != 0)) 165 goto out_unref; 166 /* Only 27 bit offset for legacy CRTC */ 167 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM, 168 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27, 169 NULL); 170 if (ret) { 171 radeon_bo_unreserve(rbo); 172 goto out_unref; 173 } 174 if (fb_tiled) 175 radeon_bo_check_tiling(rbo, 0, 0); 176 ret = radeon_bo_kmap(rbo, NULL); 177 radeon_bo_unreserve(rbo); 178 if (ret) { 179 goto out_unref; 180 } 181 182 *gobj_p = gobj; 183 return 0; 184out_unref: 185 radeonfb_destroy_pinned_object(gobj); 186 *gobj_p = NULL; 187 return ret; 188} 189 190static int radeonfb_create(struct drm_fb_helper *helper, 191 struct drm_fb_helper_surface_size *sizes) 192{ 193 struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper; 194 struct radeon_device *rdev = rfbdev->rdev; 195 struct fb_info *info; 196 struct drm_framebuffer *fb = NULL; 197 struct drm_mode_fb_cmd2 mode_cmd; 198 struct drm_gem_object *gobj = NULL; 199 struct radeon_bo *rbo = NULL; 200 struct device *device = &rdev->pdev->dev; 201 int ret; 202 unsigned long tmp; 203 204 mode_cmd.width = sizes->surface_width; 205 mode_cmd.height = sizes->surface_height; 206 207 /* avivo can't scanout real 24bpp */ 208 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) 209 sizes->surface_bpp = 32; 210 211 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, 212 sizes->surface_depth); 213 214 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj); 215 if (ret) { 216 DRM_ERROR("failed to create fbcon object %d\n", ret); 217 return ret; 218 } 219 220 rbo = gem_to_radeon_bo(gobj); 221 222 /* okay we have an object now allocate the framebuffer */ 223 info = framebuffer_alloc(0, device); 224 if (info == NULL) { 225 ret = -ENOMEM; 226 goto out_unref; 227 } 228 229 info->par = rfbdev; 230 231 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj); 232 if (ret) { 233 DRM_ERROR("failed to initialize framebuffer %d\n", ret); 234 goto out_unref; 235 } 236 237 fb = &rfbdev->rfb.base; 238 239 /* setup helper */ 240 rfbdev->helper.fb = fb; 241 rfbdev->helper.fbdev = info; 242 243 memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo)); 244 245 strcpy(info->fix.id, "radeondrmfb"); 246 247 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth); 248 249 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; 250 info->fbops = &radeonfb_ops; 251 252 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; 253 info->fix.smem_start = rdev->mc.aper_base + tmp; 254 info->fix.smem_len = radeon_bo_size(rbo); 255 info->screen_base = rbo->kptr; 256 info->screen_size = radeon_bo_size(rbo); 257 258 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); 259 260 /* setup aperture base/size for vesafb takeover */ 261 info->apertures = alloc_apertures(1); 262 if (!info->apertures) { 263 ret = -ENOMEM; 264 goto out_unref; 265 } 266 info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base; 267 info->apertures->ranges[0].size = rdev->mc.aper_size; 268 269 /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ 270 271 if (info->screen_base == NULL) { 272 ret = -ENOSPC; 273 goto out_unref; 274 } 275 276 ret = fb_alloc_cmap(&info->cmap, 256, 0); 277 if (ret) { 278 ret = -ENOMEM; 279 goto out_unref; 280 } 281 282 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); 283 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); 284 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo)); 285 DRM_INFO("fb depth is %d\n", fb->depth); 286 DRM_INFO(" pitch is %d\n", fb->pitches[0]); 287 288 vga_switcheroo_client_fb_set(rdev->ddev->pdev, info); 289 return 0; 290 291out_unref: 292 if (rbo) { 293 294 } 295 if (fb && ret) { 296 drm_gem_object_unreference(gobj); 297 drm_framebuffer_unregister_private(fb); 298 drm_framebuffer_cleanup(fb); 299 kfree(fb); 300 } 301 return ret; 302} 303 304void radeon_fb_output_poll_changed(struct radeon_device *rdev) 305{ 306 drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper); 307} 308 309static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev) 310{ 311 struct fb_info *info; 312 struct radeon_framebuffer *rfb = &rfbdev->rfb; 313 314 if (rfbdev->helper.fbdev) { 315 info = rfbdev->helper.fbdev; 316 317 unregister_framebuffer(info); 318 if (info->cmap.len) 319 fb_dealloc_cmap(&info->cmap); 320 framebuffer_release(info); 321 } 322 323 if (rfb->obj) { 324 radeonfb_destroy_pinned_object(rfb->obj); 325 rfb->obj = NULL; 326 } 327 drm_fb_helper_fini(&rfbdev->helper); 328 drm_framebuffer_unregister_private(&rfb->base); 329 drm_framebuffer_cleanup(&rfb->base); 330 331 return 0; 332} 333 334static struct drm_fb_helper_funcs radeon_fb_helper_funcs = { 335 .gamma_set = radeon_crtc_fb_gamma_set, 336 .gamma_get = radeon_crtc_fb_gamma_get, 337 .fb_probe = radeonfb_create, 338}; 339 340int radeon_fbdev_init(struct radeon_device *rdev) 341{ 342 struct radeon_fbdev *rfbdev; 343 int bpp_sel = 32; 344 int ret; 345 346 /* select 8 bpp console on RN50 or 16MB cards */ 347 if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024)) 348 bpp_sel = 8; 349 350 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL); 351 if (!rfbdev) 352 return -ENOMEM; 353 354 rfbdev->rdev = rdev; 355 rdev->mode_info.rfbdev = rfbdev; 356 rfbdev->helper.funcs = &radeon_fb_helper_funcs; 357 358 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper, 359 rdev->num_crtc, 360 RADEONFB_CONN_LIMIT); 361 if (ret) { 362 kfree(rfbdev); 363 return ret; 364 } 365 366 drm_fb_helper_single_add_all_connectors(&rfbdev->helper); 367 368 /* disable all the possible outputs/crtcs before entering KMS mode */ 369 drm_helper_disable_unused_functions(rdev->ddev); 370 371 drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); 372 return 0; 373} 374 375void radeon_fbdev_fini(struct radeon_device *rdev) 376{ 377 if (!rdev->mode_info.rfbdev) 378 return; 379 380 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev); 381 kfree(rdev->mode_info.rfbdev); 382 rdev->mode_info.rfbdev = NULL; 383} 384 385void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state) 386{ 387 fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state); 388} 389 390int radeon_fbdev_total_size(struct radeon_device *rdev) 391{ 392 struct radeon_bo *robj; 393 int size = 0; 394 395 robj = gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj); 396 size += radeon_bo_size(robj); 397 return size; 398} 399 400bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj) 401{ 402 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj)) 403 return true; 404 return false; 405}