tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __MSM_DRV_H__
19#define __MSM_DRV_H__
20
21#include <linux/kernel.h>
22#include <linux/clk.h>
23#include <linux/cpufreq.h>
24#include <linux/module.h>
25#include <linux/component.h>
26#include <linux/platform_device.h>
27#include <linux/pm.h>
28#include <linux/pm_runtime.h>
29#include <linux/slab.h>
30#include <linux/list.h>
31#include <linux/iommu.h>
32#include <linux/types.h>
33#include <asm/sizes.h>
34
35
36#if defined(CONFIG_COMPILE_TEST) && !defined(CONFIG_ARCH_MSM)
37/* stubs we need for compile-test: */
38static inline struct device *msm_iommu_get_ctx(const char *ctx_name)
39{
40 return NULL;
41}
42#endif
43
44#ifndef CONFIG_OF
45#include <mach/board.h>
46#include <mach/socinfo.h>
47#include <mach/iommu_domains.h>
48#endif
49
50#include <drm/drmP.h>
51#include <drm/drm_crtc_helper.h>
52#include <drm/drm_fb_helper.h>
53#include <drm/msm_drm.h>
54
55struct msm_kms;
56struct msm_gpu;
57struct msm_mmu;
58
59#define NUM_DOMAINS 2 /* one for KMS, then one per gpu core (?) */
60
61struct msm_file_private {
62 /* currently we don't do anything useful with this.. but when
63 * per-context address spaces are supported we'd keep track of
64 * the context's page-tables here.
65 */
66 int dummy;
67};
68
69struct msm_drm_private {
70
71 struct msm_kms *kms;
72
73 /* subordinate devices, if present: */
74 struct platform_device *hdmi_pdev, *gpu_pdev;
75
76 /* when we have more than one 'msm_gpu' these need to be an array: */
77 struct msm_gpu *gpu;
78 struct msm_file_private *lastctx;
79
80 struct drm_fb_helper *fbdev;
81
82 uint32_t next_fence, completed_fence;
83 wait_queue_head_t fence_event;
84
85 /* list of GEM objects: */
86 struct list_head inactive_list;
87
88 struct workqueue_struct *wq;
89
90 /* callbacks deferred until bo is inactive: */
91 struct list_head fence_cbs;
92
93 /* registered MMUs: */
94 unsigned int num_mmus;
95 struct msm_mmu *mmus[NUM_DOMAINS];
96
97 unsigned int num_planes;
98 struct drm_plane *planes[8];
99
100 unsigned int num_crtcs;
101 struct drm_crtc *crtcs[8];
102
103 unsigned int num_encoders;
104 struct drm_encoder *encoders[8];
105
106 unsigned int num_bridges;
107 struct drm_bridge *bridges[8];
108
109 unsigned int num_connectors;
110 struct drm_connector *connectors[8];
111
112 /* VRAM carveout, used when no IOMMU: */
113 struct {
114 unsigned long size;
115 dma_addr_t paddr;
116 /* NOTE: mm managed at the page level, size is in # of pages
117 * and position mm_node->start is in # of pages:
118 */
119 struct drm_mm mm;
120 } vram;
121};
122
123struct msm_format {
124 uint32_t pixel_format;
125};
126
127/* callback from wq once fence has passed: */
128struct msm_fence_cb {
129 struct work_struct work;
130 uint32_t fence;
131 void (*func)(struct msm_fence_cb *cb);
132};
133
134void __msm_fence_worker(struct work_struct *work);
135
136#define INIT_FENCE_CB(_cb, _func) do { \
137 INIT_WORK(&(_cb)->work, __msm_fence_worker); \
138 (_cb)->func = _func; \
139 } while (0)
140
141int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu);
142
143int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,
144 struct timespec *timeout);
145void msm_update_fence(struct drm_device *dev, uint32_t fence);
146
147int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
148 struct drm_file *file);
149
150int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
151int msm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
152uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
153int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,
154 uint32_t *iova);
155int msm_gem_get_iova(struct drm_gem_object *obj, int id, uint32_t *iova);
156struct page **msm_gem_get_pages(struct drm_gem_object *obj);
157void msm_gem_put_pages(struct drm_gem_object *obj);
158void msm_gem_put_iova(struct drm_gem_object *obj, int id);
159int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
160 struct drm_mode_create_dumb *args);
161int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
162 uint32_t handle, uint64_t *offset);
163struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
164void *msm_gem_prime_vmap(struct drm_gem_object *obj);
165void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
166struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
167 size_t size, struct sg_table *sg);
168int msm_gem_prime_pin(struct drm_gem_object *obj);
169void msm_gem_prime_unpin(struct drm_gem_object *obj);
170void *msm_gem_vaddr_locked(struct drm_gem_object *obj);
171void *msm_gem_vaddr(struct drm_gem_object *obj);
172int msm_gem_queue_inactive_cb(struct drm_gem_object *obj,
173 struct msm_fence_cb *cb);
174void msm_gem_move_to_active(struct drm_gem_object *obj,
175 struct msm_gpu *gpu, bool write, uint32_t fence);
176void msm_gem_move_to_inactive(struct drm_gem_object *obj);
177int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op,
178 struct timespec *timeout);
179int msm_gem_cpu_fini(struct drm_gem_object *obj);
180void msm_gem_free_object(struct drm_gem_object *obj);
181int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
182 uint32_t size, uint32_t flags, uint32_t *handle);
183struct drm_gem_object *msm_gem_new(struct drm_device *dev,
184 uint32_t size, uint32_t flags);
185struct drm_gem_object *msm_gem_import(struct drm_device *dev,
186 uint32_t size, struct sg_table *sgt);
187
188struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
189const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
190struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
191 struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
192struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
193 struct drm_file *file, struct drm_mode_fb_cmd2 *mode_cmd);
194
195struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
196
197struct hdmi;
198struct hdmi *hdmi_init(struct drm_device *dev, struct drm_encoder *encoder);
199irqreturn_t hdmi_irq(int irq, void *dev_id);
200void __init hdmi_register(void);
201void __exit hdmi_unregister(void);
202
203#ifdef CONFIG_DEBUG_FS
204void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
205void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
206void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
207#endif
208
209void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
210 const char *dbgname);
211void msm_writel(u32 data, void __iomem *addr);
212u32 msm_readl(const void __iomem *addr);
213
214#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
215#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
216
217static inline bool fence_completed(struct drm_device *dev, uint32_t fence)
218{
219 struct msm_drm_private *priv = dev->dev_private;
220 return priv->completed_fence >= fence;
221}
222
223static inline int align_pitch(int width, int bpp)
224{
225 int bytespp = (bpp + 7) / 8;
226 /* adreno needs pitch aligned to 32 pixels: */
227 return bytespp * ALIGN(width, 32);
228}
229
230/* for the generated headers: */
231#define INVALID_IDX(idx) ({BUG(); 0;})
232#define fui(x) ({BUG(); 0;})
233#define util_float_to_half(x) ({BUG(); 0;})
234
235
236#define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
237
238/* for conditionally setting boolean flag(s): */
239#define COND(bool, val) ((bool) ? (val) : 0)
240
241
242#endif /* __MSM_DRV_H__ */