tjh.dev
Linux kernel mirror (for testing)
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linux
1/*
2 * ARM Ltd. Versatile Express
3 *
4 * Motherboard Express uATX
5 * V2M-P1
6 *
7 * HBI-0190D
8 *
9 * Original memory map ("Legacy memory map" in the board's
10 * Technical Reference Manual)
11 *
12 * WARNING! The hardware described in this file is independent from the
13 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
14 * correspondence between the two configurations.
15 *
16 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
17 * CHANGES TO vexpress-v2m-rs1.dtsi!
18 */
19
20 motherboard {
21 model = "V2M-P1";
22 arm,hbi = <0x190>;
23 arm,vexpress,site = <0>;
24 compatible = "arm,vexpress,v2m-p1", "simple-bus";
25 #address-cells = <2>; /* SMB chipselect number and offset */
26 #size-cells = <1>;
27 #interrupt-cells = <1>;
28 ranges;
29
30 flash@0,00000000 {
31 compatible = "arm,vexpress-flash", "cfi-flash";
32 reg = <0 0x00000000 0x04000000>,
33 <1 0x00000000 0x04000000>;
34 bank-width = <4>;
35 };
36
37 psram@2,00000000 {
38 compatible = "arm,vexpress-psram", "mtd-ram";
39 reg = <2 0x00000000 0x02000000>;
40 bank-width = <4>;
41 };
42
43 vram@3,00000000 {
44 compatible = "arm,vexpress-vram";
45 reg = <3 0x00000000 0x00800000>;
46 };
47
48 ethernet@3,02000000 {
49 compatible = "smsc,lan9118", "smsc,lan9115";
50 reg = <3 0x02000000 0x10000>;
51 interrupts = <15>;
52 phy-mode = "mii";
53 reg-io-width = <4>;
54 smsc,irq-active-high;
55 smsc,irq-push-pull;
56 vdd33a-supply = <&v2m_fixed_3v3>;
57 vddvario-supply = <&v2m_fixed_3v3>;
58 };
59
60 usb@3,03000000 {
61 compatible = "nxp,usb-isp1761";
62 reg = <3 0x03000000 0x20000>;
63 interrupts = <16>;
64 port1-otg;
65 };
66
67 iofpga@7,00000000 {
68 compatible = "arm,amba-bus", "simple-bus";
69 #address-cells = <1>;
70 #size-cells = <1>;
71 ranges = <0 7 0 0x20000>;
72
73 v2m_sysreg: sysreg@00000 {
74 compatible = "arm,vexpress-sysreg";
75 reg = <0x00000 0x1000>;
76 gpio-controller;
77 #gpio-cells = <2>;
78 };
79
80 v2m_sysctl: sysctl@01000 {
81 compatible = "arm,sp810", "arm,primecell";
82 reg = <0x01000 0x1000>;
83 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
84 clock-names = "refclk", "timclk", "apb_pclk";
85 #clock-cells = <1>;
86 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
87 };
88
89 /* PCI-E I2C bus */
90 v2m_i2c_pcie: i2c@02000 {
91 compatible = "arm,versatile-i2c";
92 reg = <0x02000 0x1000>;
93
94 #address-cells = <1>;
95 #size-cells = <0>;
96
97 pcie-switch@60 {
98 compatible = "idt,89hpes32h8";
99 reg = <0x60>;
100 };
101 };
102
103 aaci@04000 {
104 compatible = "arm,pl041", "arm,primecell";
105 reg = <0x04000 0x1000>;
106 interrupts = <11>;
107 clocks = <&smbclk>;
108 clock-names = "apb_pclk";
109 };
110
111 mmci@05000 {
112 compatible = "arm,pl180", "arm,primecell";
113 reg = <0x05000 0x1000>;
114 interrupts = <9 10>;
115 cd-gpios = <&v2m_sysreg 0 0>;
116 wp-gpios = <&v2m_sysreg 1 0>;
117 max-frequency = <12000000>;
118 vmmc-supply = <&v2m_fixed_3v3>;
119 clocks = <&v2m_clk24mhz>, <&smbclk>;
120 clock-names = "mclk", "apb_pclk";
121 };
122
123 kmi@06000 {
124 compatible = "arm,pl050", "arm,primecell";
125 reg = <0x06000 0x1000>;
126 interrupts = <12>;
127 clocks = <&v2m_clk24mhz>, <&smbclk>;
128 clock-names = "KMIREFCLK", "apb_pclk";
129 };
130
131 kmi@07000 {
132 compatible = "arm,pl050", "arm,primecell";
133 reg = <0x07000 0x1000>;
134 interrupts = <13>;
135 clocks = <&v2m_clk24mhz>, <&smbclk>;
136 clock-names = "KMIREFCLK", "apb_pclk";
137 };
138
139 v2m_serial0: uart@09000 {
140 compatible = "arm,pl011", "arm,primecell";
141 reg = <0x09000 0x1000>;
142 interrupts = <5>;
143 clocks = <&v2m_oscclk2>, <&smbclk>;
144 clock-names = "uartclk", "apb_pclk";
145 };
146
147 v2m_serial1: uart@0a000 {
148 compatible = "arm,pl011", "arm,primecell";
149 reg = <0x0a000 0x1000>;
150 interrupts = <6>;
151 clocks = <&v2m_oscclk2>, <&smbclk>;
152 clock-names = "uartclk", "apb_pclk";
153 };
154
155 v2m_serial2: uart@0b000 {
156 compatible = "arm,pl011", "arm,primecell";
157 reg = <0x0b000 0x1000>;
158 interrupts = <7>;
159 clocks = <&v2m_oscclk2>, <&smbclk>;
160 clock-names = "uartclk", "apb_pclk";
161 };
162
163 v2m_serial3: uart@0c000 {
164 compatible = "arm,pl011", "arm,primecell";
165 reg = <0x0c000 0x1000>;
166 interrupts = <8>;
167 clocks = <&v2m_oscclk2>, <&smbclk>;
168 clock-names = "uartclk", "apb_pclk";
169 };
170
171 wdt@0f000 {
172 compatible = "arm,sp805", "arm,primecell";
173 reg = <0x0f000 0x1000>;
174 interrupts = <0>;
175 clocks = <&v2m_refclk32khz>, <&smbclk>;
176 clock-names = "wdogclk", "apb_pclk";
177 };
178
179 v2m_timer01: timer@11000 {
180 compatible = "arm,sp804", "arm,primecell";
181 reg = <0x11000 0x1000>;
182 interrupts = <2>;
183 clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&smbclk>;
184 clock-names = "timclken1", "timclken2", "apb_pclk";
185 };
186
187 v2m_timer23: timer@12000 {
188 compatible = "arm,sp804", "arm,primecell";
189 reg = <0x12000 0x1000>;
190 interrupts = <3>;
191 clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&smbclk>;
192 clock-names = "timclken1", "timclken2", "apb_pclk";
193 };
194
195 /* DVI I2C bus */
196 v2m_i2c_dvi: i2c@16000 {
197 compatible = "arm,versatile-i2c";
198 reg = <0x16000 0x1000>;
199
200 #address-cells = <1>;
201 #size-cells = <0>;
202
203 dvi-transmitter@39 {
204 compatible = "sil,sii9022-tpi", "sil,sii9022";
205 reg = <0x39>;
206 };
207
208 dvi-transmitter@60 {
209 compatible = "sil,sii9022-cpi", "sil,sii9022";
210 reg = <0x60>;
211 };
212 };
213
214 rtc@17000 {
215 compatible = "arm,pl031", "arm,primecell";
216 reg = <0x17000 0x1000>;
217 interrupts = <4>;
218 clocks = <&smbclk>;
219 clock-names = "apb_pclk";
220 };
221
222 compact-flash@1a000 {
223 compatible = "arm,vexpress-cf", "ata-generic";
224 reg = <0x1a000 0x100
225 0x1a100 0xf00>;
226 reg-shift = <2>;
227 };
228
229 clcd@1f000 {
230 compatible = "arm,pl111", "arm,primecell";
231 reg = <0x1f000 0x1000>;
232 interrupts = <14>;
233 clocks = <&v2m_oscclk1>, <&smbclk>;
234 clock-names = "clcdclk", "apb_pclk";
235 };
236 };
237
238 v2m_fixed_3v3: fixedregulator@0 {
239 compatible = "regulator-fixed";
240 regulator-name = "3V3";
241 regulator-min-microvolt = <3300000>;
242 regulator-max-microvolt = <3300000>;
243 regulator-always-on;
244 };
245
246 v2m_clk24mhz: clk24mhz {
247 compatible = "fixed-clock";
248 #clock-cells = <0>;
249 clock-frequency = <24000000>;
250 clock-output-names = "v2m:clk24mhz";
251 };
252
253 v2m_refclk1mhz: refclk1mhz {
254 compatible = "fixed-clock";
255 #clock-cells = <0>;
256 clock-frequency = <1000000>;
257 clock-output-names = "v2m:refclk1mhz";
258 };
259
260 v2m_refclk32khz: refclk32khz {
261 compatible = "fixed-clock";
262 #clock-cells = <0>;
263 clock-frequency = <32768>;
264 clock-output-names = "v2m:refclk32khz";
265 };
266
267 mcc {
268 compatible = "arm,vexpress,config-bus";
269 arm,vexpress,config-bridge = <&v2m_sysreg>;
270
271 osc@0 {
272 /* MCC static memory clock */
273 compatible = "arm,vexpress-osc";
274 arm,vexpress-sysreg,func = <1 0>;
275 freq-range = <25000000 60000000>;
276 #clock-cells = <0>;
277 clock-output-names = "v2m:oscclk0";
278 };
279
280 v2m_oscclk1: osc@1 {
281 /* CLCD clock */
282 compatible = "arm,vexpress-osc";
283 arm,vexpress-sysreg,func = <1 1>;
284 freq-range = <23750000 63500000>;
285 #clock-cells = <0>;
286 clock-output-names = "v2m:oscclk1";
287 };
288
289 v2m_oscclk2: osc@2 {
290 /* IO FPGA peripheral clock */
291 compatible = "arm,vexpress-osc";
292 arm,vexpress-sysreg,func = <1 2>;
293 freq-range = <24000000 24000000>;
294 #clock-cells = <0>;
295 clock-output-names = "v2m:oscclk2";
296 };
297
298 volt@0 {
299 /* Logic level voltage */
300 compatible = "arm,vexpress-volt";
301 arm,vexpress-sysreg,func = <2 0>;
302 regulator-name = "VIO";
303 regulator-always-on;
304 label = "VIO";
305 };
306
307 temp@0 {
308 /* MCC internal operating temperature */
309 compatible = "arm,vexpress-temp";
310 arm,vexpress-sysreg,func = <4 0>;
311 label = "MCC";
312 };
313
314 reset@0 {
315 compatible = "arm,vexpress-reset";
316 arm,vexpress-sysreg,func = <5 0>;
317 };
318
319 muxfpga@0 {
320 compatible = "arm,vexpress-muxfpga";
321 arm,vexpress-sysreg,func = <7 0>;
322 };
323
324 shutdown@0 {
325 compatible = "arm,vexpress-shutdown";
326 arm,vexpress-sysreg,func = <8 0>;
327 };
328
329 reboot@0 {
330 compatible = "arm,vexpress-reboot";
331 arm,vexpress-sysreg,func = <9 0>;
332 };
333
334 dvimode@0 {
335 compatible = "arm,vexpress-dvimode";
336 arm,vexpress-sysreg,func = <11 0>;
337 };
338 };
339 };