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Linux kernel mirror (for testing)
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1/*
2 * Samsung's Exynos4 SoC series common device tree source
3 *
4 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2010-2011 Linaro Ltd.
7 * www.linaro.org
8 *
9 * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
10 * SoCs from Exynos4 series can include this file and provide values for SoCs
11 * specfic bindings.
12 *
13 * Note: This file does not include device nodes for all the controllers in
14 * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
15 * nodes can be added to this file.
16 *
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 */
21
22#include <dt-bindings/clock/exynos4.h>
23#include "skeleton.dtsi"
24
25/ {
26 interrupt-parent = <&gic>;
27
28 aliases {
29 spi0 = &spi_0;
30 spi1 = &spi_1;
31 spi2 = &spi_2;
32 i2c0 = &i2c_0;
33 i2c1 = &i2c_1;
34 i2c2 = &i2c_2;
35 i2c3 = &i2c_3;
36 i2c4 = &i2c_4;
37 i2c5 = &i2c_5;
38 i2c6 = &i2c_6;
39 i2c7 = &i2c_7;
40 csis0 = &csis_0;
41 csis1 = &csis_1;
42 fimc0 = &fimc_0;
43 fimc1 = &fimc_1;
44 fimc2 = &fimc_2;
45 fimc3 = &fimc_3;
46 };
47
48 chipid@10000000 {
49 compatible = "samsung,exynos4210-chipid";
50 reg = <0x10000000 0x100>;
51 };
52
53 mipi_phy: video-phy@10020710 {
54 compatible = "samsung,s5pv210-mipi-video-phy";
55 reg = <0x10020710 8>;
56 #phy-cells = <1>;
57 };
58
59 pd_mfc: mfc-power-domain@10023C40 {
60 compatible = "samsung,exynos4210-pd";
61 reg = <0x10023C40 0x20>;
62 };
63
64 pd_g3d: g3d-power-domain@10023C60 {
65 compatible = "samsung,exynos4210-pd";
66 reg = <0x10023C60 0x20>;
67 };
68
69 pd_lcd0: lcd0-power-domain@10023C80 {
70 compatible = "samsung,exynos4210-pd";
71 reg = <0x10023C80 0x20>;
72 };
73
74 pd_tv: tv-power-domain@10023C20 {
75 compatible = "samsung,exynos4210-pd";
76 reg = <0x10023C20 0x20>;
77 };
78
79 pd_cam: cam-power-domain@10023C00 {
80 compatible = "samsung,exynos4210-pd";
81 reg = <0x10023C00 0x20>;
82 };
83
84 pd_gps: gps-power-domain@10023CE0 {
85 compatible = "samsung,exynos4210-pd";
86 reg = <0x10023CE0 0x20>;
87 };
88
89 pd_gps_alive: gps-alive-power-domain@10023D00 {
90 compatible = "samsung,exynos4210-pd";
91 reg = <0x10023D00 0x20>;
92 };
93
94 gic: interrupt-controller@10490000 {
95 compatible = "arm,cortex-a9-gic";
96 #interrupt-cells = <3>;
97 interrupt-controller;
98 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
99 };
100
101 combiner: interrupt-controller@10440000 {
102 compatible = "samsung,exynos4210-combiner";
103 #interrupt-cells = <2>;
104 interrupt-controller;
105 reg = <0x10440000 0x1000>;
106 };
107
108 sys_reg: syscon@10010000 {
109 compatible = "samsung,exynos4-sysreg", "syscon";
110 reg = <0x10010000 0x400>;
111 };
112
113 dsi_0: dsi@11C80000 {
114 compatible = "samsung,exynos4210-mipi-dsi";
115 reg = <0x11C80000 0x10000>;
116 interrupts = <0 79 0>;
117 samsung,power-domain = <&pd_lcd0>;
118 phys = <&mipi_phy 1>;
119 phy-names = "dsim";
120 clocks = <&clock 286>, <&clock 143>;
121 clock-names = "bus_clk", "pll_clk";
122 status = "disabled";
123 #address-cells = <1>;
124 #size-cells = <0>;
125 };
126
127 camera {
128 compatible = "samsung,fimc", "simple-bus";
129 status = "disabled";
130 #address-cells = <1>;
131 #size-cells = <1>;
132 ranges;
133
134 clock_cam: clock-controller {
135 #clock-cells = <1>;
136 };
137
138 fimc_0: fimc@11800000 {
139 compatible = "samsung,exynos4210-fimc";
140 reg = <0x11800000 0x1000>;
141 interrupts = <0 84 0>;
142 clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
143 clock-names = "fimc", "sclk_fimc";
144 samsung,power-domain = <&pd_cam>;
145 samsung,sysreg = <&sys_reg>;
146 status = "disabled";
147 };
148
149 fimc_1: fimc@11810000 {
150 compatible = "samsung,exynos4210-fimc";
151 reg = <0x11810000 0x1000>;
152 interrupts = <0 85 0>;
153 clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
154 clock-names = "fimc", "sclk_fimc";
155 samsung,power-domain = <&pd_cam>;
156 samsung,sysreg = <&sys_reg>;
157 status = "disabled";
158 };
159
160 fimc_2: fimc@11820000 {
161 compatible = "samsung,exynos4210-fimc";
162 reg = <0x11820000 0x1000>;
163 interrupts = <0 86 0>;
164 clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
165 clock-names = "fimc", "sclk_fimc";
166 samsung,power-domain = <&pd_cam>;
167 samsung,sysreg = <&sys_reg>;
168 status = "disabled";
169 };
170
171 fimc_3: fimc@11830000 {
172 compatible = "samsung,exynos4210-fimc";
173 reg = <0x11830000 0x1000>;
174 interrupts = <0 87 0>;
175 clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
176 clock-names = "fimc", "sclk_fimc";
177 samsung,power-domain = <&pd_cam>;
178 samsung,sysreg = <&sys_reg>;
179 status = "disabled";
180 };
181
182 csis_0: csis@11880000 {
183 compatible = "samsung,exynos4210-csis";
184 reg = <0x11880000 0x4000>;
185 interrupts = <0 78 0>;
186 clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
187 clock-names = "csis", "sclk_csis";
188 bus-width = <4>;
189 samsung,power-domain = <&pd_cam>;
190 phys = <&mipi_phy 0>;
191 phy-names = "csis";
192 status = "disabled";
193 #address-cells = <1>;
194 #size-cells = <0>;
195 };
196
197 csis_1: csis@11890000 {
198 compatible = "samsung,exynos4210-csis";
199 reg = <0x11890000 0x4000>;
200 interrupts = <0 80 0>;
201 clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
202 clock-names = "csis", "sclk_csis";
203 bus-width = <2>;
204 samsung,power-domain = <&pd_cam>;
205 phys = <&mipi_phy 2>;
206 phy-names = "csis";
207 status = "disabled";
208 #address-cells = <1>;
209 #size-cells = <0>;
210 };
211 };
212
213 watchdog@10060000 {
214 compatible = "samsung,s3c2410-wdt";
215 reg = <0x10060000 0x100>;
216 interrupts = <0 43 0>;
217 clocks = <&clock CLK_WDT>;
218 clock-names = "watchdog";
219 status = "disabled";
220 };
221
222 rtc@10070000 {
223 compatible = "samsung,s3c6410-rtc";
224 reg = <0x10070000 0x100>;
225 interrupts = <0 44 0>, <0 45 0>;
226 clocks = <&clock CLK_RTC>;
227 clock-names = "rtc";
228 status = "disabled";
229 };
230
231 keypad@100A0000 {
232 compatible = "samsung,s5pv210-keypad";
233 reg = <0x100A0000 0x100>;
234 interrupts = <0 109 0>;
235 clocks = <&clock CLK_KEYIF>;
236 clock-names = "keypad";
237 status = "disabled";
238 };
239
240 sdhci@12510000 {
241 compatible = "samsung,exynos4210-sdhci";
242 reg = <0x12510000 0x100>;
243 interrupts = <0 73 0>;
244 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
245 clock-names = "hsmmc", "mmc_busclk.2";
246 status = "disabled";
247 };
248
249 sdhci@12520000 {
250 compatible = "samsung,exynos4210-sdhci";
251 reg = <0x12520000 0x100>;
252 interrupts = <0 74 0>;
253 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
254 clock-names = "hsmmc", "mmc_busclk.2";
255 status = "disabled";
256 };
257
258 sdhci@12530000 {
259 compatible = "samsung,exynos4210-sdhci";
260 reg = <0x12530000 0x100>;
261 interrupts = <0 75 0>;
262 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
263 clock-names = "hsmmc", "mmc_busclk.2";
264 status = "disabled";
265 };
266
267 sdhci@12540000 {
268 compatible = "samsung,exynos4210-sdhci";
269 reg = <0x12540000 0x100>;
270 interrupts = <0 76 0>;
271 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
272 clock-names = "hsmmc", "mmc_busclk.2";
273 status = "disabled";
274 };
275
276 ehci@12580000 {
277 compatible = "samsung,exynos4210-ehci";
278 reg = <0x12580000 0x100>;
279 interrupts = <0 70 0>;
280 clocks = <&clock CLK_USB_HOST>;
281 clock-names = "usbhost";
282 status = "disabled";
283 };
284
285 ohci@12590000 {
286 compatible = "samsung,exynos4210-ohci";
287 reg = <0x12590000 0x100>;
288 interrupts = <0 70 0>;
289 clocks = <&clock CLK_USB_HOST>;
290 clock-names = "usbhost";
291 status = "disabled";
292 };
293
294 mfc: codec@13400000 {
295 compatible = "samsung,mfc-v5";
296 reg = <0x13400000 0x10000>;
297 interrupts = <0 94 0>;
298 samsung,power-domain = <&pd_mfc>;
299 clocks = <&clock CLK_MFC>;
300 clock-names = "mfc";
301 status = "disabled";
302 };
303
304 serial@13800000 {
305 compatible = "samsung,exynos4210-uart";
306 reg = <0x13800000 0x100>;
307 interrupts = <0 52 0>;
308 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
309 clock-names = "uart", "clk_uart_baud0";
310 status = "disabled";
311 };
312
313 serial@13810000 {
314 compatible = "samsung,exynos4210-uart";
315 reg = <0x13810000 0x100>;
316 interrupts = <0 53 0>;
317 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
318 clock-names = "uart", "clk_uart_baud0";
319 status = "disabled";
320 };
321
322 serial@13820000 {
323 compatible = "samsung,exynos4210-uart";
324 reg = <0x13820000 0x100>;
325 interrupts = <0 54 0>;
326 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
327 clock-names = "uart", "clk_uart_baud0";
328 status = "disabled";
329 };
330
331 serial@13830000 {
332 compatible = "samsung,exynos4210-uart";
333 reg = <0x13830000 0x100>;
334 interrupts = <0 55 0>;
335 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
336 clock-names = "uart", "clk_uart_baud0";
337 status = "disabled";
338 };
339
340 i2c_0: i2c@13860000 {
341 #address-cells = <1>;
342 #size-cells = <0>;
343 compatible = "samsung,s3c2440-i2c";
344 reg = <0x13860000 0x100>;
345 interrupts = <0 58 0>;
346 clocks = <&clock CLK_I2C0>;
347 clock-names = "i2c";
348 pinctrl-names = "default";
349 pinctrl-0 = <&i2c0_bus>;
350 status = "disabled";
351 };
352
353 i2c_1: i2c@13870000 {
354 #address-cells = <1>;
355 #size-cells = <0>;
356 compatible = "samsung,s3c2440-i2c";
357 reg = <0x13870000 0x100>;
358 interrupts = <0 59 0>;
359 clocks = <&clock CLK_I2C1>;
360 clock-names = "i2c";
361 pinctrl-names = "default";
362 pinctrl-0 = <&i2c1_bus>;
363 status = "disabled";
364 };
365
366 i2c_2: i2c@13880000 {
367 #address-cells = <1>;
368 #size-cells = <0>;
369 compatible = "samsung,s3c2440-i2c";
370 reg = <0x13880000 0x100>;
371 interrupts = <0 60 0>;
372 clocks = <&clock CLK_I2C2>;
373 clock-names = "i2c";
374 status = "disabled";
375 };
376
377 i2c_3: i2c@13890000 {
378 #address-cells = <1>;
379 #size-cells = <0>;
380 compatible = "samsung,s3c2440-i2c";
381 reg = <0x13890000 0x100>;
382 interrupts = <0 61 0>;
383 clocks = <&clock CLK_I2C3>;
384 clock-names = "i2c";
385 status = "disabled";
386 };
387
388 i2c_4: i2c@138A0000 {
389 #address-cells = <1>;
390 #size-cells = <0>;
391 compatible = "samsung,s3c2440-i2c";
392 reg = <0x138A0000 0x100>;
393 interrupts = <0 62 0>;
394 clocks = <&clock CLK_I2C4>;
395 clock-names = "i2c";
396 status = "disabled";
397 };
398
399 i2c_5: i2c@138B0000 {
400 #address-cells = <1>;
401 #size-cells = <0>;
402 compatible = "samsung,s3c2440-i2c";
403 reg = <0x138B0000 0x100>;
404 interrupts = <0 63 0>;
405 clocks = <&clock CLK_I2C5>;
406 clock-names = "i2c";
407 status = "disabled";
408 };
409
410 i2c_6: i2c@138C0000 {
411 #address-cells = <1>;
412 #size-cells = <0>;
413 compatible = "samsung,s3c2440-i2c";
414 reg = <0x138C0000 0x100>;
415 interrupts = <0 64 0>;
416 clocks = <&clock CLK_I2C6>;
417 clock-names = "i2c";
418 status = "disabled";
419 };
420
421 i2c_7: i2c@138D0000 {
422 #address-cells = <1>;
423 #size-cells = <0>;
424 compatible = "samsung,s3c2440-i2c";
425 reg = <0x138D0000 0x100>;
426 interrupts = <0 65 0>;
427 clocks = <&clock CLK_I2C7>;
428 clock-names = "i2c";
429 status = "disabled";
430 };
431
432 spi_0: spi@13920000 {
433 compatible = "samsung,exynos4210-spi";
434 reg = <0x13920000 0x100>;
435 interrupts = <0 66 0>;
436 dmas = <&pdma0 7>, <&pdma0 6>;
437 dma-names = "tx", "rx";
438 #address-cells = <1>;
439 #size-cells = <0>;
440 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
441 clock-names = "spi", "spi_busclk0";
442 pinctrl-names = "default";
443 pinctrl-0 = <&spi0_bus>;
444 status = "disabled";
445 };
446
447 spi_1: spi@13930000 {
448 compatible = "samsung,exynos4210-spi";
449 reg = <0x13930000 0x100>;
450 interrupts = <0 67 0>;
451 dmas = <&pdma1 7>, <&pdma1 6>;
452 dma-names = "tx", "rx";
453 #address-cells = <1>;
454 #size-cells = <0>;
455 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
456 clock-names = "spi", "spi_busclk0";
457 pinctrl-names = "default";
458 pinctrl-0 = <&spi1_bus>;
459 status = "disabled";
460 };
461
462 spi_2: spi@13940000 {
463 compatible = "samsung,exynos4210-spi";
464 reg = <0x13940000 0x100>;
465 interrupts = <0 68 0>;
466 dmas = <&pdma0 9>, <&pdma0 8>;
467 dma-names = "tx", "rx";
468 #address-cells = <1>;
469 #size-cells = <0>;
470 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
471 clock-names = "spi", "spi_busclk0";
472 pinctrl-names = "default";
473 pinctrl-0 = <&spi2_bus>;
474 status = "disabled";
475 };
476
477 pwm@139D0000 {
478 compatible = "samsung,exynos4210-pwm";
479 reg = <0x139D0000 0x1000>;
480 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
481 clocks = <&clock CLK_PWM>;
482 clock-names = "timers";
483 #pwm-cells = <2>;
484 status = "disabled";
485 };
486
487 amba {
488 #address-cells = <1>;
489 #size-cells = <1>;
490 compatible = "arm,amba-bus";
491 interrupt-parent = <&gic>;
492 ranges;
493
494 pdma0: pdma@12680000 {
495 compatible = "arm,pl330", "arm,primecell";
496 reg = <0x12680000 0x1000>;
497 interrupts = <0 35 0>;
498 clocks = <&clock CLK_PDMA0>;
499 clock-names = "apb_pclk";
500 #dma-cells = <1>;
501 #dma-channels = <8>;
502 #dma-requests = <32>;
503 };
504
505 pdma1: pdma@12690000 {
506 compatible = "arm,pl330", "arm,primecell";
507 reg = <0x12690000 0x1000>;
508 interrupts = <0 36 0>;
509 clocks = <&clock CLK_PDMA1>;
510 clock-names = "apb_pclk";
511 #dma-cells = <1>;
512 #dma-channels = <8>;
513 #dma-requests = <32>;
514 };
515
516 mdma1: mdma@12850000 {
517 compatible = "arm,pl330", "arm,primecell";
518 reg = <0x12850000 0x1000>;
519 interrupts = <0 34 0>;
520 clocks = <&clock CLK_MDMA>;
521 clock-names = "apb_pclk";
522 #dma-cells = <1>;
523 #dma-channels = <8>;
524 #dma-requests = <1>;
525 };
526 };
527
528 fimd: fimd@11c00000 {
529 compatible = "samsung,exynos4210-fimd";
530 interrupt-parent = <&combiner>;
531 reg = <0x11c00000 0x20000>;
532 interrupt-names = "fifo", "vsync", "lcd_sys";
533 interrupts = <11 0>, <11 1>, <11 2>;
534 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
535 clock-names = "sclk_fimd", "fimd";
536 samsung,power-domain = <&pd_lcd0>;
537 status = "disabled";
538 };
539};