Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
1/*
2 *
3 * Copyright (C) 2007 Google, Inc.
4 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
5 * Author: Brian Swetland <swetland@google.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_QSD8X50)
19#define MSM_UART1_PHYS 0xA9A00000
20#define MSM_UART2_PHYS 0xA9B00000
21#define MSM_UART3_PHYS 0xA9C00000
22#elif defined(CONFIG_ARCH_MSM7X30)
23#define MSM_UART1_PHYS 0xACA00000
24#define MSM_UART2_PHYS 0xACB00000
25#define MSM_UART3_PHYS 0xACC00000
26#endif
27
28#if defined(CONFIG_DEBUG_MSM_UART1)
29#define MSM_DEBUG_UART_BASE 0xE1000000
30#define MSM_DEBUG_UART_PHYS MSM_UART1_PHYS
31#elif defined(CONFIG_DEBUG_MSM_UART2)
32#define MSM_DEBUG_UART_BASE 0xE1000000
33#define MSM_DEBUG_UART_PHYS MSM_UART2_PHYS
34#elif defined(CONFIG_DEBUG_MSM_UART3)
35#define MSM_DEBUG_UART_BASE 0xE1000000
36#define MSM_DEBUG_UART_PHYS MSM_UART3_PHYS
37#endif
38
39#ifdef CONFIG_DEBUG_MSM8660_UART
40#define MSM_DEBUG_UART_BASE 0xF0040000
41#define MSM_DEBUG_UART_PHYS 0x19C40000
42#endif
43
44#ifdef CONFIG_DEBUG_MSM8960_UART
45#define MSM_DEBUG_UART_BASE 0xF0040000
46#define MSM_DEBUG_UART_PHYS 0x16440000
47#endif
48
49#ifdef CONFIG_DEBUG_MSM8974_UART
50#define MSM_DEBUG_UART_BASE 0xFA71E000
51#define MSM_DEBUG_UART_PHYS 0xF991E000
52#endif
53
54 .macro addruart, rp, rv, tmp
55#ifdef MSM_DEBUG_UART_PHYS
56 ldr \rp, =MSM_DEBUG_UART_PHYS
57 ldr \rv, =MSM_DEBUG_UART_BASE
58#endif
59 .endm
60
61 .macro senduart, rd, rx
62#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
63 @ Write the 1 character to UARTDM_TF
64 str \rd, [\rx, #0x70]
65#else
66 str \rd, [\rx, #0x0C]
67#endif
68 .endm
69
70 .macro waituart, rd, rx
71#ifdef CONFIG_MSM_HAS_DEBUG_UART_HS
72 @ check for TX_EMT in UARTDM_SR
73 ldr \rd, [\rx, #0x08]
74 tst \rd, #0x08
75 bne 1002f
76 @ wait for TXREADY in UARTDM_ISR
771001: ldr \rd, [\rx, #0x14]
78 tst \rd, #0x80
79 beq 1001b
801002:
81 @ Clear TX_READY by writing to the UARTDM_CR register
82 mov \rd, #0x300
83 str \rd, [\rx, #0x10]
84 @ Write 0x1 to NCF register
85 mov \rd, #0x1
86 str \rd, [\rx, #0x40]
87 @ UARTDM reg. Read to induce delay
88 ldr \rd, [\rx, #0x08]
89#else
90 @ wait for TX_READY
911001: ldr \rd, [\rx, #0x08]
92 tst \rd, #0x04
93 beq 1001b
94#endif
95 .endm
96
97 .macro busyuart, rd, rx
98 .endm