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1/*
2 * da9052 declarations for DA9052 PMICs.
3 *
4 * Copyright(c) 2011 Dialog Semiconductor Ltd.
5 *
6 * Author: David Dajun Chen <dchen@diasemi.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
24#ifndef __MFD_DA9052_DA9052_H
25#define __MFD_DA9052_DA9052_H
26
27#include <linux/interrupt.h>
28#include <linux/regmap.h>
29#include <linux/slab.h>
30#include <linux/completion.h>
31#include <linux/list.h>
32#include <linux/mfd/core.h>
33
34#include <linux/mfd/da9052/reg.h>
35
36/* Common - HWMON Channel Definations */
37#define DA9052_ADC_VDDOUT 0
38#define DA9052_ADC_ICH 1
39#define DA9052_ADC_TBAT 2
40#define DA9052_ADC_VBAT 3
41#define DA9052_ADC_IN4 4
42#define DA9052_ADC_IN5 5
43#define DA9052_ADC_IN6 6
44#define DA9052_ADC_TSI 7
45#define DA9052_ADC_TJUNC 8
46#define DA9052_ADC_VBBAT 9
47
48#define DA9052_IRQ_DCIN 0
49#define DA9052_IRQ_VBUS 1
50#define DA9052_IRQ_DCINREM 2
51#define DA9052_IRQ_VBUSREM 3
52#define DA9052_IRQ_VDDLOW 4
53#define DA9052_IRQ_ALARM 5
54#define DA9052_IRQ_SEQRDY 6
55#define DA9052_IRQ_COMP1V2 7
56#define DA9052_IRQ_NONKEY 8
57#define DA9052_IRQ_IDFLOAT 9
58#define DA9052_IRQ_IDGND 10
59#define DA9052_IRQ_CHGEND 11
60#define DA9052_IRQ_TBAT 12
61#define DA9052_IRQ_ADC_EOM 13
62#define DA9052_IRQ_PENDOWN 14
63#define DA9052_IRQ_TSIREADY 15
64#define DA9052_IRQ_GPI0 16
65#define DA9052_IRQ_GPI1 17
66#define DA9052_IRQ_GPI2 18
67#define DA9052_IRQ_GPI3 19
68#define DA9052_IRQ_GPI4 20
69#define DA9052_IRQ_GPI5 21
70#define DA9052_IRQ_GPI6 22
71#define DA9052_IRQ_GPI7 23
72#define DA9052_IRQ_GPI8 24
73#define DA9052_IRQ_GPI9 25
74#define DA9052_IRQ_GPI10 26
75#define DA9052_IRQ_GPI11 27
76#define DA9052_IRQ_GPI12 28
77#define DA9052_IRQ_GPI13 29
78#define DA9052_IRQ_GPI14 30
79#define DA9052_IRQ_GPI15 31
80
81enum da9052_chip_id {
82 DA9052,
83 DA9053_AA,
84 DA9053_BA,
85 DA9053_BB,
86};
87
88struct da9052_pdata;
89
90struct da9052 {
91 struct device *dev;
92 struct regmap *regmap;
93
94 struct mutex auxadc_lock;
95 struct completion done;
96
97 int irq_base;
98 struct regmap_irq_chip_data *irq_data;
99 u8 chip_id;
100
101 int chip_irq;
102
103 /* SOC I/O transfer related fixes for DA9052/53 */
104 int (*fix_io) (struct da9052 *da9052, unsigned char reg);
105};
106
107/* ADC API */
108int da9052_adc_manual_read(struct da9052 *da9052, unsigned char channel);
109int da9052_adc_read_temp(struct da9052 *da9052);
110
111/* Device I/O API */
112static inline int da9052_reg_read(struct da9052 *da9052, unsigned char reg)
113{
114 int val, ret;
115
116 ret = regmap_read(da9052->regmap, reg, &val);
117 if (ret < 0)
118 return ret;
119
120 if (da9052->fix_io) {
121 ret = da9052->fix_io(da9052, reg);
122 if (ret < 0)
123 return ret;
124 }
125
126 return val;
127}
128
129static inline int da9052_reg_write(struct da9052 *da9052, unsigned char reg,
130 unsigned char val)
131{
132 int ret;
133
134 ret = regmap_write(da9052->regmap, reg, val);
135 if (ret < 0)
136 return ret;
137
138 if (da9052->fix_io) {
139 ret = da9052->fix_io(da9052, reg);
140 if (ret < 0)
141 return ret;
142 }
143
144 return ret;
145}
146
147static inline int da9052_group_read(struct da9052 *da9052, unsigned char reg,
148 unsigned reg_cnt, unsigned char *val)
149{
150 int ret;
151 unsigned int tmp;
152 int i;
153
154 for (i = 0; i < reg_cnt; i++) {
155 ret = regmap_read(da9052->regmap, reg + i, &tmp);
156 val[i] = (unsigned char)tmp;
157 if (ret < 0)
158 return ret;
159 }
160
161 if (da9052->fix_io) {
162 ret = da9052->fix_io(da9052, reg);
163 if (ret < 0)
164 return ret;
165 }
166
167 return ret;
168}
169
170static inline int da9052_group_write(struct da9052 *da9052, unsigned char reg,
171 unsigned reg_cnt, unsigned char *val)
172{
173 int ret;
174 int i;
175
176 for (i = 0; i < reg_cnt; i++) {
177 ret = regmap_write(da9052->regmap, reg + i, val[i]);
178 if (ret < 0)
179 return ret;
180 }
181
182 if (da9052->fix_io) {
183 ret = da9052->fix_io(da9052, reg);
184 if (ret < 0)
185 return ret;
186 }
187
188 return ret;
189}
190
191static inline int da9052_reg_update(struct da9052 *da9052, unsigned char reg,
192 unsigned char bit_mask,
193 unsigned char reg_val)
194{
195 int ret;
196
197 ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val);
198 if (ret < 0)
199 return ret;
200
201 if (da9052->fix_io) {
202 ret = da9052->fix_io(da9052, reg);
203 if (ret < 0)
204 return ret;
205 }
206
207 return ret;
208}
209
210int da9052_device_init(struct da9052 *da9052, u8 chip_id);
211void da9052_device_exit(struct da9052 *da9052);
212
213extern struct regmap_config da9052_regmap_config;
214
215int da9052_irq_init(struct da9052 *da9052);
216int da9052_irq_exit(struct da9052 *da9052);
217int da9052_request_irq(struct da9052 *da9052, int irq, char *name,
218 irq_handler_t handler, void *data);
219void da9052_free_irq(struct da9052 *da9052, int irq, void *data);
220
221int da9052_enable_irq(struct da9052 *da9052, int irq);
222int da9052_disable_irq(struct da9052 *da9052, int irq);
223int da9052_disable_irq_nosync(struct da9052 *da9052, int irq);
224
225#endif /* __MFD_DA9052_DA9052_H */