tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#ifndef _ASIX_H
24#define _ASIX_H
25
26// #define DEBUG // error path messages, extra info
27// #define VERBOSE // more; success messages
28
29#include <linux/module.h>
30#include <linux/kmod.h>
31#include <linux/init.h>
32#include <linux/netdevice.h>
33#include <linux/etherdevice.h>
34#include <linux/ethtool.h>
35#include <linux/workqueue.h>
36#include <linux/mii.h>
37#include <linux/usb.h>
38#include <linux/crc32.h>
39#include <linux/usb/usbnet.h>
40#include <linux/slab.h>
41#include <linux/if_vlan.h>
42
43#define DRIVER_VERSION "22-Dec-2011"
44#define DRIVER_NAME "asix"
45
46/* ASIX AX8817X based USB 2.0 Ethernet Devices */
47
48#define AX_CMD_SET_SW_MII 0x06
49#define AX_CMD_READ_MII_REG 0x07
50#define AX_CMD_WRITE_MII_REG 0x08
51#define AX_CMD_SET_HW_MII 0x0a
52#define AX_CMD_READ_EEPROM 0x0b
53#define AX_CMD_WRITE_EEPROM 0x0c
54#define AX_CMD_WRITE_ENABLE 0x0d
55#define AX_CMD_WRITE_DISABLE 0x0e
56#define AX_CMD_READ_RX_CTL 0x0f
57#define AX_CMD_WRITE_RX_CTL 0x10
58#define AX_CMD_READ_IPG012 0x11
59#define AX_CMD_WRITE_IPG0 0x12
60#define AX_CMD_WRITE_IPG1 0x13
61#define AX_CMD_READ_NODE_ID 0x13
62#define AX_CMD_WRITE_NODE_ID 0x14
63#define AX_CMD_WRITE_IPG2 0x14
64#define AX_CMD_WRITE_MULTI_FILTER 0x16
65#define AX88172_CMD_READ_NODE_ID 0x17
66#define AX_CMD_READ_PHY_ID 0x19
67#define AX_CMD_READ_MEDIUM_STATUS 0x1a
68#define AX_CMD_WRITE_MEDIUM_MODE 0x1b
69#define AX_CMD_READ_MONITOR_MODE 0x1c
70#define AX_CMD_WRITE_MONITOR_MODE 0x1d
71#define AX_CMD_READ_GPIOS 0x1e
72#define AX_CMD_WRITE_GPIOS 0x1f
73#define AX_CMD_SW_RESET 0x20
74#define AX_CMD_SW_PHY_STATUS 0x21
75#define AX_CMD_SW_PHY_SELECT 0x22
76
77#define AX_PHY_SELECT_MASK (BIT(3) | BIT(2))
78#define AX_PHY_SELECT_INTERNAL 0
79#define AX_PHY_SELECT_EXTERNAL BIT(2)
80
81#define AX_MONITOR_MODE 0x01
82#define AX_MONITOR_LINK 0x02
83#define AX_MONITOR_MAGIC 0x04
84#define AX_MONITOR_HSFS 0x10
85
86/* AX88172 Medium Status Register values */
87#define AX88172_MEDIUM_FD 0x02
88#define AX88172_MEDIUM_TX 0x04
89#define AX88172_MEDIUM_FC 0x10
90#define AX88172_MEDIUM_DEFAULT \
91 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
92
93#define AX_MCAST_FILTER_SIZE 8
94#define AX_MAX_MCAST 64
95
96#define AX_SWRESET_CLEAR 0x00
97#define AX_SWRESET_RR 0x01
98#define AX_SWRESET_RT 0x02
99#define AX_SWRESET_PRTE 0x04
100#define AX_SWRESET_PRL 0x08
101#define AX_SWRESET_BZ 0x10
102#define AX_SWRESET_IPRL 0x20
103#define AX_SWRESET_IPPD 0x40
104
105#define AX88772_IPG0_DEFAULT 0x15
106#define AX88772_IPG1_DEFAULT 0x0c
107#define AX88772_IPG2_DEFAULT 0x12
108
109/* AX88772 & AX88178 Medium Mode Register */
110#define AX_MEDIUM_PF 0x0080
111#define AX_MEDIUM_JFE 0x0040
112#define AX_MEDIUM_TFC 0x0020
113#define AX_MEDIUM_RFC 0x0010
114#define AX_MEDIUM_ENCK 0x0008
115#define AX_MEDIUM_AC 0x0004
116#define AX_MEDIUM_FD 0x0002
117#define AX_MEDIUM_GM 0x0001
118#define AX_MEDIUM_SM 0x1000
119#define AX_MEDIUM_SBP 0x0800
120#define AX_MEDIUM_PS 0x0200
121#define AX_MEDIUM_RE 0x0100
122
123#define AX88178_MEDIUM_DEFAULT \
124 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
125 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
126 AX_MEDIUM_RE)
127
128#define AX88772_MEDIUM_DEFAULT \
129 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
130 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
131 AX_MEDIUM_AC | AX_MEDIUM_RE)
132
133/* AX88772 & AX88178 RX_CTL values */
134#define AX_RX_CTL_SO 0x0080
135#define AX_RX_CTL_AP 0x0020
136#define AX_RX_CTL_AM 0x0010
137#define AX_RX_CTL_AB 0x0008
138#define AX_RX_CTL_SEP 0x0004
139#define AX_RX_CTL_AMALL 0x0002
140#define AX_RX_CTL_PRO 0x0001
141#define AX_RX_CTL_MFB_2048 0x0000
142#define AX_RX_CTL_MFB_4096 0x0100
143#define AX_RX_CTL_MFB_8192 0x0200
144#define AX_RX_CTL_MFB_16384 0x0300
145
146#define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB)
147
148/* GPIO 0 .. 2 toggles */
149#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
150#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
151#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
152#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
153#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
154#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
155#define AX_GPIO_RESERVED 0x40 /* Reserved */
156#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
157
158#define AX_EEPROM_MAGIC 0xdeadbeef
159#define AX_EEPROM_LEN 0x200
160
161/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
162struct asix_data {
163 u8 multi_filter[AX_MCAST_FILTER_SIZE];
164 u8 mac_addr[ETH_ALEN];
165 u8 phymode;
166 u8 ledmode;
167 u8 res;
168};
169
170struct asix_rx_fixup_info {
171 struct sk_buff *ax_skb;
172 u32 header;
173 u16 size;
174 bool split_head;
175};
176
177struct asix_common_private {
178 struct asix_rx_fixup_info rx_fixup_info;
179};
180
181extern const struct driver_info ax88172a_info;
182
183/* ASIX specific flags */
184#define FLAG_EEPROM_MAC (1UL << 0) /* init device MAC from eeprom */
185
186int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
187 u16 size, void *data);
188
189int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
190 u16 size, void *data);
191
192void asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
193 u16 index, u16 size, void *data);
194
195int asix_rx_fixup_internal(struct usbnet *dev, struct sk_buff *skb,
196 struct asix_rx_fixup_info *rx);
197int asix_rx_fixup_common(struct usbnet *dev, struct sk_buff *skb);
198
199struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
200 gfp_t flags);
201
202int asix_set_sw_mii(struct usbnet *dev);
203int asix_set_hw_mii(struct usbnet *dev);
204
205int asix_read_phy_addr(struct usbnet *dev, int internal);
206int asix_get_phy_addr(struct usbnet *dev);
207
208int asix_sw_reset(struct usbnet *dev, u8 flags);
209
210u16 asix_read_rx_ctl(struct usbnet *dev);
211int asix_write_rx_ctl(struct usbnet *dev, u16 mode);
212
213u16 asix_read_medium_status(struct usbnet *dev);
214int asix_write_medium_mode(struct usbnet *dev, u16 mode);
215
216int asix_write_gpio(struct usbnet *dev, u16 value, int sleep);
217
218void asix_set_multicast(struct net_device *net);
219
220int asix_mdio_read(struct net_device *netdev, int phy_id, int loc);
221void asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val);
222
223void asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo);
224int asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo);
225
226int asix_get_eeprom_len(struct net_device *net);
227int asix_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
228 u8 *data);
229int asix_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
230 u8 *data);
231
232void asix_get_drvinfo(struct net_device *net, struct ethtool_drvinfo *info);
233
234int asix_set_mac_address(struct net_device *net, void *p);
235
236#endif /* _ASIX_H */