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1/* 2 * MUSB OTG driver defines 3 * 4 * Copyright 2005 Mentor Graphics Corporation 5 * Copyright (C) 2005-2006 by Texas Instruments 6 * Copyright (C) 2006-2007 Nokia Corporation 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 20 * 02110-1301 USA 21 * 22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35#ifndef __MUSB_CORE_H__ 36#define __MUSB_CORE_H__ 37 38#include <linux/slab.h> 39#include <linux/list.h> 40#include <linux/interrupt.h> 41#include <linux/errno.h> 42#include <linux/timer.h> 43#include <linux/device.h> 44#include <linux/usb/ch9.h> 45#include <linux/usb/gadget.h> 46#include <linux/usb.h> 47#include <linux/usb/otg.h> 48#include <linux/usb/musb.h> 49 50struct musb; 51struct musb_hw_ep; 52struct musb_ep; 53 54/* Helper defines for struct musb->hwvers */ 55#define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f) 56#define MUSB_HWVERS_MINOR(x) (x & 0x3ff) 57#define MUSB_HWVERS_RC 0x8000 58#define MUSB_HWVERS_1300 0x52C 59#define MUSB_HWVERS_1400 0x590 60#define MUSB_HWVERS_1800 0x720 61#define MUSB_HWVERS_1900 0x784 62#define MUSB_HWVERS_2000 0x800 63 64#include "musb_debug.h" 65#include "musb_dma.h" 66 67#include "musb_io.h" 68#include "musb_regs.h" 69 70#include "musb_gadget.h" 71#include <linux/usb/hcd.h> 72#include "musb_host.h" 73 74/* NOTE: otg and peripheral-only state machines start at B_IDLE. 75 * OTG or host-only go to A_IDLE when ID is sensed. 76 */ 77#define is_peripheral_active(m) (!(m)->is_host) 78#define is_host_active(m) ((m)->is_host) 79 80enum { 81 MUSB_PORT_MODE_HOST = 1, 82 MUSB_PORT_MODE_GADGET, 83 MUSB_PORT_MODE_DUAL_ROLE, 84}; 85 86#ifdef CONFIG_PROC_FS 87#include <linux/fs.h> 88#define MUSB_CONFIG_PROC_FS 89#endif 90 91/****************************** CONSTANTS ********************************/ 92 93#ifndef MUSB_C_NUM_EPS 94#define MUSB_C_NUM_EPS ((u8)16) 95#endif 96 97#ifndef MUSB_MAX_END0_PACKET 98#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE) 99#endif 100 101/* host side ep0 states */ 102enum musb_h_ep0_state { 103 MUSB_EP0_IDLE, 104 MUSB_EP0_START, /* expect ack of setup */ 105 MUSB_EP0_IN, /* expect IN DATA */ 106 MUSB_EP0_OUT, /* expect ack of OUT DATA */ 107 MUSB_EP0_STATUS, /* expect ack of STATUS */ 108} __attribute__ ((packed)); 109 110/* peripheral side ep0 states */ 111enum musb_g_ep0_state { 112 MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */ 113 MUSB_EP0_STAGE_SETUP, /* received SETUP */ 114 MUSB_EP0_STAGE_TX, /* IN data */ 115 MUSB_EP0_STAGE_RX, /* OUT data */ 116 MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */ 117 MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */ 118 MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */ 119} __attribute__ ((packed)); 120 121/* 122 * OTG protocol constants. See USB OTG 1.3 spec, 123 * sections 5.5 "Device Timings" and 6.6.5 "Timers". 124 */ 125#define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */ 126#define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */ 127#define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */ 128#define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */ 129 130 131/*************************** REGISTER ACCESS ********************************/ 132 133/* Endpoint registers (other than dynfifo setup) can be accessed either 134 * directly with the "flat" model, or after setting up an index register. 135 */ 136 137#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \ 138 || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \ 139 || defined(CONFIG_ARCH_OMAP4) 140/* REVISIT indexed access seemed to 141 * misbehave (on DaVinci) for at least peripheral IN ... 142 */ 143#define MUSB_FLAT_REG 144#endif 145 146/* TUSB mapping: "flat" plus ep0 special cases */ 147#if defined(CONFIG_USB_MUSB_TUSB6010) || \ 148 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 149#define musb_ep_select(_mbase, _epnum) \ 150 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 151#define MUSB_EP_OFFSET MUSB_TUSB_OFFSET 152 153/* "flat" mapping: each endpoint has its own i/o address */ 154#elif defined(MUSB_FLAT_REG) 155#define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum))) 156#define MUSB_EP_OFFSET MUSB_FLAT_OFFSET 157 158/* "indexed" mapping: INDEX register controls register bank select */ 159#else 160#define musb_ep_select(_mbase, _epnum) \ 161 musb_writeb((_mbase), MUSB_INDEX, (_epnum)) 162#define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET 163#endif 164 165/****************************** FUNCTIONS ********************************/ 166 167#define MUSB_HST_MODE(_musb)\ 168 { (_musb)->is_host = true; } 169#define MUSB_DEV_MODE(_musb) \ 170 { (_musb)->is_host = false; } 171 172#define test_devctl_hst_mode(_x) \ 173 (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM) 174 175#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral") 176 177/******************************** TYPES *************************************/ 178 179/** 180 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer 181 * @init: turns on clocks, sets up platform-specific registers, etc 182 * @exit: undoes @init 183 * @set_mode: forcefully changes operating mode 184 * @try_ilde: tries to idle the IP 185 * @vbus_status: returns vbus status if possible 186 * @set_vbus: forces vbus status 187 * @adjust_channel_params: pre check for standard dma channel_program func 188 */ 189struct musb_platform_ops { 190 int (*init)(struct musb *musb); 191 int (*exit)(struct musb *musb); 192 193 void (*enable)(struct musb *musb); 194 void (*disable)(struct musb *musb); 195 196 int (*set_mode)(struct musb *musb, u8 mode); 197 void (*try_idle)(struct musb *musb, unsigned long timeout); 198 199 int (*vbus_status)(struct musb *musb); 200 void (*set_vbus)(struct musb *musb, int on); 201 202 int (*adjust_channel_params)(struct dma_channel *channel, 203 u16 packet_sz, u8 *mode, 204 dma_addr_t *dma_addr, u32 *len); 205}; 206 207/* 208 * struct musb_hw_ep - endpoint hardware (bidirectional) 209 * 210 * Ordered slightly for better cacheline locality. 211 */ 212struct musb_hw_ep { 213 struct musb *musb; 214 void __iomem *fifo; 215 void __iomem *regs; 216 217#if defined(CONFIG_USB_MUSB_TUSB6010) || \ 218 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 219 void __iomem *conf; 220#endif 221 222 /* index in musb->endpoints[] */ 223 u8 epnum; 224 225 /* hardware configuration, possibly dynamic */ 226 bool is_shared_fifo; 227 bool tx_double_buffered; 228 bool rx_double_buffered; 229 u16 max_packet_sz_tx; 230 u16 max_packet_sz_rx; 231 232 struct dma_channel *tx_channel; 233 struct dma_channel *rx_channel; 234 235#if defined(CONFIG_USB_MUSB_TUSB6010) || \ 236 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 237 /* TUSB has "asynchronous" and "synchronous" dma modes */ 238 dma_addr_t fifo_async; 239 dma_addr_t fifo_sync; 240 void __iomem *fifo_sync_va; 241#endif 242 243 void __iomem *target_regs; 244 245 /* currently scheduled peripheral endpoint */ 246 struct musb_qh *in_qh; 247 struct musb_qh *out_qh; 248 249 u8 rx_reinit; 250 u8 tx_reinit; 251 252 /* peripheral side */ 253 struct musb_ep ep_in; /* TX */ 254 struct musb_ep ep_out; /* RX */ 255}; 256 257static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep) 258{ 259 return next_request(&hw_ep->ep_in); 260} 261 262static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep) 263{ 264 return next_request(&hw_ep->ep_out); 265} 266 267struct musb_csr_regs { 268 /* FIFO registers */ 269 u16 txmaxp, txcsr, rxmaxp, rxcsr; 270 u16 rxfifoadd, txfifoadd; 271 u8 txtype, txinterval, rxtype, rxinterval; 272 u8 rxfifosz, txfifosz; 273 u8 txfunaddr, txhubaddr, txhubport; 274 u8 rxfunaddr, rxhubaddr, rxhubport; 275}; 276 277struct musb_context_registers { 278 279 u8 power; 280 u8 intrusbe; 281 u16 frame; 282 u8 index, testmode; 283 284 u8 devctl, busctl, misc; 285 u32 otg_interfsel; 286 287 struct musb_csr_regs index_regs[MUSB_C_NUM_EPS]; 288}; 289 290/* 291 * struct musb - Driver instance data. 292 */ 293struct musb { 294 /* device lock */ 295 spinlock_t lock; 296 297 const struct musb_platform_ops *ops; 298 struct musb_context_registers context; 299 300 irqreturn_t (*isr)(int, void *); 301 struct work_struct irq_work; 302 u16 hwvers; 303 304 u16 intrrxe; 305 u16 intrtxe; 306/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */ 307#define MUSB_PORT_STAT_RESUME (1 << 31) 308 309 u32 port1_status; 310 311 unsigned long rh_timer; 312 313 enum musb_h_ep0_state ep0_stage; 314 315 /* bulk traffic normally dedicates endpoint hardware, and each 316 * direction has its own ring of host side endpoints. 317 * we try to progress the transfer at the head of each endpoint's 318 * queue until it completes or NAKs too much; then we try the next 319 * endpoint. 320 */ 321 struct musb_hw_ep *bulk_ep; 322 323 struct list_head control; /* of musb_qh */ 324 struct list_head in_bulk; /* of musb_qh */ 325 struct list_head out_bulk; /* of musb_qh */ 326 327 struct timer_list otg_timer; 328 struct notifier_block nb; 329 330 struct dma_controller *dma_controller; 331 332 struct device *controller; 333 void __iomem *ctrl_base; 334 void __iomem *mregs; 335 336#if defined(CONFIG_USB_MUSB_TUSB6010) || \ 337 defined(CONFIG_USB_MUSB_TUSB6010_MODULE) 338 dma_addr_t async; 339 dma_addr_t sync; 340 void __iomem *sync_va; 341#endif 342 343 /* passed down from chip/board specific irq handlers */ 344 u8 int_usb; 345 u16 int_rx; 346 u16 int_tx; 347 348 struct usb_phy *xceiv; 349 350 int nIrq; 351 unsigned irq_wake:1; 352 353 struct musb_hw_ep endpoints[MUSB_C_NUM_EPS]; 354#define control_ep endpoints 355 356#define VBUSERR_RETRY_COUNT 3 357 u16 vbuserr_retry; 358 u16 epmask; 359 u8 nr_endpoints; 360 361 int (*board_set_power)(int state); 362 363 u8 min_power; /* vbus for periph, in mA/2 */ 364 365 int port_mode; /* MUSB_PORT_MODE_* */ 366 bool is_host; 367 368 int a_wait_bcon; /* VBUS timeout in msecs */ 369 unsigned long idle_timeout; /* Next timeout in jiffies */ 370 371 /* active means connected and not suspended */ 372 unsigned is_active:1; 373 374 unsigned is_multipoint:1; 375 376 unsigned hb_iso_rx:1; /* high bandwidth iso rx? */ 377 unsigned hb_iso_tx:1; /* high bandwidth iso tx? */ 378 unsigned dyn_fifo:1; /* dynamic FIFO supported? */ 379 380 unsigned bulk_split:1; 381#define can_bulk_split(musb,type) \ 382 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split) 383 384 unsigned bulk_combine:1; 385#define can_bulk_combine(musb,type) \ 386 (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine) 387 388 /* is_suspended means USB B_PERIPHERAL suspend */ 389 unsigned is_suspended:1; 390 391 /* may_wakeup means remote wakeup is enabled */ 392 unsigned may_wakeup:1; 393 394 /* is_self_powered is reported in device status and the 395 * config descriptor. is_bus_powered means B_PERIPHERAL 396 * draws some VBUS current; both can be true. 397 */ 398 unsigned is_self_powered:1; 399 unsigned is_bus_powered:1; 400 401 unsigned set_address:1; 402 unsigned test_mode:1; 403 unsigned softconnect:1; 404 405 u8 address; 406 u8 test_mode_nr; 407 u16 ackpend; /* ep0 */ 408 enum musb_g_ep0_state ep0_state; 409 struct usb_gadget g; /* the gadget */ 410 struct usb_gadget_driver *gadget_driver; /* its driver */ 411 struct usb_hcd *hcd; /* the usb hcd */ 412 413 /* 414 * FIXME: Remove this flag. 415 * 416 * This is only added to allow Blackfin to work 417 * with current driver. For some unknown reason 418 * Blackfin doesn't work with double buffering 419 * and that's enabled by default. 420 * 421 * We added this flag to forcefully disable double 422 * buffering until we get it working. 423 */ 424 unsigned double_buffer_not_ok:1; 425 426 struct musb_hdrc_config *config; 427 428#ifdef MUSB_CONFIG_PROC_FS 429 struct proc_dir_entry *proc_entry; 430#endif 431 int xceiv_old_state; 432#ifdef CONFIG_DEBUG_FS 433 struct dentry *debugfs_root; 434#endif 435}; 436 437static inline struct musb *gadget_to_musb(struct usb_gadget *g) 438{ 439 return container_of(g, struct musb, g); 440} 441 442#ifdef CONFIG_BLACKFIN 443static inline int musb_read_fifosize(struct musb *musb, 444 struct musb_hw_ep *hw_ep, u8 epnum) 445{ 446 musb->nr_endpoints++; 447 musb->epmask |= (1 << epnum); 448 449 if (epnum < 5) { 450 hw_ep->max_packet_sz_tx = 128; 451 hw_ep->max_packet_sz_rx = 128; 452 } else { 453 hw_ep->max_packet_sz_tx = 1024; 454 hw_ep->max_packet_sz_rx = 1024; 455 } 456 hw_ep->is_shared_fifo = false; 457 458 return 0; 459} 460 461static inline void musb_configure_ep0(struct musb *musb) 462{ 463 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 464 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 465 musb->endpoints[0].is_shared_fifo = true; 466} 467 468#else 469 470static inline int musb_read_fifosize(struct musb *musb, 471 struct musb_hw_ep *hw_ep, u8 epnum) 472{ 473 void __iomem *mbase = musb->mregs; 474 u8 reg = 0; 475 476 /* read from core using indexed model */ 477 reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE)); 478 /* 0's returned when no more endpoints */ 479 if (!reg) 480 return -ENODEV; 481 482 musb->nr_endpoints++; 483 musb->epmask |= (1 << epnum); 484 485 hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f); 486 487 /* shared TX/RX FIFO? */ 488 if ((reg & 0xf0) == 0xf0) { 489 hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx; 490 hw_ep->is_shared_fifo = true; 491 return 0; 492 } else { 493 hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4); 494 hw_ep->is_shared_fifo = false; 495 } 496 497 return 0; 498} 499 500static inline void musb_configure_ep0(struct musb *musb) 501{ 502 musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE; 503 musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE; 504 musb->endpoints[0].is_shared_fifo = true; 505} 506#endif /* CONFIG_BLACKFIN */ 507 508 509/***************************** Glue it together *****************************/ 510 511extern const char musb_driver_name[]; 512 513extern void musb_stop(struct musb *musb); 514 515extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src); 516extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst); 517 518extern void musb_load_testpacket(struct musb *); 519 520extern irqreturn_t musb_interrupt(struct musb *); 521 522extern void musb_hnp_stop(struct musb *musb); 523 524static inline void musb_platform_set_vbus(struct musb *musb, int is_on) 525{ 526 if (musb->ops->set_vbus) 527 musb->ops->set_vbus(musb, is_on); 528} 529 530static inline void musb_platform_enable(struct musb *musb) 531{ 532 if (musb->ops->enable) 533 musb->ops->enable(musb); 534} 535 536static inline void musb_platform_disable(struct musb *musb) 537{ 538 if (musb->ops->disable) 539 musb->ops->disable(musb); 540} 541 542static inline int musb_platform_set_mode(struct musb *musb, u8 mode) 543{ 544 if (!musb->ops->set_mode) 545 return 0; 546 547 return musb->ops->set_mode(musb, mode); 548} 549 550static inline void musb_platform_try_idle(struct musb *musb, 551 unsigned long timeout) 552{ 553 if (musb->ops->try_idle) 554 musb->ops->try_idle(musb, timeout); 555} 556 557static inline int musb_platform_get_vbus_status(struct musb *musb) 558{ 559 if (!musb->ops->vbus_status) 560 return 0; 561 562 return musb->ops->vbus_status(musb); 563} 564 565static inline int musb_platform_init(struct musb *musb) 566{ 567 if (!musb->ops->init) 568 return -EINVAL; 569 570 return musb->ops->init(musb); 571} 572 573static inline int musb_platform_exit(struct musb *musb) 574{ 575 if (!musb->ops->exit) 576 return -EINVAL; 577 578 return musb->ops->exit(musb); 579} 580 581#endif /* __MUSB_CORE_H__ */