tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
1/*
2 * Copyright (C) 2012 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/init.h>
15#include <linux/irq.h>
16#include <linux/interrupt.h>
17#include <linux/jiffies.h>
18#include <linux/clockchips.h>
19#include <linux/types.h>
20
21#include <linux/io.h>
22#include <asm/mach/time.h>
23
24#include <linux/of.h>
25#include <linux/of_address.h>
26#include <linux/of_irq.h>
27
28
29#define KONA_GPTIMER_STCS_OFFSET 0x00000000
30#define KONA_GPTIMER_STCLO_OFFSET 0x00000004
31#define KONA_GPTIMER_STCHI_OFFSET 0x00000008
32#define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
33
34#define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
35#define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
36
37struct kona_bcm_timers {
38 int tmr_irq;
39 void __iomem *tmr_regs;
40};
41
42static struct kona_bcm_timers timers;
43
44static u32 arch_timer_rate;
45
46/*
47 * We use the peripheral timers for system tick, the cpu global timer for
48 * profile tick
49 */
50static void kona_timer_disable_and_clear(void __iomem *base)
51{
52 uint32_t reg;
53
54 /*
55 * clear and disable interrupts
56 * We are using compare/match register 0 for our system interrupts
57 */
58 reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
59
60 /* Clear compare (0) interrupt */
61 reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
62 /* disable compare */
63 reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
64
65 writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
66
67}
68
69static void
70kona_timer_get_counter(void *timer_base, uint32_t *msw, uint32_t *lsw)
71{
72 void __iomem *base = IOMEM(timer_base);
73 int loop_limit = 4;
74
75 /*
76 * Read 64-bit free running counter
77 * 1. Read hi-word
78 * 2. Read low-word
79 * 3. Read hi-word again
80 * 4.1
81 * if new hi-word is not equal to previously read hi-word, then
82 * start from #1
83 * 4.2
84 * if new hi-word is equal to previously read hi-word then stop.
85 */
86
87 while (--loop_limit) {
88 *msw = readl(base + KONA_GPTIMER_STCHI_OFFSET);
89 *lsw = readl(base + KONA_GPTIMER_STCLO_OFFSET);
90 if (*msw == readl(base + KONA_GPTIMER_STCHI_OFFSET))
91 break;
92 }
93 if (!loop_limit) {
94 pr_err("bcm_kona_timer: getting counter failed.\n");
95 pr_err(" Timer will be impacted\n");
96 }
97
98 return;
99}
100
101static const struct of_device_id bcm_timer_ids[] __initconst = {
102 {.compatible = "bcm,kona-timer"},
103 {},
104};
105
106static void __init kona_timers_init(struct device_node *node)
107{
108 u32 freq;
109
110 if (!of_property_read_u32(node, "clock-frequency", &freq))
111 arch_timer_rate = freq;
112 else
113 panic("clock-frequency not set in the .dts file");
114
115 /* Setup IRQ numbers */
116 timers.tmr_irq = irq_of_parse_and_map(node, 0);
117
118 /* Setup IO addresses */
119 timers.tmr_regs = of_iomap(node, 0);
120
121 kona_timer_disable_and_clear(timers.tmr_regs);
122}
123
124static int kona_timer_set_next_event(unsigned long clc,
125 struct clock_event_device *unused)
126{
127 /*
128 * timer (0) is disabled by the timer interrupt already
129 * so, here we reload the next event value and re-enable
130 * the timer.
131 *
132 * This way, we are potentially losing the time between
133 * timer-interrupt->set_next_event. CPU local timers, when
134 * they come in should get rid of skew.
135 */
136
137 uint32_t lsw, msw;
138 uint32_t reg;
139
140 kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
141
142 /* Load the "next" event tick value */
143 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
144
145 /* Enable compare */
146 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
147 reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
148 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
149
150 return 0;
151}
152
153static void kona_timer_set_mode(enum clock_event_mode mode,
154 struct clock_event_device *unused)
155{
156 switch (mode) {
157 case CLOCK_EVT_MODE_ONESHOT:
158 /* by default mode is one shot don't do any thing */
159 break;
160 case CLOCK_EVT_MODE_UNUSED:
161 case CLOCK_EVT_MODE_SHUTDOWN:
162 default:
163 kona_timer_disable_and_clear(timers.tmr_regs);
164 }
165}
166
167static struct clock_event_device kona_clockevent_timer = {
168 .name = "timer 1",
169 .features = CLOCK_EVT_FEAT_ONESHOT,
170 .set_next_event = kona_timer_set_next_event,
171 .set_mode = kona_timer_set_mode
172};
173
174static void __init kona_timer_clockevents_init(void)
175{
176 kona_clockevent_timer.cpumask = cpumask_of(0);
177 clockevents_config_and_register(&kona_clockevent_timer,
178 arch_timer_rate, 6, 0xffffffff);
179}
180
181static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
182{
183 struct clock_event_device *evt = &kona_clockevent_timer;
184
185 kona_timer_disable_and_clear(timers.tmr_regs);
186 evt->event_handler(evt);
187 return IRQ_HANDLED;
188}
189
190static struct irqaction kona_timer_irq = {
191 .name = "Kona Timer Tick",
192 .flags = IRQF_TIMER,
193 .handler = kona_timer_interrupt,
194};
195
196static void __init kona_timer_init(struct device_node *node)
197{
198 kona_timers_init(node);
199 kona_timer_clockevents_init();
200 setup_irq(timers.tmr_irq, &kona_timer_irq);
201 kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
202}
203
204CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);